March 2010 - SerialICE - mail.coreboot.org

serialice.lua:453: attempt to index global 'regs' (a nil value)
by Peter Bannis March 23, 2010

March 23, 2010

Hi, Where is 'regs' declared as global? The script functions tha access cpu registers fail with this message. Failed to run function SerialICE_memory_write_filter: serialice.lua:453: attempt to index global 'regs' (a nil value) Thanks Peter

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[PATCH] Add Tyan S2912
by Arne Georg Gleditsch March 17, 2010

March 17, 2010

I wasn't quite sure how to add the romstrap bits, and settled on using the existing romstrap section w. padding. I suppose it could be reworked to be more elegant, but I didn't want to fiddle with the linker script. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> -- Arne.

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[commit] r97 - in trunk/SerialICE: . mainboard
by repository service March 17, 2010

March 17, 2010

Author: stepan Date: Wed Mar 17 01:44:53 2010 New Revision: 97 URL: http://www.serialice.com/trac/serialice/changeset/97 Log: TYAN S2912 support from Arne Georg Gleditsch Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Added: trunk/SerialICE/mainboard/tyan_s2912.c Modified: trunk/SerialICE/Kconfig trunk/SerialICE/start.S Modified: trunk/SerialICE/Kconfig ============================================================================== --- trunk/SerialICE/Kconfig Sun Mar 14 12:18:11 2010 (r96) +++ trunk/SerialICE/Kconfig Wed Mar 17 01:44:53 2010 (r97) @@ -63,6 +63,10 @@ config BOARD_TELEVIDEO_TC7010 bool "Televideo TC7010" +config BOARD_TYAN_S2912 + bool "Tyan S2912" + select MCP55_ROMSTRAP + endchoice config BOARD_INIT @@ -78,6 +82,7 @@ default "asus_p2b.c" if BOARD_ASUS_P2B default "asrock_939a785gmh.c" if BOARD_ASROCK_939A785GMH default "televideo_tc7010.c" if BOARD_TELEVIDEO_TC7010 + default "tyan_s2912.c" if BOARD_TYAN_S2912 choice prompt "Target communication" @@ -212,6 +217,11 @@ depends on EXPERT default n +config MCP55_ROMSTRAP + bool "NVIDIA MCP55 Southbridge ROMSTRAP" + depends on EXPERT + default n + choice prompt "Build Method" default BUILD_ROMCC @@ -242,6 +252,11 @@ bool depends on !EXPERT default n + +config MCP55_ROMSTRAP + bool + depends on !EXPERT + default n config BUILD_ROMCC bool Added: trunk/SerialICE/mainboard/tyan_s2912.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/SerialICE/mainboard/tyan_s2912.c Wed Mar 17 01:44:53 2010 (r97) @@ -0,0 +1,68 @@ +/* + * SerialICE + * + * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2010 Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="Tyan S2912 "; + +#define SUPERIO_CONFIG_PORT 0x2e +#define W83627HF_SP1 2 + +static void superio_init(void) +{ + int i; + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Enable the serial port. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, W83627HF_SP1); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + superio_init(); + + __asm__ __volatile__("\ + jmp skip\n\ + .align 128\n\ + .globl mcp55_romstrap\n\ + mcp55_romstrap:\n\ + .long 0x2b16d065\n\ + .long 0x0\n\ + .long 0x0\n\ + .long linkedlist\n\ + linkedlist:\n\ + .long 0x0003001C // 10h\n\ + .long 0x08000000 // 14h\n\ + .long 0x00000000 // 18h\n\ + .long 0xFFFFFFFF // 1Ch\n\ + .long 0xFFFFFFFF // 20h\n\ + .long 0xFFFFFFFF // 24h\n\ + .long 0xFFFFFFFF // 28h\n\ + .long 0xFFFFFFFF // 2Ch\n\ + .long 0x81543266 // 30h, MAC address low 4 byte\n\ + .long 0x000000E0 // 34h, MAC address high 4 byte\n\ + .long 0x002309CE // 38h, UUID low 4 byte\n\ + .long 0x00E08100 // 3Ch, UUID high 4 byte\n\ + skip:\n"); +} Modified: trunk/SerialICE/start.S ============================================================================== --- trunk/SerialICE/start.S Sun Mar 14 12:18:11 2010 (r96) +++ trunk/SerialICE/start.S Wed Mar 17 01:44:53 2010 (r97) @@ -123,3 +123,12 @@ */ .long via_romstrap #endif + +#ifdef CONFIG_MCP55_ROMSTRAP +/* Pointers to nvidia tables at 0xffffe0 */ + . = 0x10; + .long mcp55_romstrap + .long mcp55_romstrap + .long mcp55_romstrap + .long mcp55_romstrap +#endif

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Mainoard TC7010
by Peter Bannis March 14, 2010

March 14, 2010

Serialice boots and runs on the Televideo TC7010 peter

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[commit] r96 - in trunk/SerialICE: . mainboard
by repository service March 14, 2010

March 14, 2010

Author: stepan Date: Sun Mar 14 12:18:11 2010 New Revision: 96 URL: http://www.serialice.com/trac/serialice/changeset/96 Log: Add slightly modified version of Peter Bannis' TC7010 port. Added: trunk/SerialICE/mainboard/televideo_tc7010.c Modified: trunk/SerialICE/Kconfig Modified: trunk/SerialICE/Kconfig ============================================================================== --- trunk/SerialICE/Kconfig Tue Jan 26 02:49:02 2010 (r95) +++ trunk/SerialICE/Kconfig Sun Mar 14 12:18:11 2010 (r96) @@ -60,6 +60,9 @@ config BOARD_ASUS_P2B bool "ASUS P2B" +config BOARD_TELEVIDEO_TC7010 + bool "Televideo TC7010" + endchoice config BOARD_INIT @@ -74,6 +77,7 @@ default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 default "asus_p2b.c" if BOARD_ASUS_P2B default "asrock_939a785gmh.c" if BOARD_ASROCK_939A785GMH + default "televideo_tc7010.c" if BOARD_TELEVIDEO_TC7010 choice prompt "Target communication" Added: trunk/SerialICE/mainboard/televideo_tc7010.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/SerialICE/mainboard/televideo_tc7010.c Sun Mar 14 12:18:11 2010 (r96) @@ -0,0 +1,60 @@ +/* + * SerialICE + * + * Copyright (C) 2010 Peter Bannis + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33] = "Televideo TC7010 "; + +#define SUPERIO_CONFIG_PORT 0x2e +#define PM_BASE 0xe8 + +static void superio_init(void) +{ + /* Set base address of power management unit */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 8); + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, PM_BASE); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + /* Use on-chip clock multiplier */ + outb(0x03, PM_BASE); + outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1); + + /* Wait for the clock to stabilise */ + while (!(inb(PM_BASE + 1) & 0x80)) ; + + /* Enable the serial ports. */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 6); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + /* Set LDN 5 UART Mode */ + outb(0x21, SUPERIO_CONFIG_PORT); + outb(inb(SUPERIO_CONFIG_PORT + 1) | (1 << 3), SUPERIO_CONFIG_PORT + 1); + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 5); /* COM2 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x2f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 3); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); +} + +static void chipset_init(void) +{ + superio_init(); +}

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