2010/8/5 Idwer Vollering <vidwer(a)gmail.com>
> 2010/8/3 Myles Watson <mylesgw(a)gmail.com>
>> On Tue, Aug 3, 2010 at 10:59 AM, Idwer Vollering <vidwer(a)gmail.com>
>> > My problem is two-fold:
>> > 1) Running the patched qemu segfaults.
>> > $ sudo ./i386-softmmu/qemu -serialice /dev/ttyUSB0 -hda /dev/zero -L
>> > [sudo] password for idwer:
>> > SerialICE: Open connection to target hardware...
>> > SerialICE: Waiting for handshake with target... target alife!
>> try the latest qemu in the SerialICE tree
>> It's already patched, and it has been updated more recently than the
>> > 2) Right now, the serialice shell appears only once: after flashing
>> > serialice.rom and performing a soft reset from vendor bios to serialice.
>> > SerialICE v1.5 (Aug 3 2010)
Following quote is after soft reset, typing some text and hitting the reset
SerialICE v1.5 (Aug 27 2010)
>> Sounds like SerialICE is depending on some initialization from the
>> vendor BIOS. I guess an ugly way to test it would be to copy the
>> working configuration bits from lspci and hard code them into
>> SerialICE until you find what's wrong.
Since the southbridge and superio datasheets mention the existence of two
serial ports, I followed their guidance.
I thought that (the console printing part of) SerialICE, when setup the
correct way, should survive a hard reset/power cycle regardless of the qemu
part is running or not.
Since I don't have an oscilloscope, I've tried setting CLKSEL to 24 MHz and
pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xb4); // 24 MHz and KBC=1
pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc4); // 48 MHz and KBC=1
What information is leading, the info from the superio or the info from the
> Attached the mainboard code as well.
Attaching .config, dmesg, lspci and the patch against svn.
Date: Wed Aug 4 17:09:35 2010
New Revision: 105
ASUS M4A77TD-PRO support from Xavier and Rudolf
Signed-off-by: Xavier Drudis Ferran <xdrudis(a)tinet.cat>
Acked-by: Stefan Reinauer <stepan(a)coresystems.de>
--- trunk/SerialICE/Kconfig Fri Jul 2 21:06:05 2010 (r104)
+++ trunk/SerialICE/Kconfig Wed Aug 4 17:09:35 2010 (r105)
@@ -50,6 +50,10 @@
+ bool "ASUS M4A77TD-PRO"
+ select BUILD_XMMSTACK
bool "Asrock 939A785GMH"
@@ -99,6 +103,7 @@
default "rca_rm4100.c" if BOARD_RCA_RM4100
default "thomson_ip1000.c" if BOARD_THOMSON_IP1000
default "asus_p2b.c" if BOARD_ASUS_P2B
+ default "asus_m4a77td-pro.c" if BOARD_ASUS_M4A77TD_PRO
default "asrock_939a785gmh.c" if BOARD_ASROCK_939A785GMH
default "televideo_tc7010.c" if BOARD_TELEVIDEO_TC7010
default "tyan_s2892.c" if BOARD_TYAN_S2892
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ trunk/SerialICE/mainboard/asus_m4a77td-pro.c Wed Aug 4 17:09:35 2010 (r105)
@@ -0,0 +1,64 @@
+ * SerialICE
+ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de>
+ * Copyright (C) 2010 Rudolf Marek <r.marek(a)assembler.cz>
+ * Copyright (C) 2010 Xavi Drudis Ferran <xdrudis(a)tinet.cat>
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+const char boardname="ASUS M4A77TD-PRO ";
+#define SUPERIO_CONFIG_PORT 0x2e
+static void superio_init(void)
+ /* Disable the watchdog. */
+ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7);
+ pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00);
+ /* Enable the serial port. */
+ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 1); /* COM1 */
+ pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+ pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+ pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+ pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+static void chipset_init(void)
+ /* stop the mainboard from rebooting */
+ /* inspired by coreboot, src/southbridge/amd/sb700/sb700_early_init.c,
+ * sb700_lpc_init(), where the comment says:
+ * NOTE: Set BootTimerDisable, otherwise it would keep rebooting!!
+ * This bit has no meaning if debug strap is not enabled. So if the
+ * board keeps rebooting and the code fails to reach here, we could
+ * disable the debug strap first.
+ u32 reg32 = pci_read_config32(PCI_ADDR(0, 0x14, 0, 0x4C));
+ reg32 |= 1 << 31;
+ pci_write_config32(PCI_ADDR(0, 0x14, 0, 0x4C), reg32);
+ /* Enable LPC decoding */
+ pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x44), (1<<6));
+ pci_write_config8(PCI_ADDR(0, 0x14, 3, 0x48), (1 << 1) | (1 << 0));
Rudolf Marek has adapted a mainboard file for my mainboard ASUS M4A77TD-PRO,
I've been able to test it (shell only, I haven't tried qemu nor gdb) and
adapt code from coreboot to fix a rebooting loop.
Not sure of the policy for SerialICE, in case it is needed, it is
Signed off by: Xavier Drudis Ferran <xdrudis(a)tinet.cat>
----- Forwarded message from Rudolf Marek <r.marek(a)assembler.cz> -----
> I'm not against a change you provided for the original asrock file
> too, just please add comment what it does. I think this was not needed
> here but some other people copying the SB700 code might find it
----- End forwarded message -----
I didn't mean to provide it for the Asrock, it's just that we made the
changes in that board before I copied it to the proper file. I just
sent the lines that solved the reboot for my board.
I'm not sending it for Asrock since I don't have any asrock board to test and
the people who tested them apparently didn't need it. I can't tell
if it can break something on an asrock...