Re: AW: AW: [OpenBIOS] OT: Bios access speeds

[James Oakley]

Stephan Müller wrote:
> > > Ah!  Very much like video memory or adapter RAM...  **NOW** I
> >
> > understand the
> > > ISA bus speeed question and why it was important!!
> >
> > I was looking through my motherboard manual today, and I happened to see a
> > block diagram of the Intel GX chipset.  According to the block
> > diagram, the
> > BIOS uses the same interface into the chipset as the ISA bus.  While the
> > BIOS may not actually be attached to the ISA bus, it is accessed
> > in the same
> > way by the chipset (and, therefore, the CPU).
> >
> > Of course, this was a rough block diagram and, besides, what do I know?
>
> The BIOS is normally connected directly to the ISA bus. That is why, if the
> ISA-Bridge is damaged, your Board can't even boot with PCI-Cards.

Wow, didn't expect OB traffic to increase this much, considering the
recent lull.

Yes, the BIOS is connected to the ISA bus, I verified that with a
multimeter.

All of the flash pins can be connected on the card to the ISA bus except
for /ce. It's easiest to hijack it from the original flash socket.

I have that part of the schematic completed, not that there's any design
involved, just drawing it takes up time. Glue is not required for the
flashes.

Glue is, however, required for POST and GPIO. There are two ways to go
with this, and this has been discussed to some degree. Using a GAL is
definitely the cleanest solution. However, is there anybody who wants
one of these who doesn't have access to a programmer? Traditional logic
chips are more accessible to these people. It's still really cheap even
though chip count will increase.

Who agrees/disagrees?

james oakley
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AW: AW: OT: Bios access speeds

[Qiwei Xiao]

James Oakley wrote:
> ...
>
> Glue is, however, required for POST and GPIO. There are two ways to go
> with this, and this has been discussed to some degree. Using a GAL is
> definitely the cleanest solution. However, is there anybody who wants
> one of these who doesn't have access to a programmer? Traditional logic
> chips are more accessible to these people. It's still really cheap even
> though chip count will increase.
>
> Who agrees/disagrees?

I don't see any advantage of using GAL for the simple purpose of decoding 
the address. I don't have a GAL programmer and I don't think most people do.

There are two senarios for address decoding: memory (eprom, etc) and device
(POST card, printer port, etc). For memory type, there are 20 address lines 
(SA0-SA19). I am attching a schematic for an ISA address decoder circuit 
using only two chips: one 138 and one 139 (might need high speed HCT type). 
You can set jumpers to select the base address. This is a very typical
decoder ciucuit. (I cut it out from a larger application so I am not 
claiming credit for it).

The other type is device. I believe only 64k can be addressed (16 lines). 
An address decoder can easily be done using similar scheme as the above.
I have the schematic of an original IBM PC printer card if anybody is 
interested.

Thanks,
Qiwei

AW: AW: OT: Bios access speeds

[Matthew Sullivan]

Hi

James Oakley wrote:
> --<snip>--
> Glue is, however, required for POST and GPIO. There are two ways to go
> with this, and this has been discussed to some degree. Using a GAL is
> definitely the cleanest solution. However, is there anybody who wants
> one of these who doesn't have access to a programmer? Traditional logic
> chips are more accessible to these people. It's still really cheap even
> though chip count will increase.
> Who agrees/disagrees?

Well I don't have access to a programmer atm, and I would like to see the solution
by GAL, just for the cleanliness....

Yours

Matt