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I’m starting cpu1 in the halted state, you’re one step ahead of me, and replying before zi see you have already answered the question.
Sorry, that’s my fault for not checking before I hit send.
On Feb 22, 2025, at 9:54 AM, BALATON Zoltan balaton@eik.bme.hu wrote:
On Sat, 22 Feb 2025, Jd Lyons wrote:
There is IPI code in the openpic.c but I’m not sure it’s woking at all, I don’t see any IACK in my debug info for openpic.c when I turn on the debug option 1 to true.
Maybe IACK is not logged, but clearly both CPUs are responding to IRQ requests, they just maybe stuck responding to the same requests, that’s all I can figure.
If you start with both CPUs running they will both execute the whole boot in parallel but they will also both poke the same devices so this won't work. The second processor should stay halted until the kernel resets it through the GPIO line at which point it will have set up the code so the second CPU will run the code it should run and not mix up what CPU0 is doing. This also something I've explained before.
Regards, BALATON Zoltan
On Sat, 22 Feb 2025, Jd Lyons wrote:
I’m starting cpu1 in the halted state, you’re one step ahead of me, and replying before zi see you have already answered the question.
:-) Good if I can answer you questions before you ask them. I hope I've answered a lot of questions in my last messages so read them carefully.
Regards, BALATON Zoltan