r455 - dev/olpc/cafenand

Author: wmb
Date: 2007-07-05 19:09:11 +0200 (Thu, 05 Jul 2007)
New Revision: 455

Modified:
   dev/olpc/cafenand/cafenand.fth
Log:
OLPC CaFe NAND driver - relaxed a couple of timings per Marvell's recommendation.

Modified: dev/olpc/cafenand/cafenand.fth
===================================================================
--- dev/olpc/cafenand/cafenand.fth	2007-07-05 17:07:58 UTC (rev 454)
+++ dev/olpc/cafenand/cafenand.fth	2007-07-05 17:09:11 UTC (rev 455)
@@ -47,7 +47,7 @@
    \ The following timing values are calculated from the Hynix and Samsung
    \ datasheets based on a clock cycle time of 10.4 nS.
    h# 1010.0900 h# 24 cl!  \ Timing1
-   h#    1.0101 h# 28 cl!  \ Timing2
+   h#    1.0102 h# 28 cl!  \ Timing2 - recommended by Marvell
    h# 1000.0000 h# 2c cl!  \ Timing3
 ;
 [ifdef] notdef
@@ -94,7 +94,7 @@
 \ h#        90 4 1 >cmd constant read-id-cmd      \ Not needed
 h#   20.0070 1 0 >cmd constant read-status-cmd
 h# 0420.0000 0 5 >cmd constant read-cmd
-h# 0220.0080 0 5 >cmd constant write-cmd
+h# 0220.0080 0 6 >cmd constant write-cmd  \ The 6 adds a dummy address cycle to meet tADR for Hynix

: wait-mask  ( bitmask -- )
    begin  dup h# 10 cl@  and  until  ( bitmask )