On Sun, Mar 4, 2012 at 22:00, Mark Cave-Ayland
On 04/03/12 19:55, Blue Swirl wrote:
A change in QEMU on how PCI bridges are setup
a bug in OpenBIOS PCI setup. On Sparc64, the BARs just
happened to get somewhat correct values by accident before
the commit but not after the change.
Avoid to set up BARs for host bridge. Fix bridge
check, this lead to setting up 6 BARs instead of more
correct 2. If a bridge doesn't have any devices behind it,
disable it entirely. Fix Sparc64 PCI memory base.
Signed-off-by: Blue Swirl<blauwirbel(a)gmail.com>
I confirm that this patch appears to fix the problem for me, although I
guess there may be some further related bridge changes based on the current
thread with Michael?
On second thought, I think my approach is not 100% correct yet. The
bugs were revealed when PCI I/O went 32 bit, initial io_base
calculation (starting with host address for I/O ports) should be
Also the bridge disabling part could be left out or split to a separate commit.
Free your System - May the Forth be with you