r416 - cpu/x86/pc/olpc

Author: wmb
Date: 2007-05-23 02:13:56 +0200 (Wed, 23 May 2007)
New Revision: 416

Modified:
   cpu/x86/pc/olpc/resume.bth
Log:
Fixed OLPC trac #1554 by clearing the positive and negative edge event status
bits for GPIO pins that are not powered during suspend.

Modified: cpu/x86/pc/olpc/resume.bth
===================================================================
--- cpu/x86/pc/olpc/resume.bth	2007-05-23 00:07:01 UTC (rev 415)
+++ cpu/x86/pc/olpc/resume.bth	2007-05-23 00:13:56 UTC (rev 416)
@@ -325,8 +325,8 @@
       si bx cmp
    = until

-   h# 1840 # di mov         \ PM1_STS/EN I/O port number
-   di ax in  ax di out      \ Preserve EN bits and cleare STS bits  
+   h# 1840 # dx mov         \ PM1_STS/EN I/O port number
+   dx ax in  ax dx out      \ Preserve EN bits and clear STS bits

h# 38 [bp]  si  lea    \ Save area

@@ -344,6 +344,12 @@
       ax   dx  out  \ Write to GPIO control register
       4 #  dx  sub  \ Next port address
    loopa
+
+   \ Clear edge detects for GPIO pins that are not powered during suspend
+   h# ffff # ax mov
+   h# 1048 # dx mov  ax dx out  \ Pos edge status
+   h# 104c # dx mov  ax dx out  \ Neg edge status
+
    ax lods  h# 1040 # dx mov  ax dx out  \ Pos edge enable
    ax lods  h# 1044 # dx mov  ax dx out  \ Neg edge enable
    ax lods  h# 103c # dx mov  ax dx out  \ Low bank lock
@@ -355,6 +361,13 @@
       ax   dx  out  \ Write to GPIO control register
       4 #  dx  sub  \ Next port address
    loopa
+
+   \ Clear edge detects for GPIO pins that are not powered during suspend
+   \ GPIOs 28:24 are in the suspend power well.  GPIOs 31:29 don't exist.
+   h# e0ff # ax mov
+   h# 10c8 # dx mov  ax dx out  \ Pos edge status
+   h# 10cc # dx mov  ax dx out  \ Neg edge status
+
    ax lods  h# 10c0 # dx mov  ax dx out  \ Pos edge enable
    ax lods  h# 10c4 # dx mov  ax dx out  \ Neg edge enable
    ax lods  h# 10bc # dx mov  ax dx out  \ High bank lock