This allows the processors from the 7450 family to pass the initial PVR verification. Enables 7441, 7445, 7447, 7447a, 7450, 7451, 7455, 7457 and 7457a.
This should be used along with a QEMU that includes commit 1da666cd8e ("target/ppc: Disable software TLB for the 7450 family").
With Linux 5.15:
$ cd buildroot $ make qemu_ppc_mac99_defconfig $ make $ qemu-system-ppc -m 1G -M mac99,via=pmu -cpu 7450 \ -kernel ./output/images/vmlinux \ -append root=/dev/sda \ -drive file=./output/images/rootfs.ext2,format=raw \ -net nic,model=sungem -net user -serial mon:stdio -nographic
============================================================= OpenBIOS 1.1 [Jan 10 2022 13:27] Configuration device id QEMU version 1 machine id 1 CPUs: 1 Memory: 1024M UUID: 00000000-0000-0000-0000-000000000000 CPU type PowerPC,G4
(...) Booting Linux via __start() @ 0x01000000 ... (...) Welcome to Buildroot buildroot login:
Signed-off-by: Fabiano Rosas farosas@linux.ibm.com --- arch/ppc/qemu/init.c | 52 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 45cd77e..e40385a 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -569,6 +569,58 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, }, + { + .iu_version = 0x80000000, + .name = "PowerPC,G4", + .icache_size = 0x8000, + .dcache_size = 0x8000, + .icache_sets = 0x80, + .dcache_sets = 0x80, + .icache_block_size = 0x20, + .dcache_block_size = 0x20, + .tlb_sets = 0x40, + .tlb_size = 0x80, + .initfn = cpu_g4_init, + }, + { + .iu_version = 0x80010000, + .name = "PowerPC,G4", + .icache_size = 0x8000, + .dcache_size = 0x8000, + .icache_sets = 0x80, + .dcache_sets = 0x80, + .icache_block_size = 0x20, + .dcache_block_size = 0x20, + .tlb_sets = 0x40, + .tlb_size = 0x80, + .initfn = cpu_g4_init, + }, + { + .iu_version = 0x80020000, + .name = "PowerPC,G4", + .icache_size = 0x8000, + .dcache_size = 0x8000, + .icache_sets = 0x80, + .dcache_sets = 0x80, + .icache_block_size = 0x20, + .dcache_block_size = 0x20, + .tlb_sets = 0x40, + .tlb_size = 0x80, + .initfn = cpu_g4_init, + }, + { + .iu_version = 0x80030000, + .name = "PowerPC,G4", + .icache_size = 0x8000, + .dcache_size = 0x8000, + .icache_sets = 0x80, + .dcache_sets = 0x80, + .icache_block_size = 0x20, + .dcache_block_size = 0x20, + .tlb_sets = 0x40, + .tlb_size = 0x80, + .initfn = cpu_g4_init, + }, { .iu_version = 0x00390000, .name = "PowerPC,970",
On 10/01/2022 14:26, Fabiano Rosas wrote:
This allows the processors from the 7450 family to pass the initial PVR verification. Enables 7441, 7445, 7447, 7447a, 7450, 7451, 7455, 7457 and 7457a.
This should be used along with a QEMU that includes commit 1da666cd8e ("target/ppc: Disable software TLB for the 7450 family").
With Linux 5.15:
$ cd buildroot $ make qemu_ppc_mac99_defconfig $ make $ qemu-system-ppc -m 1G -M mac99,via=pmu -cpu 7450 \ -kernel ./output/images/vmlinux \ -append root=/dev/sda \ -drive file=./output/images/rootfs.ext2,format=raw \ -net nic,model=sungem -net user -serial mon:stdio -nographic
============================================================= OpenBIOS 1.1 [Jan 10 2022 13:27] Configuration device id QEMU version 1 machine id 1 CPUs: 1 Memory: 1024M UUID: 00000000-0000-0000-0000-000000000000 CPU type PowerPC,G4
(...) Booting Linux via __start() @ 0x01000000 ... (...) Welcome to Buildroot buildroot login:
Signed-off-by: Fabiano Rosas farosas@linux.ibm.com
arch/ppc/qemu/init.c | 52 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+)
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 45cd77e..e40385a 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -569,6 +569,58 @@ static const struct cpudef ppc_defs[] = { .tlb_size = 0x80, .initfn = cpu_g4_init, },
- {
.iu_version = 0x80000000,.name = "PowerPC,G4",.icache_size = 0x8000,.dcache_size = 0x8000,.icache_sets = 0x80,.dcache_sets = 0x80,.icache_block_size = 0x20,.dcache_block_size = 0x20,.tlb_sets = 0x40,.tlb_size = 0x80,.initfn = cpu_g4_init,- },
- {
.iu_version = 0x80010000,.name = "PowerPC,G4",.icache_size = 0x8000,.dcache_size = 0x8000,.icache_sets = 0x80,.dcache_sets = 0x80,.icache_block_size = 0x20,.dcache_block_size = 0x20,.tlb_sets = 0x40,.tlb_size = 0x80,.initfn = cpu_g4_init,- },
- {
.iu_version = 0x80020000,.name = "PowerPC,G4",.icache_size = 0x8000,.dcache_size = 0x8000,.icache_sets = 0x80,.dcache_sets = 0x80,.icache_block_size = 0x20,.dcache_block_size = 0x20,.tlb_sets = 0x40,.tlb_size = 0x80,.initfn = cpu_g4_init,- },
- {
.iu_version = 0x80030000,.name = "PowerPC,G4",.icache_size = 0x8000,.dcache_size = 0x8000,.icache_sets = 0x80,.dcache_sets = 0x80,.icache_block_size = 0x20,.dcache_block_size = 0x20,.tlb_sets = 0x40,.tlb_size = 0x80,.initfn = cpu_g4_init,- }, { .iu_version = 0x00390000, .name = "PowerPC,970",
Thanks - applied to master.
ATB,
Mark.
-
Fabiano Rosas -
Mark Cave-Ayland