An upcoming change to QEMU's ESCC device reset mechanism exposed a bug that OpenBIOS's ESCC driver doesn't actually reset the port before attempting to configure it. Whilst this has no effect for now, once the QEMU ESCC changes have been merged (which implement the reset as documented in the datasheet), this port reset must be sent so that the registers are set to their default values after power-on.
Signed-off-by: Mark Cave-Ayland mark.cave-ayland@ilande.co.uk
Mark Cave-Ayland (2): escc: add port index to uart_init_line() escc: send software reset command before configuring the port
drivers/escc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
This will be needed to allow uart_init_line() to reset the correct port.
Signed-off-by: Mark Cave-Ayland mark.cave-ayland@ilande.co.uk --- drivers/escc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/escc.c b/drivers/escc.c index d9e1990..4da8917 100644 --- a/drivers/escc.c +++ b/drivers/escc.c @@ -78,7 +78,7 @@ static void escc_uart_port_putchar(uintptr_t port, unsigned char c) DATA(port) = c; }
-static void uart_init_line(volatile unsigned char *port, unsigned long baud) +static void uart_init_line(volatile unsigned char *port, unsigned long baud, int index) { CTRL(port) = 4; // reg 4 CTRL(port) = SB1 | X16CLK; // no parity, async, 1 stop bit, 16x @@ -110,7 +110,7 @@ int escc_uart_init(phys_addr_t port, unsigned long speed) #else escc_serial_dev = (unsigned char *)(uintptr_t)port; #endif - uart_init_line(escc_serial_dev, speed); + uart_init_line(escc_serial_dev, speed, 1); return -1; }
@@ -518,7 +518,7 @@ escc_add_channel(const char *path, const char *node, phys_addr_t addr, fword("finish-device");
uart_init_line((unsigned char*)addr + offset + reg_offsets[legacy][index][0], - CONFIG_SERIAL_SPEED); + CONFIG_SERIAL_SPEED, index); }
void
According to the ESCC datasheet all register values are undetermined until an explicit reset command is sent. This is required to fix an issue with QEMU's ESCC device to ensure that the registers are set to default values if the default power-on values are changed.
Signed-off-by: Mark Cave-Ayland mark.cave-ayland@ilande.co.uk --- drivers/escc.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/escc.c b/drivers/escc.c index 4da8917..0f0d43a 100644 --- a/drivers/escc.c +++ b/drivers/escc.c @@ -46,6 +46,9 @@ static volatile unsigned char *escc_serial_dev; #define Tx8 0x60 /* Tx 8 bits/character */ #define DTR 0x80 /* DTR */
+/* Write Register 9 */ +#define SW_CHAN_RESET_B 0x40 /* Software reset channel B */ + /* Write Register 14 (Misc control bits) */ #define BRENAB 1 /* Baud rate generator enable */ #define BRSRC 2 /* Baud rate generator source */ @@ -80,6 +83,9 @@ static void escc_uart_port_putchar(uintptr_t port, unsigned char c)
static void uart_init_line(volatile unsigned char *port, unsigned long baud, int index) { + CTRL(port) = 9; // reg 9 + CTRL(port) = SW_CHAN_RESET_B << index; + CTRL(port) = 4; // reg 4 CTRL(port) = SB1 | X16CLK; // no parity, async, 1 stop bit, 16x // clock
On 02/09/2021 10:33, Mark Cave-Ayland wrote:
An upcoming change to QEMU's ESCC device reset mechanism exposed a bug that OpenBIOS's ESCC driver doesn't actually reset the port before attempting to configure it. Whilst this has no effect for now, once the QEMU ESCC changes have been merged (which implement the reset as documented in the datasheet), this port reset must be sent so that the registers are set to their default values after power-on.
Signed-off-by: Mark Cave-Ayland mark.cave-ayland@ilande.co.uk
Mark Cave-Ayland (2): escc: add port index to uart_init_line() escc: send software reset command before configuring the port
drivers/escc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
Applied to master.
ATB,
Mark.