Log_bufs

[James V Hendricks]

OK.  Another snapshot.  What worries me is the per-cpu timeslice cutoff
being listed as 0 usecs.  The 'kernel bug' means that either the APIC is
not on still or that we don't set boot_cpu_id correctly; the
line is:
        if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id)
                BUG();

Furthermore, if I skip the check, I get the following message:

APIC error interrupt on CPU#0, should never happen..
... APIC ESR0: 00000080.
... APIC ESR1: 00000080.
... bit 7: Illegal Register Address..
APIC error interrupt on CPU#0, should never happen..
... APIC ESR0: 00000080.
... APIC ESR1: 00000080.
... bit 7: Illegal Register Address..
APIC error interrupt on CPU#0, should never happen..
... APIC ESR0: 00000080.
... APIC ESR1: 00000080.
... bit 7: Illegal

So here is where SMP boot is at now:

Linux version 2.3.99-pre5 (rminnich@mini) (gcc version egcs-2.91.66 19990314/Linux (egcs-1.1.2 release)) #57 SMP Mon Jun 19 17:40:30 MDT 2000.
initially ALT_MEM_K is 0xf800, EXT_MEM_K is 0x3c00, E820_MAP_NR is 0x0.
initially command line is root=/dev/hda1 ide0=reset.
ALT_MEM_K is 0xf800, EXT_MEM_K is 0x3c00, E820_MAP_NR is 0x0.
Scan SMP from c0000000 for 1024 bytes..
found SMP MP-table at 00000000.
hm, page 00000000 reserved twice..
On node 0 totalpages: 16128.
zone(0): 4096 pages..
zone(1): 12032 pages..
zone(2): 0 pages..
Intel MultiProcessor Specification v1.4.
    Virtual Wire compatibility mode..
Default MP configuration #5.
Bus #0 is ISA.
Bus #1 is PCI.
Processors: 2.
mapped APIC to ffffe000 (fee00000).
mapped IOAPIC to ffffd000 (fec00000).
Initializing CPU#0.
Detected 497440714 Hz processor..
ide_setup: ide0=reset.
Console: colour VGA+ 80x25.
Calibrating delay loop... 989.59 BogoMIPS.
Memory: 61356k/64512k available (898k kernel code, 2768k reserved, 96k data, 84k init, 0k highmem).
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes).
Page-cache hash table entries: 16384 (order: 4, 65536 bytes).
Pentium-III serial number disabled..
Checking 386/387 coupling... OK, FPU using exception 16 error reporting..
Checking 'hlt' instruction... OK..
POSIX conformance testing by UNIFIX.
mtrr: v1.36 (20000221) Richard Gooch ([e-mail]).
Pentium-III serial number disabled..
CPU0: Intel Pentium III (Katmai) stepping 03.
per-CPU timeslice cutoff: 0.00 usecs..
Getting VERSION: 40011.
Getting VERSION: 40011.
Getting LVT0: 700.
Getting LVT1: 400.
enabled ExtINT on CPU#0.
ESR value before enabling vector: 00000000.
ESR value after enabling vector: 00000000.
kernel BUG at smpboot.c:864!

- James

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[Maciej W. Rozycki]

On Tue, 20 Jun 2000, James V Hendricks wrote:
> OK.  Another snapshot.  What worries me is the per-cpu timeslice cutoff
> being listed as 0 usecs.  The 'kernel bug' means that either the APIC is

That's probably because the CPU reports zero as its cache size.  I
wouldn't worry for now (but check you set up MSRs right).
> not on still or that we don't set boot_cpu_id correctly; the
> line is:
>         if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id)
>                 BUG();

I am pretty sure handling of default configurations was still broken for
2.3.99-pre5.  This code would trigger if you booted on CPU#1 on such a
system, for example.  Why wouldn't you upgrade to the current kernel?  I
have fixed this recently.