[PATCH] pci: enable io/memory unconditionally

[Michael S. Tsirkin]

VGA adapters need to claim memory and i/o
transactions even if they do not have any
i/o or memory bars. E.g. PCI spec, page 297,
gives an example of such a device:

Programming interface 0000 0000b
    VGA-compatible controller. Memory
    addresses 0A 0000h through 0B
    FFFFh. I/O addresses 3B0h to 3BBh
    and 3C0h to 3DFh and all aliases of
    these addresses.

While bios could check for these devices and special-case them, it is
easier to fix this by enabling i/o and memory space unconditionally:
devices that do not support it will just ignore this setting.

Signed-off-by: Michael S. Tsirkin

---

Pls Cc me on responses, I'm not on the list.
Thanks!

Index: drivers/pci.c
===================================================================
--- drivers/pci.c	(revision 641)
+++ drivers/pci.c	(working copy)
@@ -732,10 +732,6 @@
                 base = *io_base;
                 min_align = 1 << 7;
                 amask = 0x00000001;
-                pci_config_write16(addr, PCI_COMMAND,
-                                   pci_config_read16(addr,
-                                                     PCI_COMMAND) |
-                                   PCI_COMMAND_IO);
         } else {
                 /* Memory Space */
                 base = *mem_base;
@@ -744,10 +740,6 @@
                 if (reg == 6) {
                         smask |= 1; /* ROM */
                 }
-                pci_config_write16(addr, PCI_COMMAND,
-                                   pci_config_read16(addr,
-                                                     PCI_COMMAND) |
-                                   PCI_COMMAND_MEMORY);
         }
         *p_omask = smask & amask;
         smask &= ~amask;
@@ -788,6 +780,7 @@

{
         uint32_t omask;
+        uint16_t cmd;
         int reg;
         pci_addr config_addr;

@@ -807,6 +800,9 @@
                 ob_pci_configure_bar(addr, config, reg, config_addr,
                                      &omask, mem_base, io_base);
         }
+        cmd = pci_config_read16(addr, PCI_COMMAND);
+        cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
+        pci_config_write16(addr, PCI_COMMAND, cmd);
 }

static void ob_scan_pci_bus(int bus, unsigned long *mem_base,

[Laurent Vivier]

Le mercredi 09 décembre 2009 à 17:53 +0200, Michael S. Tsirkin a écrit :
> VGA adapters need to claim memory and i/o
> transactions even if they do not have any
> i/o or memory bars. E.g. PCI spec, page 297,
> gives an example of such a device:
> Programming interface 0000 0000b
> VGA-compatible controller. Memory
> addresses 0A 0000h through 0B
> FFFFh. I/O addresses 3B0h to 3BBh
> and 3C0h to 3DFh and all aliases of
> these addresses.
>
> While bios could check for these devices and special-case them, it is
> easier to fix this by enabling i/o and memory space unconditionally:
> devices that do not support it will just ignore this setting.
>
> Signed-off-by: Michael S. Tsirkin

Applied, but could you give me an use case where previous behavior
breaks something ?

Regards,
Laurent

[Michael S. Tsirkin]

On Thu, Dec 10, 2009 at 01:20:23AM +0100, Laurent Vivier wrote:
> Le mercredi 09 décembre 2009 à 17:53 +0200, Michael S. Tsirkin a écrit :
> > VGA adapters need to claim memory and i/o
> > transactions even if they do not have any
> > i/o or memory bars. E.g. PCI spec, page 297,
> > gives an example of such a device:
> > Programming interface 0000 0000b
> > VGA-compatible controller. Memory
> > addresses 0A 0000h through 0B
> > FFFFh. I/O addresses 3B0h to 3BBh
> > and 3C0h to 3DFh and all aliases of
> > these addresses.
> >
> > While bios could check for these devices and special-case them, it is
> > easier to fix this by enabling i/o and memory space unconditionally:
> > devices that do not support it will just ignore this setting.
> >
> > Signed-off-by: Michael S. Tsirkin
>
> Applied, but could you give me an use case where previous behavior
> breaks something ?
>
> Regards,
> Laurent

qemu uses openbios and implements cirrus vga emulation,
which has this device class and no IO bars.
>