Re: [OpenBIOS] [coreboot] OpenBIOS SVN r416 breaks coreboot-v3

[Mark Cave-Ayland]

      Blue Swirl wrote:

  Would this patch fix the problem?
Yes. Applying this patch to OpenBIOS trunk allows QEMU SVN to run a 
coreboot-v3/openbios SVN payload correctly without a panic.


Many thanks,

Mark.

-- 
Mark Cave-Ayland
Sirius Corporation - The Open Source Experts
http://www.siriusit.co.uk
T: [phone]

[coreboot] OpenBIOS SVN r416 breaks coreboot-v3

[Blue Swirl]

      On 2/2/09, Mark Cave-Ayland <mark.cave-ayland(a)siriusit.co.uk> wrote:
  Blue Swirl wrote:


  Would this patch fix the problem?
  Yes. Applying this patch to OpenBIOS trunk allows QEMU SVN to run a
 coreboot-v3/openbios SVN payload correctly without a panic.
Thanks for testing, I applied the patch. Does this mean that QEMU SVN
(without any patches) can boot current Coreboot with OpenBIOS?

[coreboot] OpenBIOS SVN r416 breaks coreboot-v3

[Mark Cave-Ayland]

      Blue Swirl wrote:

  Thanks for testing, I applied the patch. Does this
mean that QEMU SVN
 (without any patches) can boot current Coreboot with OpenBIOS?
Not quite. Just to make sure, I updated my SVN versions of coreboot-v3, 
openbios and qemu and I still get the same panic on qemu-system-x86_64.

I think I can see what the problem is though: looking at your patch, 
io_base for x86_64 is set to 0x1000 but then pci.c:ob_pci_init still 
does this:

io_base = arch->io_base + 0x400;

Hence io_base is now being set to 0x1400 instead of 0x1000 which is 
probably causing the error. If the io_base for all architectures is now 
being set in the pci_arch_t structure, then in theory this line should 
be deleted. I did take a look at the PPC code, but wasn't sure what the 
calculated offset should be to confirm this.


ATB,

Mark.

-- 
Mark Cave-Ayland
Sirius Corporation - The Open Source Experts
http://www.siriusit.co.uk
T: [phone]

[coreboot] OpenBIOS SVN r416 breaks coreboot-v3

[Mark Cave-Ayland]

      Blue Swirl wrote:

  Thanks for testing, I applied the patch. Does this
mean that QEMU SVN
 (without any patches) can boot current Coreboot with OpenBIOS?
Just a FYI: this still doesn't work with latest SVN 
Qemu/OpenBIOS/coreboot-v3 on x86_64. By adding some debug output in 
drivers/pci.c, I can see that io_base is now set to 0x1400 which must 
now clash with something else in Qemu.

Unfortunately I think that the reason I initially reported this worked 
was due to a local merge which I didn't notice in my local copy. 
However, I can get this to boot if I change the following line in 
drivers/pci.c from:

io_base = arch->io_base + 0x400;

to:

io_base = arch->io_base;

This drops io_base back down to 0x1000 and this seems good enough to 
allow Qemu to boot. So if this is required for PPC, perhaps one of the 
addresses in either the x86/PPC PCI address structure is wrong?


ATB,

Mark.

-- 
Mark Cave-Ayland
Sirius Corporation - The Open Source Experts
http://www.siriusit.co.uk
T: [phone]

[coreboot] OpenBIOS SVN r416 breaks coreboot-v3

[Blue Swirl]

      On 2/12/09, Mark Cave-Ayland <mark.cave-ayland(a)siriusit.co.uk> wrote:
  Blue Swirl wrote:


  Thanks for testing, I applied the patch. Does
this mean that QEMU SVN
 (without any patches) can boot current Coreboot with OpenBIOS?
  Just a FYI: this still doesn't work with latest SVN
 Qemu/OpenBIOS/coreboot-v3 on x86_64. By adding some debug output in
 drivers/pci.c, I can see that io_base is now set to 0x1400 which must now
 clash with something else in Qemu.

  Unfortunately I think that the reason I initially reported this worked was
 due to a local merge which I didn't notice in my local copy. However, I can
 get this to boot if I change the following line in drivers/pci.c from:

  io_base = arch->io_base + 0x400;

  to:

  io_base = arch->io_base;

  This drops io_base back down to 0x1000 and this seems good enough to allow
 Qemu to boot. So if this is required for PPC, perhaps one of the addresses
 in either the x86/PPC PCI address structure is wrong?
I'll try this change and test if it's OK for PPC.