Hi, Guys does anyone know how I can test the USB controller on the intel 82371FB (PIIX3) chipset or know of a web site that has source code in assembly language that will acomplish this.
//Ross
Ross wrote:
Hi, Guys does anyone know how I can test the USB controller on the intel 82371FB (PIIX3) chipset or know of a web site that has source code in assembly language that will acomplish this.
//Ross
you might find some documentations from http://developer.intel.com
On Tue, 15 Feb 2000, Petazzoni Thomas wrote:
you might find some documentations from http://developer.intel.com
or you might not :-)
seriously, they charged me $25 to tell me they won't tell me.
blah.
ron
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Did you check out the latest Linux Kernel snapshots they have a big USB support project going on , Added all that PNP, USB asks for ???
"Ronald G. Minnich" wrote ...
On Tue, 15 Feb 2000, Petazzoni Thomas wrote:
you might find some documentations from http://developer.intel.com
or you might not :-)
seriously, they charged me $25 to tell me they won't tell me.
blah.
ron
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Hi, Guys does anyone know how I can test the USB controller on the intel 82371FB (PIIX3) chipset or know of a web site that has source
Figured I should pass this on: the guy who wrote USB for NetBSD (Lennart Augusston(sp?)) told me that PIIX3 USB hardware is very buggy. It might not be worth your time to work on it.
Todd Whitesel toddpw @ best.com - To unsubscribe: send mail to majordomo@freiburg.linux.de with 'unsubscribe openbios' in the body of the message
What is the current status with openbios?
Have you got all that VGA stuff sorted out? Is linux bootable yet? what can i do to help? --- i dont quite know enough assembler / C to add support for my own motherboard yet :) -- will openbios work with an AMD K5 or K6 CPU? sorry for so many questions. thanks edwin
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On Thu, 16 Mar 2000, Edwin Rhodes wrote:
What is the current status with openbios?
not sure. I can tell you the status of linuxbios.
Have you got all that VGA stuff sorted out?
no. Haven't had time.
Is linux bootable yet?
well, depends on what you mean. Yes, I'm booting it fine. BUT: interrupts from the timer are not happening, and that is crucial to further progress. I need to know the magic to get the APIC and timer ints to go. (oh yeah I just got back from 10 days away, so things slowed down)
what can i do to help? --- i dont quite know enough assembler / C to add support for my own motherboard yet :)
Figure out how to get ints turned on. This is the current big problem.
-- will openbios work with an AMD K5 or K6 CPU?
It should work just fine.
Other status is that SiS is now an active supporter, they have sent me bios source and have offered hardware and support. Their specific interest is linuxbios.
sorry for so many questions.
I am grateful for these questions and your offer of support. Don't be sorry!
thanks very much
ron
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i know this may sound real stupid, but have you checked out Ralf Brown's Interrupt List? edwin
----- Original Message ----- From: Ronald G. Minnich rminnich@lanl.gov To: openbios@elvis.informatik.uni-freiburg.de Sent: Thursday, March 16, 2000 12:49 PM Subject: Re: [OpenBIOS] Re: Status
On Thu, 16 Mar 2000, Edwin Rhodes wrote:
What is the current status with openbios?
not sure. I can tell you the status of linuxbios.
Have you got all that VGA stuff sorted out?
no. Haven't had time.
Is linux bootable yet?
well, depends on what you mean. Yes, I'm booting it fine. BUT: interrupts from the timer are not happening, and that is crucial to further progress. I need to know the magic to get the APIC and timer ints to go. (oh yeah I just got back from 10 days away, so things slowed down)
what can i do to help? --- i dont quite know enough assembler / C to add support for my own motherboard yet :)
Figure out how to get ints turned on. This is the current big problem.
-- will openbios work with an AMD K5 or K6 CPU?
It should work just fine.
Other status is that SiS is now an active supporter, they have sent me bios source and have offered hardware and support. Their specific interest is linuxbios.
sorry for so many questions.
I am grateful for these questions and your offer of support. Don't be sorry!
thanks very much
ron
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On Thu, 16 Mar 2000, Edwin Rhodes wrote:
i know this may sound real stupid, but have you checked out Ralf Brown's Interrupt List?
Hmm, tell me more. I think I have, but I'm not sure that Ralf tells you how to init the cold hardware to enable timer interrupts.
ron
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"Ronald G. Minnich" wrote: ...
Is linux bootable yet?
well, depends on what you mean. Yes, I'm booting it fine. BUT: interrupts from the timer are not happening, and that is crucial to further progress. I need to know the magic to get the APIC and timer ints to go. (oh yeah I just got back from 10 days away, so things slowed down).
There is APICBASE MSR int P6 processors,which should be initialized before first interrupt occur. Here is simplest working code:
xor eax, eax xor edx, edx mov ecx, 0x1b wrmsr
I hope this will work for you.
Konstantin
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On Fri, 17 Mar 2000, Konstantin Zhidkov wrote:
There is APICBASE MSR int P6 processors,which should be initialized before first interrupt occur. Here is simplest working code:
xor eax, eax xor edx, edx mov ecx, 0x1b wrmsr
I will try this. Can you tell us more about what is going on with this operation? I don't have good enough documentation I think.
Thanks
ron
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The APICBASE MSR is described in Intel Architecture Software Developer's Manual,Volume 3, which is available from developer.intel.com. This MSR controls CPU's local APIC, which should be disabled, if we coming to use 8259. Correct code for this is:
mov ecx, 0x1b ; APICBASE MSR rdmsr and eax, ~0x800 ; clear APIC Global Enable Bit wrmsr
I added this code as I686_INIT macro in boot/boot16/ia32.inc, and timer ticks counter become working on my i810 MB. Of course, this fix will not work in multiprocessor environment -- in such case we have to perform full APIC initialization procedure.
Sorry for bad english.
Konstantin
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On Fri, 17 Mar 2000, Konstantin Zhidkov wrote:
There is APICBASE MSR int P6 processors,which should be initialized before first interrupt occur. Here is simplest working code:
xor eax, eax xor edx, edx mov ecx, 0x1b wrmsr
This did the trick for me, BTW. Interrupts happened, Jiffies incremented, calibrate_delay() finished ...
ron
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y0,
Does anyone on this project have access to a rom burner and a pile of roms? If I were to write a ROM, who would I send it to for burning?
we should most certainly select a standard hardware configuration/chipset and develop a single bios for that and then specify a standard firmware interface that we can port to other platforms. =)
I have a 386DX (fully functional) and a 386SX/EGA (which can be activated for a modest ammount of money). Also a 486 class system will soon become available, it will require $80 for a new processor... I reccomend an older platform because it would be far simpler to write a firmawer for it. and it still has all the important features that we need. =) Anyway... This project can't get anywere without the neccessary toolz. =(
I would most eagerly like to discuss how this project should be arranged.
On Thu, 16 Mar 2000, Alan Grimes wrote:
Does anyone on this project have access to a rom burner and a pile of roms?
You don't need them on modern motherboards.
we should most certainly select a standard hardware configuration/chipset and develop a single bios for that and then specify a standard firmware interface that we can port to other platforms. =)
we've got multiple folks doing multiple chipsets. I think it's workable: in the end we all call main()
I just can't see reviving hardware nobody uses any more to do openbios. It just won't have relevance, and the ROMs are *way* too small.
ron
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-
Alan Grimes -
Boaz Harrosh -
Edwin Rhodes -
Konstantin Zhidkov -
Petazzoni Thomas -
Ronald G. Minnich -
Ross -
Todd Whitesel