As done for prom_arg_t, introduce POSIX-like PRI* macros for [u]cell.
Signed-off-by: Andreas Färber andreas.faerber@web.de --- include/arch/amd64/types.h | 6 +++++- include/arch/ia64/types.h | 5 +++++ include/arch/ppc/types.h | 12 ++++++++---- include/arch/sparc32/types.h | 12 ++++++++---- include/arch/sparc64/types.h | 12 ++++++++---- include/arch/x86/types.h | 12 ++++++++---- 6 files changed, 42 insertions(+), 17 deletions(-)
diff --git a/include/arch/amd64/types.h b/include/arch/amd64/types.h index 83fd3e1..74503b9 100644 --- a/include/arch/amd64/types.h +++ b/include/arch/amd64/types.h @@ -29,7 +29,11 @@ typedef uint64_t ucell; typedef __int128_t dcell; typedef __uint128_t ducell;
-#define FMT_ucellx "%016" PRIx64 +#define PRIdCELL PRId64 +#define PRIuCELL PRIu64 +#define PRIxCELL PRIx64 +#define PRIXCELL PRIX64 +#define FMT_ucellx "%016" PRIxCELL
typedef int64_t prom_arg_t; typedef uint64_t prom_uarg_t; diff --git a/include/arch/ia64/types.h b/include/arch/ia64/types.h index cb09cda..5334027 100644 --- a/include/arch/ia64/types.h +++ b/include/arch/ia64/types.h @@ -30,6 +30,11 @@ typedef uint64_t ucell; typedef __int128_t dcell; typedef __uint128_t ducell;
+#define PRIdCELL PRId64 +#define PRIuCELL PRIu64 +#define PRIxCELL PRIx64 +#define PRIXCELL PRIX64 + typedef int64_t prom_arg_t; typedef uint64_t prom_uarg_t;
diff --git a/include/arch/ppc/types.h b/include/arch/ppc/types.h index cb1cc28..cd71a62 100644 --- a/include/arch/ppc/types.h +++ b/include/arch/ppc/types.h @@ -55,10 +55,14 @@ typedef uint32_t ucell; typedef int64_t dcell; typedef uint64_t ducell;
-#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 +#define PRIdCELL PRId32 +#define PRIuCELL PRIu32 +#define PRIxCELL PRIx32 +#define PRIXCELL PRIX32 +#define FMT_cell "%" PRIdCELL +#define FMT_ucell "%" PRIuCELL +#define FMT_ucellx "%08" PRIxCELL +#define FMT_ucellX "%08" PRIXCELL
typedef int32_t prom_arg_t; typedef uint32_t prom_uarg_t; diff --git a/include/arch/sparc32/types.h b/include/arch/sparc32/types.h index f765874..363650e 100644 --- a/include/arch/sparc32/types.h +++ b/include/arch/sparc32/types.h @@ -52,10 +52,14 @@ typedef uint32_t ucell; typedef long long dcell; typedef unsigned long long ducell;
-#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 +#define PRIdCELL PRId32 +#define PRIuCELL PRIu32 +#define PRIxCELL PRIx32 +#define PRIXCELL PRIX32 +#define FMT_cell "%" PRIdCELL +#define FMT_ucell "%" PRIuCELL +#define FMT_ucellx "%08" PRIxCELL +#define FMT_ucellX "%08" PRIXCELL
typedef int32_t prom_arg_t; typedef uint32_t prom_uarg_t; diff --git a/include/arch/sparc64/types.h b/include/arch/sparc64/types.h index 8784331..268b78a 100644 --- a/include/arch/sparc64/types.h +++ b/include/arch/sparc64/types.h @@ -48,10 +48,14 @@ typedef uint64_t phys_addr_t; typedef int64_t cell; typedef uint64_t ucell;
-#define FMT_cell "%" PRId64 -#define FMT_ucell "%" PRIu64 -#define FMT_ucellx "%016" PRIx64 -#define FMT_ucellX "%016" PRIX64 +#define PRIdCELL PRId64 +#define PRIuCELL PRIu64 +#define PRIxCELL PRIx64 +#define PRIXCELL PRIX64 +#define FMT_cell "%" PRIdCELL +#define FMT_ucell "%" PRIuCELL +#define FMT_ucellx "%016" PRIxCELL +#define FMT_ucellX "%016" PRIXCELL
typedef int64_t prom_arg_t; typedef uint64_t prom_uarg_t; diff --git a/include/arch/x86/types.h b/include/arch/x86/types.h index e06ab9b..7ea1831 100644 --- a/include/arch/x86/types.h +++ b/include/arch/x86/types.h @@ -30,10 +30,14 @@ typedef uint32_t ucell; typedef int64_t dcell; typedef uint64_t ducell;
-#define FMT_cell "%" PRId32 -#define FMT_ucell "%" PRIu32 -#define FMT_ucellx "%08" PRIx32 -#define FMT_ucellX "%08" PRIX32 +#define PRIdCELL PRId32 +#define PRIuCELL PRIu32 +#define PRIxCELL PRIx32 +#define PRIXCELL PRIX32 +#define FMT_cell "%" PRIdCELL +#define FMT_ucell "%" PRIuCELL +#define FMT_ucellx "%08" PRIxCELL +#define FMT_ucellX "%08" PRIXCELL
typedef int32_t prom_arg_t; typedef uint32_t prom_uarg_t;
To avoid some of the cell size vs. pointer size issues, use 64-bit cells on ppc64. Suggested by Segher.
This involves handling lack of 128-bit type and compiling 64-bit libgcc parts, copied from sparc64.
Hopefully fixes compilation on 64-bit host, too.
Cc: Segher Boessenkool segher@kernel.crashing.org Cc: Alexander Graf agraf@suse.de Cc: Blue Swirl blauwirbel@gmail.com Cc: Kenneth Salerno kennethsalerno@yahoo.com --- Unfortunately this appears to introduce a regression for Debian, no longer getting to the Yaboot prompt.
arch/ppc/qemu/kernel.c | 4 +- config/scripts/switch-arch | 1 + drivers/macio.c | 4 +- include/arch/ppc/types.h | 48 ++++++++++++++++++++++++++++++++++++------- include/kernel/stack.h | 4 +- libgcc/build.xml | 7 ++++++ 6 files changed, 54 insertions(+), 14 deletions(-)
diff --git a/arch/ppc/qemu/kernel.c b/arch/ppc/qemu/kernel.c index b26fba5..732bca4 100644 --- a/arch/ppc/qemu/kernel.c +++ b/arch/ppc/qemu/kernel.c @@ -55,10 +55,10 @@ forth_segv_handler( char *segv_addr ) addr = *(ucell *)cell2pointer(PC);
printk("panic: segmentation violation at 0x%p\n", segv_addr); - printk("dict=0x%p here=0x%p(dict+0x%x) pc=0x%x(dict+0x%x)\n", + printk("dict=0x%p here=0x%p(dict+0x" FMT_ucellx ") pc=0x" FMT_ucellx "(dict+0x" FMT_ucellx ")\n", dict, (char*)dict + dicthead, dicthead, PC, PC - pointer2cell(dict)); - printk("dstackcnt=%d rstackcnt=%d instruction=%x\n", + printk("dstackcnt=%d rstackcnt=%d instruction=" FMT_ucellx "\n", dstackcnt, rstackcnt, addr);
#ifdef DEBUG_DSTACK diff --git a/config/scripts/switch-arch b/config/scripts/switch-arch index 1e630da..e2bfeed 100755 --- a/config/scripts/switch-arch +++ b/config/scripts/switch-arch @@ -76,6 +76,7 @@ crosscflags()
if test "$target" = "sparc64" -o "$target" = "ia64" \ -o "$target" = "amd64" -o "$target" = "x86_64" \ + -o "$target" = "powerpc64" -o "$target" = "ppc64" \ -o "$target" = "alpha"; then if test "$host" = "x86"; then cflags="$cflags -DNEED_FAKE_INT128_T" diff --git a/drivers/macio.c b/drivers/macio.c index 2baf295..c2090fc 100644 --- a/drivers/macio.c +++ b/drivers/macio.c @@ -223,11 +223,11 @@ ob_macio_decode_unit(void *private) static void ob_macio_encode_unit(void *private) { - char buf[8]; + char buf[16];
ucell addr = POP();
- snprintf(buf, sizeof(buf), "%x", addr); + snprintf(buf, sizeof(buf), "%" PRIxCELL, addr);
push_str(buf); } diff --git a/include/arch/ppc/types.h b/include/arch/ppc/types.h index cd71a62..001c82d 100644 --- a/include/arch/ppc/types.h +++ b/include/arch/ppc/types.h @@ -50,20 +50,54 @@ typedef uint32_t phys_addr_t;
/* cell based types */
-typedef int32_t cell; -typedef uint32_t ucell; -typedef int64_t dcell; -typedef uint64_t ducell; +#ifdef CONFIG_PPC64 + +typedef int64_t cell; +typedef uint64_t ucell; + +#ifdef NEED_FAKE_INT128_T +typedef struct { + uint64_t hi; + uint64_t lo; +} blob_128_t; + +typedef blob_128_t dcell; +typedef blob_128_t ducell; +#else +typedef __int128_t dcell; +typedef __uint128_t ducell; +#endif + +#define PRIdCELL PRId64 +#define PRIuCELL PRIu64 +#define PRIxCELL PRIx64 +#define PRIXCELL PRIX64 +#define FMT_ucellx "%08" PRIxCELL +#define FMT_ucellX "%08" PRIXCELL + +#define BITS 64 + +#else + +typedef int32_t cell; +typedef uint32_t ucell; +typedef int64_t dcell; +typedef uint64_t ducell;
#define PRIdCELL PRId32 #define PRIuCELL PRIu32 #define PRIxCELL PRIx32 #define PRIXCELL PRIX32 -#define FMT_cell "%" PRIdCELL -#define FMT_ucell "%" PRIuCELL #define FMT_ucellx "%08" PRIxCELL #define FMT_ucellX "%08" PRIXCELL
+#define BITS 32 + +#endif + +#define FMT_cell "%" PRIdCELL +#define FMT_ucell "%" PRIuCELL + typedef int32_t prom_arg_t; typedef uint32_t prom_uarg_t;
@@ -81,8 +115,6 @@ typedef uint32_t prom_uarg_t; #define bitspercell (sizeof(cell)<<3) #define bitsperdcell (sizeof(dcell)<<3)
-#define BITS 32 - /* size named types */
typedef unsigned char u8; diff --git a/include/kernel/stack.h b/include/kernel/stack.h index 5edfc5c..732268d 100644 --- a/include/kernel/stack.h +++ b/include/kernel/stack.h @@ -34,12 +34,12 @@ typedef ucell phandle_t;
static inline ucell pointer2cell(const void* x) { - return (ucell)(uintptr_t)x; + return (ucell)x; }
static inline void* cell2pointer(ucell x) { - return (void*)(uintptr_t)x; + return (void*)x; }
#endif diff --git a/libgcc/build.xml b/libgcc/build.xml index 1b7724c..85c99ee 100644 --- a/libgcc/build.xml +++ b/libgcc/build.xml @@ -19,6 +19,13 @@ <object source="__umodti3.c" condition="SPARC64"/> <object source="multi3.c" condition="SPARC64"/> <object source="__negti2.c" condition="SPARC64"/> + + <object source="__divti3.c" condition="PPC64"/> + <object source="__udivti3.c" condition="PPC64"/> + <object source="__udivmodti4.c" condition="PPC64"/> + <object source="__umodti3.c" condition="PPC64"/> + <object source="multi3.c" condition="PPC64"/> + <object source="__negti2.c" condition="PPC64"/> </library>
</build>
--- Without this patch, I get a 0x700 Program Exception when booting from AIX CD. With this patch, it proceeds further and I get an identical hang on AIX boot with both 32-bit and 64-bit cell size.
config/examples/ppc64_config.xml | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/config/examples/ppc64_config.xml b/config/examples/ppc64_config.xml index 5f79c21..1c3f8f3 100644 --- a/config/examples/ppc64_config.xml +++ b/config/examples/ppc64_config.xml @@ -39,7 +39,7 @@ <option name="CONFIG_PC_PARTS" type="boolean" value="true"/> <option name="CONFIG_HFS" type="boolean" value="true"/> <option name="CONFIG_HFSP" type="boolean" value="true"/> - <option name="CONFIG_ISO9660" type="boolean" value="true"/> + <option name="CONFIG_ISO9660" type="boolean" value="false"/> <option name="CONFIG_EXT2" type="boolean" value="true"/> <option name="CONFIG_GRUBFS" type="boolean" value="true"/> <option name="CONFIG_FSYS_EXT2FS" type="boolean" value="false"/> @@ -49,7 +49,7 @@ <option name="CONFIG_FSYS_REISERFS" type="boolean" value="false"/> <option name="CONFIG_FSYS_XFS" type="boolean" value="false"/> <option name="CONFIG_FSYS_UFS" type="boolean" value="false"/> - <option name="CONFIG_FSYS_ISO9660" type="boolean" value="false"/> + <option name="CONFIG_FSYS_ISO9660" type="boolean" value="true"/> <option name="CONFIG_FSYS_FFS" type="boolean" value="false"/> <option name="CONFIG_FSYS_VSTAFS" type="boolean" value="false"/> <option name="CONFIG_FSYS_NTFS" type="boolean" value="false"/>
On 28.05.2011, at 13:37, Andreas Färber wrote:
I thought ppc64 OpenFirmware uses 32bit cells?
Alex
Am 28.05.2011 um 13:42 schrieb Alexander Graf:
That's what I thought, too... but Segher said otherwise in January, and Tarl said the internal cell size (that I'm trying to change here) were different from the guest-visible 32-bit cell size. Through the use of prog_arg_t the CIF is supposed to remain 32-bit.
Andreas
On 28.05.2011, at 13:48, Andreas Färber wrote:
Is there an easy way to find out the cell size? I can check on some machines then.
Alex
Is there an easy way to find out the cell size? I can check on some machines then.
On the Forth prompt:
-1 u.
which prints "ffffffff" or "ffffffffffffffff".
Or, "1 cells ." or "0 cell+ ." or "/n ." or a million other things :-)
Segher
On 28.05.2011, at 13:48, Andreas Färber wrote:
Oh, too quick in replying :). You're changing the "cell" type which is used all over the place with sizeof() to figure out the cell size of guest visible (device tree) fields. I don't see how it could not be guest exposed.
Alex
Am 28.05.2011 um 13:50 schrieb Alexander Graf:
So you're saying...? Do you oppose Segher? Or do you see a better way of doing this? :) Blue and Kenneth were having compilation issues due to pointer size != cell size, and I hoped this might solve the iso9660 issue (which it doesn't, unless I have missed some change).
Andreas
On 28.05.2011, at 14:03, Andreas Färber wrote:
I'm saying that changing sizeof(cell) will change the device tree:
drivers/escc.c:escc_add_channel
[...] cell props[2]; [...] props[0] = IO_ESCC_OFFSET + offset * 0x20; props[1] = 0x00000020; set_property(dnode, "reg", (char *)&props, 2 * sizeof(cell));
So while the guest expects reg to be 2 32-bit numbers, it suddenly gets 4 32-bit numbers that don't make sense. IIUC to the guest, any DT property is nothing more than a stream of bytes.
Alex
That code seems to fail for little-endian systems as well. I recommend you use C accessor functions similar to the Forth words to build (and read) properties, they are very convenient and easy to use (encode-int and friends).
Segher
Fix those bugs then. Those fields in the device tree are four bytes per integer, #address-cells etc. integers per item. The device tree does not expose the cell size of the underlying system anywhere.
Segher
There are (at least) three different things here:
1) The Forth cell size. Since a normal pointer fits a cell, it is very inconvenient and restrictive to use 32-bit cells; most obvious is that you have to have everything you address in the low 4GB of address space (which is doable in virtual mode, however many workarounds you need; but totally forget about it in real mode);
2) The device tree 32-bit integer size. Those are 32-bit integers, not cells, although they are often called cells. They are big-endian always. They are not aligned at all, you should not assume you can access them with a single load/store, always go through some load/store-unaligned wrapper;
3) The client interface item size. You can have a 32-bit client interface, or a 64-bit client interface, or both. Linux uses the 32-bit client interface always.
Segher
On 2011-May-28 07:48 , Andreas Färber wrote:
If I recall correctly what I said, the device-tree property cell size is _always_ 32-bit, regardless of what the internal cell size is.
On SPARCs, we have three things we refer to as cell size: - The internal cell size (defined by /n), 64 bits - The device tree cell size, defined by 1275 to always be 32 bits - The cell size presented to FCode version 2 drivers (plug-in cards), which is emulated to be 32 bits.
If I recall correctly what I said, the device-tree property cell size is _always_ 32-bit, regardless of what the internal cell size is.
Don't call that "cell size" :-) The OF standard calls it "a 32-bit integer as encoded by encode-int".
Do you mean the size of (lit) here? That's 32-bit signed always, yes. The FCode cell size is the same as the Forth cell size. Most FCode programs written for 32-bit systems work as-is on 64-bit systems; some need some fixes. Programs that need 64-bit numbers (for example, for devices that have 64-bit registers) need some careful coding.
Segher
On 2011-May-28 14:30 , Segher Boessenkool wrote:
There are places where 1275 refers to "cells" in the properties, where it _means_ 32-bit quantities. It's an unfortunate terminology problem.
The FCode version 2 interpreter on SPARCs emulates 32-bit FCode by making various operations 32-bit specific. E.g., "0<>" tests only the low-order 32 bits of a cell. The intent was to ensure that 32-bit FCode programs did _not_ need fixes (because we couldn't afford the hassle of forcing everyone to fix them). That has resulted in considerable pain over the years as FCode programs and Forth don't always run the same. When doing the iSCSI work and porting the SHA-1 algorithm from FCode to Forth, for example, I found a lot of code that _knew_ it was running on 32-bit and had to be fixed to run in 64-bit conditions.
On Sat, May 28, 2011 at 2:37 PM, Andreas Färber andreas.faerber@web.de wrote:
As done for prom_arg_t, introduce POSIX-like PRI* macros for [u]cell.
Looks OK.
-
Alexander Graf -
Andreas Färber -
Blue Swirl -
Segher Boessenkool -
Tarl Neustaedter