Since QEMU 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (Clean up PowerPC SLB handling code) we never got to the ppc64 OpenBIOS banner.
According to Alex' debugging this is due to the Kp bit being set.
The code was supposed to be a 1:1 translation of the old mtsrin code, which did not set Kp bit. So don't set Kp bit with slbmte.
Cc: Alexander Graf agraf@suse.de Cc: David Gibson david@gibson.dropbear.id.au Signed-off-by: Andreas Färber andreas.faerber@web.de --- arch/ppc/qemu/ofmem.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/qemu/ofmem.c b/arch/ppc/qemu/ofmem.c index 297e685..514d129 100644 --- a/arch/ppc/qemu/ofmem.c +++ b/arch/ppc/qemu/ofmem.c @@ -497,7 +497,7 @@ setup_mmu(unsigned long ramsize)
slbia(); /* Invalidate all SLBs except SLB 0 */ for (i = 0; i < 16; i++) { - unsigned long rs = ((0x400 + i) << 12) | (0x10 << 7); + unsigned long rs = ((0x400 + i) << 12) | (0x0 << 7); unsigned long rb = ((unsigned long)i << 28) | (1 << 27) | i; slbmte(rs, rb); }
On 21.05.2011, at 14:57, Andreas Färber wrote:
Since QEMU 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (Clean up PowerPC SLB handling code) we never got to the ppc64 OpenBIOS banner.
According to Alex' debugging this is due to the Kp bit being set.
The code was supposed to be a 1:1 translation of the old mtsrin code, which did not set Kp bit. So don't set Kp bit with slbmte.
Cc: Alexander Graf agraf@suse.de Cc: David Gibson david@gibson.dropbear.id.au Signed-off-by: Andreas Färber andreas.faerber@web.de
arch/ppc/qemu/ofmem.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/qemu/ofmem.c b/arch/ppc/qemu/ofmem.c index 297e685..514d129 100644 --- a/arch/ppc/qemu/ofmem.c +++ b/arch/ppc/qemu/ofmem.c @@ -497,7 +497,7 @@ setup_mmu(unsigned long ramsize)
slbia(); /* Invalidate all SLBs except SLB 0 */ for (i = 0; i < 16; i++) {
unsigned long rs = ((0x400 + i) << 12) | (0x10 << 7);
unsigned long rs = ((0x400 + i) << 12) | (0x0 << 7);
I find the y << 7 thing pretty unreadable anyways, so why not just drop it? If you feel like it, just define a few constants that allow you to set Kp and Ks:
agraf@lychee:/home/agraf/release/qemu> grep -n SLB_VSID target-ppc/cpu.h 391:#define SLB_VSID_SHIFT 12 392:#define SLB_VSID_SHIFT_1T 24 393:#define SLB_VSID_SSIZE_SHIFT 62 394:#define SLB_VSID_B 0xc000000000000000ULL 395:#define SLB_VSID_B_256M 0x0000000000000000ULL 396:#define SLB_VSID_B_1T 0x4000000000000000ULL 397:#define SLB_VSID_VSID 0x3FFFFFFFFFFFF000ULL 398:#define SLB_VSID_PTEM (SLB_VSID_B | SLB_VSID_VSID) 399:#define SLB_VSID_KS 0x0000000000000800ULL 400:#define SLB_VSID_KP 0x0000000000000400ULL 401:#define SLB_VSID_N 0x0000000000000200ULL /* no-execute */ 402:#define SLB_VSID_L 0x0000000000000100ULL 403:#define SLB_VSID_C 0x0000000000000080ULL /* class */ 404:#define SLB_VSID_LP 0x0000000000000030ULL 405:#define SLB_VSID_ATTR 0x0000000000000FFFULL
Just copy those, replace the << 12 by << SLB_VSID_SHIFT, and then this code will be a lot more readable :)
Alex
Since QEMU 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (Clean up PowerPC SLB handling code) we never got to the ppc64 OpenBIOS banner.
According to Alex' debugging this is due to the Kp bit being set.
The code was supposed to be a 1:1 translation of the old mtsrin code, which did not set Kp bit. So don't set Kp bit with slbmte.
Introduce a define for the shift, suggested by Alex.
Cc: Alexander Graf agraf@suse.de Signed-off-by: Andreas Färber andreas.faerber@web.de --- arch/ppc/qemu/ofmem.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/qemu/ofmem.c b/arch/ppc/qemu/ofmem.c index 297e685..1319389 100644 --- a/arch/ppc/qemu/ofmem.c +++ b/arch/ppc/qemu/ofmem.c @@ -25,6 +25,8 @@
#define BIT(n) (1U << (31 - (n)))
+#define SLB_VSID_SHIFT 12 + /* called from assembly */ extern void dsi_exception(void); extern void isi_exception(void); @@ -497,7 +499,7 @@ setup_mmu(unsigned long ramsize)
slbia(); /* Invalidate all SLBs except SLB 0 */ for (i = 0; i < 16; i++) { - unsigned long rs = ((0x400 + i) << 12) | (0x10 << 7); + unsigned long rs = (0x400 + i) << SLB_VSID_SHIFT; unsigned long rb = ((unsigned long)i << 28) | (1 << 27) | i; slbmte(rs, rb); }
On 22.05.2011, at 21:23, Andreas Färber wrote:
Since QEMU 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (Clean up PowerPC SLB handling code) we never got to the ppc64 OpenBIOS banner.
According to Alex' debugging this is due to the Kp bit being set.
The code was supposed to be a 1:1 translation of the old mtsrin code, which did not set Kp bit. So don't set Kp bit with slbmte.
Introduce a define for the shift, suggested by Alex.
Cc: Alexander Graf agraf@suse.de Signed-off-by: Andreas Färber andreas.faerber@web.de
Acked-by: Alexander Graf agraf@suse.de
Alex
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Alexander Graf -
Andreas Färber