To store a full 64-bit address we need two cells. This matches Apple's OpenFirmware on my G5.
Note that an enlarged #size-cells is not strictly needed and constitutes a difference between Apple and IBM firmware.
Cc: Alexander Graf agraf@suse.de Signed-off-by: Andreas Färber andreas.faerber@web.de --- arch/ppc/qemu/init.c | 4 +++- arch/ppc/qemu/tree.fs | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index d17c843..1a2d453 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -734,8 +734,10 @@ arch_of_init( void )
/* all memory */
- /* TODO Adjust this when #address-cells gets increased for ppc64. */ PUSH(0); +#ifdef CONFIG_PPC64 + PUSH(0); +#endif fword("encode-phys"); /* This needs adjusting if #size-cells gets increased. Alternatively use multiple (address, size) tuples. */ diff --git a/arch/ppc/qemu/tree.fs b/arch/ppc/qemu/tree.fs index 4d107a9..e4115ea 100644 --- a/arch/ppc/qemu/tree.fs +++ b/arch/ppc/qemu/tree.fs @@ -5,13 +5,15 @@ \ as published by the Free Software Foundation \
+include config.fs + \ ------------------------------------------------------------- \ device-tree \ -------------------------------------------------------------
" /" find-device
-1 encode-int " #address-cells" property +[IFDEF] CONFIG_PPC64 2 [ELSE] 1 [THEN] encode-int " #address-cells" property 1 encode-int " #size-cells" property h# 05f5e100 encode-int " clock-frequency" property
Am 24.11.2010 um 23:20 schrieb Andreas Färber:
To store a full 64-bit address we need two cells. This matches Apple's OpenFirmware on my G5.
Note that an enlarged #size-cells is not strictly needed and constitutes a difference between Apple and IBM firmware.
Cc: Alexander Graf agraf@suse.de Signed-off-by: Andreas Färber andreas.faerber@web.de
I applied a reworked version in r975, with the PUSH() logic in an inline function.
As mentioned in the commit message, what I failed with was a loop along the lines of:
while (remaining > 0) { PUSH(value); remaining -= sizeof(ucell); value >>= (sizeof(ucell) * 8); }
That shift compiles only if sizeof(phys_addr_t) > sizeof(ucell), i.e. on ppc64.
Andreas
On 2010-11-27 6:01 PM, Andreas Färber wrote:
[...] I applied a reworked version in r975, with the PUSH() logic in an inline function.
As mentioned in the commit message, what I failed with was a loop along the lines of:
while (remaining > 0) { PUSH(value); remaining -= sizeof(ucell); value >>= (sizeof(ucell) * 8); }
That shift compiles only if sizeof(phys_addr_t) > sizeof(ucell), i.e. on ppc64.
That loop seems somewhat overkill, given that sizeof() phys_addr_t and ucell are going to be either 4 or 8. I'd think it would be easier to check for equality to do a single PUSH, otherwise check to make sure two PUSHes will work. (We don't support 16-bit ucells any more, do we?)
Something like:
if (sizeof(ucell) >= sizeof(phys_addr_t)) PUSH(value); else { PUSH(value); PUSH(value >> (sizeof(ucell) * 8)); }
On 2010-11-27 6:19 PM, Tarl Neustaedter wrote:
[...] That loop seems somewhat overkill, [...]
Ah. Never mind, I just realized that you were commenting on having done exactly that.
Am 28.11.2010 um 00:19 schrieb Tarl Neustaedter:
On 2010-11-27 6:01 PM, Andreas Färber wrote:
[...] I applied a reworked version in r975, with the PUSH() logic in an inline function.
As mentioned in the commit message, what I failed with was a loop along the lines of:
while (remaining > 0) { PUSH(value); remaining -= sizeof(ucell); value >>= (sizeof(ucell) * 8); }
That shift compiles only if sizeof(phys_addr_t) > sizeof(ucell), i.e. on ppc64.
That loop seems somewhat overkill, given that sizeof() phys_addr_t and ucell are going to be either 4 or 8. I'd think it would be easier to check for equality to do a single PUSH, otherwise check to make sure two PUSHes will work.
In theory, my-#acells claims to support a maximum of 4 cells. We don't use it though, and 128 bits would need special #ifdef handling for systems that don't have a native int128_t.
(We don't support 16-bit ucells any more, do we?)
Not to my knowledge, no.
Something like:
if (sizeof(ucell) >= sizeof(phys_addr_t)) PUSH(value); else { PUSH(value); PUSH(value >> (sizeof(ucell) * 8)); }
Same problem with the shift here. We don't need a compiler statement to optimize this out but a preprocessor statement to not compile it in.
On second thoughts, replacing one shift by two half shifts might trick the compiler, but that's even more overkill given that no other architecture uses this function yet. Haven't checked whether sparc32 might benefit.
Andreas
On 2010-11-27 6:36 PM, Andreas Färber wrote:
In theory, my-#acells claims to support a maximum of 4 cells. We don't use it though, and 128 bits would need special #ifdef handling for systems that don't have a native int128_t.
The case where we use 4 address cells (SCSI-3 variants) are for non-mappable buses, where we don't use the address for anything except the unit address. E.g., FC/AL with 64-bit WWN and 64-bit LUN.
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Andreas Färber -
Tarl Neustaedter