[PATCH] PPC64: Make OpenBIOS interrupt handlers 64bit aware v2

[Alexander Graf]

While booting a 64bit kernel, there is a small timeframe where OF and  
the kernel communicate with each other. Within that timeframe, DSI/ISI  
interrupts may occur, because some memory is not mapped yet.

Right now in case that happens, we jump into the DSI/ISI interrupt  
handler which clobbers the high 32 bits of the kernel's registers. In  
order to circumvent that, let's save/restore all 64 bits of all kernel  
registers when we get a DSI/ISI interrupt.

This patch enables a PPC64 Linux kernel to boot up to the point where  
it tries to set up the SLB entries (slbmte), which is not yet  
implemented in qemu.

v2 implements handling for the HIOR register, bringing interrupt  
handlers to RAM.

Signed-off-by: Alexander Graf

[PATCH] PPC64: Make OpenBIOS interrupt handlers 64bit aware v2

[Blue Swirl]

On 2/28/09, Alexander Graf  wrote:
> While booting a 64bit kernel, there is a small timeframe where OF and the
> kernel communicate with each other. Within that timeframe, DSI/ISI
> interrupts may occur, because some memory is not mapped yet.
>
> Right now in case that happens, we jump into the DSI/ISI interrupt handler
> which clobbers the high 32 bits of the kernel's registers. In order to
> circumvent that, let's save/restore all 64 bits of all kernel registers when
> we get a DSI/ISI interrupt.
>
> This patch enables a PPC64 Linux kernel to boot up to the point where it
> tries to set up the SLB entries (slbmte), which is not yet implemented in
> qemu.
>
> v2 implements handling for the HIOR register, bringing interrupt handlers to
> RAM.
>
> Signed-off-by: Alexander Graf

Thanks, applied.