Re: [OpenBIOS] current ugly pci config code.

[Colin Jensen]

On Tue, 25 Apr 2000, Ronald G Minnich wrote:
  It also thinks IDE is disabled, even though the debug
prints show that I'm
 turning on the relevant bits.
Did you enable Memory, IO, and Bus Master on the IDE?  You need Mem and IO
enabled even if there are no memory regions associated with the device -- I'm
assuming that if I possessed the PCI IDE spec, it would tell me that a PCI IDE
device receives ISA bus cycles or some crazy thing like that.

Sorry I can't explain WHY it needs these -- I don't know :-).  But when I was
programming the bus for my project, I found I needed them.
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current ugly pci config code.

[Ronald G Minnich]

On Tue, 25 Apr 2000, Colin Jensen wrote:

  Did you enable Memory, IO, and Bus Master on the IDE? 
You need Mem
 and IO enabled even if there are no memory regions associated with the
 device -- I'm assuming that if I possessed the PCI IDE spec, it would
 tell me that a PCI IDE device receives ISA bus cycles or some crazy
 thing like that.
are you sure about that? this is from ide-pci.c in 2.3.99pre5:

        if (!(pcicmd & PCI_COMMAND_IO)) {       /* is device disabled? */
                /*
                 * PnP BIOS was *supposed* to have set this device up for

note that it is only checking COMMAND_IO. Does it need more? 

thanks

ron

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current ugly pci config code.

[Jeff Garzik]

Ronald G Minnich wrote:
  
 On Tue, 25 Apr 2000, Colin Jensen wrote:
 
  Did you enable Memory, IO, and Bus Master on the
IDE?  You need Mem
 and IO enabled even if there are no memory regions associated with the
 device -- I'm assuming that if I possessed the PCI IDE spec, it would
 tell me that a PCI IDE device receives ISA bus cycles or some crazy
 thing like that.
 
 are you sure about that? this is from ide-pci.c in 2.3.99pre5:
 
         if (!(pcicmd & PCI_COMMAND_IO)) {       /* is device disabled? */
                 /*
                  * PnP BIOS was *supposed* to have set this device up for
 
 note that it is only checking COMMAND_IO. Does it need more?
If the device doesn't export legacy memory region OR base address memory
regions OR expansion rom regions, then PCI_COMMAND_MEM can be
disabled...  My ASUS P2B BIOS initializes the SB Live card, with no MMIO
regions, like this:

00:0c.1 Input device controller: Creative Labs SB Live! (rev 06)
        Subsystem: Creative Labs Gameport Joystick
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop-
ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
        Latency: 32 set
        Region 0: I/O ports at a800
        Capabilities: <available only to root>
                                                                                          
                               

-- 
Jeff Garzik              | Nothing cures insomnia like the
Building 1024            | realization that it's time to get up.
MandrakeSoft, Inc.       |        -- random fortune
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current ugly pci config code.

[Jeff Garzik]

Colin Jensen wrote:
  
 On Tue, 25 Apr 2000, Ronald G Minnich wrote:
  It also thinks IDE is disabled, even though the
debug prints show that I'm
 turning on the relevant bits.
 
 Did you enable Memory, IO, and Bus Master on the IDE?  You need Mem and IO
 enabled even if there are no memory regions associated with the device -- I'm
 assuming that if I possessed the PCI IDE spec, it would tell me that a PCI IDE
 device receives ISA bus cycles or some crazy thing like that.
  Sorry I can't explain WHY it needs these -- I
don't know :-).  But when I was
 programming the bus for my project, I found I needed them.
Any devices which export legacy ISA memory or address regions need
memory and I/O decoding turned on.  Since legacy ISA resources aren't
reported in the base address registers, you have to be careful...

	Jeff



-- 
Jeff Garzik              | Nothing cures insomnia like the
Building 1024            | realization that it's time to get up.
MandrakeSoft, Inc.       |        -- random fortune
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current ugly pci config code.

[Ronald G Minnich]

On Mon, 1 May 2000, Jeff Garzik wrote:

  Any devices which export legacy ISA memory or address
regions need
 memory and I/O decoding turned on.  Since legacy ISA resources aren't
 reported in the base address registers, you have to be careful...
yow! Does IDE have legacy ISA memory resources? I thought it was just IO
ports!

ron

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current ugly pci config code.

[Jeff Garzik]

Ronald G Minnich wrote:
  
 On Mon, 1 May 2000, Jeff Garzik wrote:
 
  Any devices which export legacy ISA memory or
address regions need
 memory and I/O decoding turned on.  Since legacy ISA resources aren't
 reported in the base address registers, you have to be careful...
 
 yow! Does IDE have legacy ISA memory resources? I thought it was just IO
 ports!
I am pretty sure it IS I/O ports, but that particular IDE chip may need
memory encoding enabled too...

-- 
Jeff Garzik              | Nothing cures insomnia like the
Building 1024            | realization that it's time to get up.
MandrakeSoft, Inc.       |        -- random fortune
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