On 05/28/2010 11:03 AM, Igor Kovalenko wrote:
On Fri, May 28, 2010 at 12:43 PM, Mark Cave-Ayland mark.cave-ayland@siriusit.co.uk wrote:
Igor Kovalenko wrote:
I allowed it to scroll and now I can confirm it would crash with tl=5. Last insn is ldda with ASI=0x24 (Nucleus quad LDD 128 bit atomic)
IN: 0x0000000000424d18: ldda [ %g1 ] (36), %g4 0x0000000000424d1c: cmp %g4, %g6 0x0000000000424d20: bne,pn %xcc, 0x4076c0 0x0000000000424d24: mov 2, %g3
qemu: fatal: Trap 0x0068 while trap level (5)>= MAXTL (5), Error state pc: 0000000000424d18 npc: 0000000000424d1c General Registers: %g0-3: 0000000000000000 0000000008000000 0000000000004000 0000000000000002 %g4-7: 00000000000003ff 0000000000000001 0000000000000020 0000000000004000
Well, not sure how it worked before. Related code in helper_ld_asi() states:
case 0x24: // Nucleus quad LDD 128 bit atomic case 0x2c: // Nucleus quad LDD 128 bit atomic LE // Only ldda allowed raise_exception(TT_ILL_INSN); return 0;HelenOS also uses quad ldd when configured with TSB for memory management. I guess that atomic quad ldd deserves to be implemented. I'll see if it is not hard.
The LDDA instruction is an essential instruction for TLB miss handlers that are TSB-aware. Except for HelenOS, where one can disable TSB, I'd expect all the other OSes that run on sparc64 to use it unconditionally.
Jakub