From: Igor V. Kovalenko igor.v.kovalenko@gmail.com
- sparc64 has PCI memory space at offset, therefore "ranges" property of host bridge must have different PCI and host memory addresses
Signed-off-by: Igor V. Kovalenko igor.v.kovalenko@gmail.com --- arch/ppc/qemu/init.c | 12 ++++++++---- arch/sparc64/openbios.c | 3 ++- drivers/pci.c | 8 ++++---- include/drivers/pci.h | 3 ++- 4 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index 13887e0..a459baa 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -92,7 +92,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0x800c0000, .cfg_base = 0x80000000, .cfg_len = 0x00100000, - .mem_base = 0xf0000000, + .host_mem_base = 0xf0000000, + .pci_mem_base = 0xf0000000, .mem_len = 0x10000000, .io_base = 0x80000000, .io_len = 0x00010000, @@ -108,7 +109,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0xf2c00000, .cfg_base = 0xf2000000, .cfg_len = 0x02000000, - .mem_base = 0x80000000, + .host_mem_base = 0x80000000, + .pci_mem_base = 0x80000000, .mem_len = 0x10000000, .io_base = 0xf2000000, .io_len = 0x00800000, @@ -124,7 +126,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0xf0c00000, .cfg_base = 0xf0000000, .cfg_len = 0x02000000, - .mem_base = 0x80000000, + .host_mem_base = 0x80000000, + .pci_mem_base = 0x80000000, .mem_len = 0x10000000, .io_base = 0xf2000000, .io_len = 0x00800000, @@ -140,7 +143,8 @@ static const pci_arch_t known_arch[] = { .cfg_data = 0xfee00000, .cfg_base = 0x80000000, .cfg_len = 0x7f000000, - .mem_base = 0x80000000, + .host_mem_base = 0x80000000, + .pci_mem_base = 0x80000000, .mem_len = 0x01000000, .io_base = 0xfe000000, .io_len = 0x00800000, diff --git a/arch/sparc64/openbios.c b/arch/sparc64/openbios.c index 3f583f2..23faa29 100644 --- a/arch/sparc64/openbios.c +++ b/arch/sparc64/openbios.c @@ -64,7 +64,8 @@ static const struct hwdef hwdefs[] = { .cfg_data = APB_MEM_BASE, // PCI bus memory space .cfg_base = APB_SPECIAL_BASE, .cfg_len = 0x2000000, - .mem_base = APB_MEM_BASE, + .host_mem_base = APB_MEM_BASE, + .pci_mem_base = 0, .mem_len = 0x10000000, .io_base = APB_SPECIAL_BASE + 0x2000000ULL, // PCI Bus I/O space .io_len = 0x10000, diff --git a/drivers/pci.c b/drivers/pci.c index f8d0b41..5a2be02 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -455,10 +455,10 @@ static void pci_host_set_ranges(const pci_config_t *config) ncells += host_encode_phys_addr(props + ncells, arch->rbase); ncells += pci_encode_size(props + ncells, arch->rlen); } - if (arch->mem_base) { + if (arch->host_mem_base) { ncells += pci_encode_phys_addr(props + ncells, 0, MEMORY_SPACE_32, - config->dev, 0, arch->mem_base); - ncells += host_encode_phys_addr(props + ncells, arch->mem_base); + config->dev, 0, arch->pci_mem_base); + ncells += host_encode_phys_addr(props + ncells, arch->host_mem_base); ncells += pci_encode_size(props + ncells, arch->mem_len); } set_property(dev, "ranges", (char *)props, ncells * sizeof(props[0])); @@ -1224,7 +1224,7 @@ int ob_pci_init(void)
/* Find all PCI bridges */
- mem_base = arch->mem_base; + mem_base = arch->pci_mem_base; /* I/O ports under 0x400 are used by devices mapped at fixed location. */ io_base = arch->io_base + 0x400; diff --git a/include/drivers/pci.h b/include/drivers/pci.h index 8814b7a..562a43e 100644 --- a/include/drivers/pci.h +++ b/include/drivers/pci.h @@ -13,7 +13,8 @@ struct pci_arch_t { unsigned long cfg_data; unsigned long cfg_base; unsigned long cfg_len; - unsigned long mem_base; + unsigned long host_mem_base; /* in host memory space */ + unsigned long pci_mem_base; /* in PCI memory space */ unsigned long mem_len; unsigned long io_base; unsigned long io_len;