[OpenBIOS] Re: Openbios code for IRQ or interrupt handling?

[Jd Lyons]

emu-system-ppc64-unsigned: info: Core0: Set IDR 49 to 0x00000000<————THIS IS AN IRQ STORM
qemu-system-ppc64-unsigned: info: Core0: Set IDR 50 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 51 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 52 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 53 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 54 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 55 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 56 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 57 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 58 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 59 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 60 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 61 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 62 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 63 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 64 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 65 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 66 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: Set IDR 67 to 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: addr 0x1020<——————THIS IS WHERE WE GET mach_kernal
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: => 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 0 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 0 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 0 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x20 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 1 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 1 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 1 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x40 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 2 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 2 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 2 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x60 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 3 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 3 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 3 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x80 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 4 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 4 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 4 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0xa0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 5 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 5 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 5 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0xc0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 6 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 6 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 6 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0xe0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 7 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 7 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 7 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x100 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 8 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 8 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 8 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x120 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 9 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 9 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 9 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x140 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 10 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 10 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 10 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x160 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 11 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 11 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 11 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x180 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 12 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 12 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 12 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 13 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 14 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 15 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 15 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 15 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x200 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 16 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 16 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 16 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x220 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 17 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 17 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 17 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x240 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 18 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 18 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 18 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x260 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 19 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 19 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 19 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x280 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 20 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 20 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 20 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x2a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 21 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 21 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 21 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x2c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 22 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 22 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 22 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x2e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 23 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 23 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 23 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x300 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 24 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 24 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 24 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x320 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 25 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x340 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 26 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 26 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 26 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x360 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 27 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 27 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 27 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x380 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 28 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 28 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 28 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x3a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 29 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 29 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 29 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x3c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 30 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 30 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 30 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x3e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 31 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 31 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 31 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x400 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 32 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 32 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 32 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x420 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 33 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 33 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 33 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x440 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 34 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 34 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 34 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x460 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 35 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 35 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 35 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x480 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 36 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 36 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 36 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x4a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 37 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 37 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 37 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x4c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 38 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 38 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 38 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x4e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 39 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 39 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 39 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x500 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 40 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 40 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 40 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x520 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 41 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 41 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 41 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x540 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 42 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 42 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 42 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x560 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 43 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 43 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 43 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x580 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 44 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 44 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 44 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 45 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 45 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 45 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 46 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 46 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 46 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 47 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 47 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 47 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x600 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 48 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 48 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 48 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x620 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 49 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 49 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 49 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x640 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 50 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 50 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 50 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x660 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 51 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 51 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 51 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x680 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 52 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 52 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 52 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 53 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 53 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 53 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 54 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 54 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 54 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 55 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 55 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 55 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x700 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 56 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 56 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 56 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x720 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 57 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 57 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 57 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x740 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 58 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 58 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 58 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x760 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 59 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 59 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 59 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x780 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 60 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 60 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 60 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x7a0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 61 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 61 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 61 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x7c0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 62 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 62 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 62 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x7e0 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 63 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 63 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 63 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x800 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 64 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 64 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 64 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x820 <= 80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 65 to 0x80000000 -> 0x80000000
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x10e0 <= 000000ff
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x1020 <= 20000000
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x390 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 28 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x380 <= 8048001c
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 28 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 28 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 28 to 0x8048001c -> 0x8048001c
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6f0 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 55 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6e0 <= 80080037
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 55 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 55 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 55 to 0x80080037 -> 0x80080037
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x6e0
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x80080037
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x6e0 <= 00080037
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 55 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 55 to 0x00080037 -> 0x00080037
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x330 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 25 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x320 <= 80480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 25 to 0x80480019 -> 0x80480019
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x320
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x80480019
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x320 <= 00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 25 to 0x00480019 -> 0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5f0 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 47 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5e0 <= 8048002f
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 47 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 47 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 47 to 0x8048002f -> 0x8048002f
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x5e0
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x8048002f
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x5e0 <= 0048002f
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 47 active 1 was 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 47 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 47 priority 8 too low for ctpr 15 on CPU 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 47 inactive, current prio 15/-1, CPU 0
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 47 to 0x0048002f -> 0x4048002f
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x50 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 2 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x40 <= 80080002
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 2 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 2 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 2 to 0x80080002 -> 0x80080002
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x40
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x80080002
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x40 <= 00080002
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 2 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 2 to 0x00080002 -> 0x00080002
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1b0 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 13 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1a0 <= 8048000d
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 13 to 0x8048000d -> 0x8048000d
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x1a0
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x8048000d
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1a0 <= 0048000d
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 13 to 0x0048000d -> 0x0048000d
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 13 = 0 ivpr=0x0048000d
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 13 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 13 = 1 ivpr=0x0048000d
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 13 active 1 was 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 13 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 47 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 13 priority 8 too low for ctpr 15 on CPU 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 13 inactive, current prio 15/-1, CPU 0
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x70 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 3 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x60 <= 80080003
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 3 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 3 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 3 to 0x80080003 -> 0x80080003
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x60
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x80080003
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x60 <= 00080003
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 3 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 3 to 0x00080003 -> 0x00080003
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1d0 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 14 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1c0 <= 8048000e
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 14 to 0x8048000e -> 0x8048000e
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x1c0
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x8048000e
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x1c0 <= 0048000e
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 14 to 0x0048000e -> 0x0048000e
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 14 = 0 ivpr=0x0048000e
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 14 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 14 = 1 ivpr=0x0048000e
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 14 active 1 was 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 13 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 14 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 47 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 14 priority 8 too low for ctpr 15 on CPU 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 14 inactive, current prio 15/-1, CPU 0
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x10b0 <= 800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 65 to 0x800e0041 -> 0x800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: addr 0x10b0
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: => 0x800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x10b0 <= 000e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 65 to 0x000e0041 -> 0x000e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: cpu 0 addr 0x80 <= 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: set CPU 0 ctpr to 0, raised 8 servicing -1
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: Raise OpenPIC INT output cpu 0 irq 13
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: cpu 1 addr 0x1080 <= 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: set CPU 1 ctpr to 0, raised 0 servicing 0
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: Lower OpenPIC INT output cpu 1 due to ctpr
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: addr 0x10b0
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: => 0x000e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x10b0 <= 800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 65 to 0x800e0041 -> 0x800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: addr 0x10b0
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_read: => 0x800e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_gbl_write: addr 0x10b0 <= 000e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 65 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 65 to 0x000e0041 -> 0x000e0041
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: cpu 0 addr 0x80 <= 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: set CPU 0 ctpr to 0, raised 8 servicing -1
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: Raise OpenPIC INT output cpu 0 irq 13
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: cpu 1 addr 0x1080 <= 0x00000000
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: set CPU 1 ctpr to 0, raised 0 servicing 0
qemu-system-ppc64-unsigned: info: Core0: openpic_cpu_write_internal: Lower OpenPIC INT output cpu 1 due to ctpr
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: addr 0x380
qemu-system-ppc64-unsigned: info: Core0: openpic_src_read: => 0x8048001c
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x380 <= 0048001c
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 28 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 28 to 0x0048001c -> 0x0048001c
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 0 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 0 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 0 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 0 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 0 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 25 is already inactive
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 1 ivpr=0x00480019
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 25 active 1 was 0
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 13 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 14 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 25 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 47 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: Raise OpenPIC INT output cpu 0 irq 25/13
qemu-system-ppc64-unsigned: info: Core0: openpic: set irq 25 = 1 ivpr=0x40480019
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: IRQ 25 active 1 was 1
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 13 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 14 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 25 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_check: irq 47 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core0: IRQ_local_pipe: Raise OpenPIC INT output cpu 0 irq 25/13
qemu-system-ppc64-unsigned: info: Core-1: openpic: set irq 28 = 1 ivpr=0x0048001c<—THIS IS WHERE OS X BRINGS UP THE SECOND CPU
qemu-system-ppc64-unsigned: info: Core-1: IRQ_local_pipe: IRQ 28 active 1 was 0
qemu-system-ppc64-unsigned: info: Core-1: IRQ_check: irq 13 set ivpr_pr=8 pr=-1
qemu-system-ppc64-unsigned: info: Core-1: IRQ_check: irq 14 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core-1: IRQ_check: irq 25 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core-1: IRQ_check: irq 28 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core-1: IRQ_check: irq 47 set ivpr_pr=8 pr=8
qemu-system-ppc64-unsigned: info: Core-1: IRQ_local_pipe: Raise OpenPIC INT output cpu 0 irq 28/13
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x3d0 <= 00000001
qemu-system-ppc64-unsigned: info: Core0: Set IDR 30 to 0x00000001
qemu-system-ppc64-unsigned: info: Core0: openpic_src_write: addr 0x3c0 <= 8048001e
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 30 is disabled
qemu-system-ppc64-unsigned: info: Core0: openpic_update_irq: IRQ 30 is already inactive
qemu-system-ppc64-unsigned: info: Core0: Set IVPR 30 to 0x8048001e -> 0x8048001e<<<————THIS IS WHERE WE HALT
> On Feb 19, 2025, at 1:50 AM, Jd Lyons via OpenBIOS  wrote:
>
> I can’t figure out this race condition but it causes an IRQ storm. I feel like I’m in the old days of PC’s when to had IRQ conflicts and had to sort them yourself deep in the bios. As a Mac person I only had to deal with that on a few friends PC’s. Starting the second CPU in a on state rather than halted just makes the race condition worse, twice as fast, and Openbios doesn’t want to get to the prompt, but throwing 3, 8, or 9 CPUs at it in a running state gets me to the prompt, but it ignores -prom-env setting with anything more that three.
>
> 300% cpu usage just speeds up the race condition and IRQ storm so IDE craps out before you can load BootX or a linux kernel.
>
> Then noting happens but the IRG storm and GPIO 1 asserting 0, likely to all the other CPUs, and that is likely the race conditions and pulling that low trigger the IRQ storm.
>
> I can’t make it stop, I even tied all IRQ and Interrupts handling to CPU0, and that working until the OS Kenral loads and starts sending stuff to CPU1, which is still in a halted state unless I start it with my hack. Even with only CPU0 dealing with IRQs and Interrupts the race condition is still there and the IRQ storm.
>
> I have to figure out why GPIO 1keeps getting triggered in a loop to pull low????
> > On Feb 19, 2025, at 1:29 AM, Jd Lyons  wrote:
> >
> > Thanks Mark, I got side traced thinking open-pic when I should have been looking at GPIO because it is the one that is the gpio-parent there should be no interrupt-parent property. I think the gpio phandle is 7.
> >
> > Can you tell me how IRQ’s get assigned to CPU0?
> >
> > Interrupts?
> > > On Feb 18, 2025, at 5:00 PM, Mark Cave-Ayland  wrote:
> > >
> > > On 18/02/2025 21:34, Jd Lyons via OpenBIOS wrote:
> > > > I don’t know why, I can’t seem to get Openbios to set and interrupt-parent in the init.c for any /cpus, this code should work, no?
> > > > void add_cpu_nodes(void) {
> > > >     int num_cpus = fw_cfg_read_i32(FW_CFG_NB_CPUS);
> > > >     printk("Detected %d CPUs\n", num_cpus);
> > > >     /* Ensure /cpus node exists */
> > > >     phandle cpus_node = dt_find_by_path("/cpus");
> > > >     if (!cpus_node) {
> > > >         printk("ERROR: /cpus node not found! Delaying CPU setup.\n");
> > > >         return;
> > > >     }
> > > >     /* Wait until the interrupt controller exists */
> > > >     phandle intc_node = NULL;
> > > >     int retries = 5;
> > > >     while (retries-- > 0) {
> > > >         intc_node = dt_find_by_path("/pci/mac-io/@40000");
> > >
> > > Is this for the mac99 machine? If so you probably want /pci@f2000000/mac-io@c/interrupt-controller@40000 (see the output of show-devs for the full device paths).
> > > >     if (intc_node) {
> > > >         break;
> > > >     }
> > > >     printk("Waiting for /pci/mac-io/@40000...\\n");
> > > >     msleep(100);  // Wait 100ms before retrying
> > > > }
> > > > if (!intc_node) {
> > > >     printk("ERROR: Interrupt controller (/pci/mac-io/@40000) not found! SMP will not work.\\n");
> > > >     return;
> > > > }
> > > > for (int i = 0; i < num_cpus; i++) {
> > > >     phandle cpu_node = dt_new_node(cpus_node);
> > > >     if (!cpu_node) {
> > > >         printk("ERROR: Failed to create CPU node for CPU %d!\\n", i);
> > > >         continue;
> > > >     }
> > > >     dt_set_property_string(cpu_node, "device_type", "cpu");
> > > >     dt_set_property_string(cpu_node, "compatible", "PowerPC,G4");
> > > >     /* Assign a unique CPU interrupt */
> > > >     int cpu_irq[2] = { 16 + i, 0 };
> > > >     dt_set_property_cells(cpu_node, "interrupts", cpu_irq, 2);
> > > >     printk("CPU %d assigned IRQ %d\\n", i, cpu_irq[0]);
> > > >     /* Ensure interrupt-parent is set */
> > > >     dt_set_property_phandle(cpu_node, "interrupt-parent", intc_node);
> > > >     printk("CPU %d linked to interrupt-parent /pci/mac-io/@40000\\n", i);
> > > >     /* Register CPU ID */
> > > >     PUSH(i);
> > > >     fword("encode-int");
> > > >     push_str("reg");
> > > >     fword("property");
> > > >     fword("finish-device");
> > > >     printk("Initialized CPU %d\\n", i);
> > > > }
> > > >
> > > > }
> > >
> > > ATB,
> > >
> > > Mark.
>
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