Le samedi 19 septembre 2009 à 11:37 +0200, Segher Boessenkool a écrit :
+#ifdef CONFIG_PPC
flush_icache_range( addr, addr + size );+#endif
I'm not sure what your flush_icache_range() does exactly, but at a
It is not mine ;-)
minimum it is misnamed: you need to flush the dcache for this range to memory (dcbst is enough), do a sync, invalidate the icache (icbi), do another sync, do an isync.
It does exacly what you explain, see arch/ppc/qemu/start.S:
#define CACHE_LINE_SIZE 32 #define LG_CACHE_LINE_SIZE 5
/* flush_icache_range( ulong start, ulong stop) */ GLOBL(flush_icache_range): li r5,CACHE_LINE_SIZE-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 srwi. r4,r4,LG_CACHE_LINE_SIZE beqlr mtctr r4 mr r6,r3 1: dcbst 0,r3 addi r3,r3,CACHE_LINE_SIZE bdnz 1b sync /* wait for dcbst's to get to ram */ mtctr r4 2: icbi 0,r6 addi r6,r6,CACHE_LINE_SIZE bdnz 2b sync /* additional sync needed on g4 */ isync blr
Regards, Laurent