Author: wmb Date: 2007-04-27 23:50:36 +0200 (Fri, 27 Apr 2007) New Revision: 329
Modified: cpu/x86/assem.fth cpu/x86/disassem.fth Log: x86 assembler/disassembler - added support for cpuid instruction.
Modified: cpu/x86/assem.fth =================================================================== --- cpu/x86/assem.fth 2007-04-27 21:50:06 UTC (rev 328) +++ cpu/x86/assem.fth 2007-04-27 21:50:36 UTC (rev 329) @@ -686,6 +686,7 @@ : wrmsr ( -- ) h# 0f asm8, h# 30 asm8, ; : rdtsc ( -- ) h# 0f asm8, h# 31 asm8, ; : rdmsr ( -- ) h# 0f asm8, h# 32 asm8, ; +: cpuid ( -- ) h# 0f asm8, h# a2 asm8, ; \ Arg in %eax, results in ax,bx,dx,cx
\ Structured Conditionals \ single pass forces fixed size. optimize for small, fast structures:
Modified: cpu/x86/disassem.fth =================================================================== --- cpu/x86/disassem.fth 2007-04-27 21:50:06 UTC (rev 328) +++ cpu/x86/disassem.fth 2007-04-27 21:50:36 UTC (rev 329) @@ -244,6 +244,7 @@ low4bits case 0 of .push ." fs" endof 1 of .pop ." fs" endof + 2 of ." cpuid" endof 3 of ." bt" op-col ea,g endof 4 of ." shld" op-col 1 is wbit ea,g ,ib endof 5 of ." shld" op-col 1 is wbit ea,g ,cl endof @@ -251,6 +252,7 @@ 7 of ." cmpxchg" op-col ea,g endof 8 of .push ." gs" endof 9 of .pop ." gs" endof + \ a of ??? b of ." bt" op-col ea,g endof c of ." shrd" op-col 1 is wbit ea,g ,ib endof d of ." shrd" op-col 1 is wbit ea,g ,cl endof