Am 01.11.2010 um 23:17 schrieb Alexander Graf:
On 01.11.2010, at 18:09, Andreas Färber wrote:
Am 01.11.2010 um 22:10 schrieb Alexander Graf:
On 01.11.2010, at 16:56, Andreas Färber wrote:
When loading the fw_cfg address with just lis, addi sequence, we get the high address bits as 0xffffffff on ppc64.
Use the full double word immediate load sequence on ppc64.
Cc: Alexander Graf agraf@suse.de Signed-off-by: Andreas Färber andreas.faerber@web.de
arch/ppc/qemu/start.S | 51 ++++++++++++++++++++++++++ +--------------------- 1 files changed, 29 insertions(+), 22 deletions(-)
diff --git a/arch/ppc/qemu/start.S b/arch/ppc/qemu/start.S index 443d668..0be69d9 100644 --- a/arch/ppc/qemu/start.S +++ b/arch/ppc/qemu/start.S @@ -176,6 +176,24 @@ #undef stl #undef ll
+#ifdef __powerpc64__
+#define load(D, x) \
- lis (D), (x)@highest ; \
- ori (D), (D), (x)@higher ; \
- sldi (D), (D), 32 ; \
- oris (D), (D), (x)@h ; \
- ori (D), (D), (x)@l
+#else
+#define load(D, x) \
- lis (D), HA(x) ; \
- addi (D), (D), LO(x)
I would recommend to take the LOAD_REG_IMMEDIATE macro from Linux :). That makes the code more readable for someone who knows his way around the Linux code.
Done. This series is now also available from http://repo.or.cz/w/openbios/afaerber.git ppc64-queue.
v2 of the series:
Acked-by: Alexander Graf agraf@suse.de
Thanks, applied as r942-r945.
Andreas