22 Mar
2000
22 Mar
'00
8:27 a.m.
I'm sure you are right. I was clearing the cache disable bit but I >suppose there is more to do.
I think that's missguided. My memory tells me that the bit is called "Cache Enable" with
1 = enable 0 = dissable.
That's for the L1 cache, the L2 cache is neccessarily somewhere else in the MSRs for all Pentium pro and derivatives.
--
The militia whose regulation was referred to by the second ammendment is
the one run by the pentagon.
http://users.erols.com/alangrimes/
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