On 20/11/16 18:04, BALATON Zoltan wrote:
QEMU emulates two of the three PCI buses found on real hardware because some clients seem to need both and fail with only one present, but OpenBIOS only handles a single PCI bus and initialises and puts in the device tree only one of these: the second one which is where devices are connected and also marks it bus 0. However, clients getting info from the device tree may not know about this and thinking there is only one PCI bus they erroneously use the address of the first bus to access PCI config registers for devices on the second bus which silently fails as these requests will go to the other empty bus emulated and return invalid values. Devices mapped via MMIO still appear to work but they may not be correctly initialised and some cards are not detected because of this.
Until support for multiple PCI buses is implemented add an empty node in the device tree for the uninitialised bus to let clients know about it. This is still not entirely correct as bus-range property does not match real hardware but this fixes detecting PCI devices (such as USB) under MorphOS and may also fix enabling the bus master bit needed with some network cards and allow the workarund for this to be reverted.
Signed-off-by: BALATON Zoltan balaton@eik.bme.hu
v4: Rebased to latest master v3: See: https://mail.coreboot.org/pipermail/openbios/2017-January/009867.html
arch/ppc/qemu/init.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)
diff --git a/arch/ppc/qemu/init.c b/arch/ppc/qemu/init.c index af15682..d362b0e 100644 --- a/arch/ppc/qemu/init.c +++ b/arch/ppc/qemu/init.c @@ -716,6 +716,48 @@ static void kvm_of_init(void) fword("finish-device"); }
+static void empty_pci_bus_init(void) +{
- if (machine_id == ARCH_MAC99) {
/* Add empty node for first pci bus */
/* Remove this when pci driver is fixed to handle multiple buses */
activate_device("/");
fword("new-device");
push_str("pci");
fword("device-name");
push_str("pci");
fword("device-type");
PUSH(0xf0000000);
fword("encode-int");
PUSH(0x02000000);
fword("encode-int");
fword("encode+");
push_str("reg");
fword("property");
PUSH(3);
fword("encode-int");
push_str("#address-cells");
fword("property");
PUSH(2);
fword("encode-int");
push_str("#size-cells");
fword("property");
PUSH(1);
fword("encode-int");
push_str("#interrupt-cells");
fword("property");
PUSH(0);
fword("encode-int");
PUSH(0);
fword("encode-int");
fword("encode+");
push_str("bus-range");
fword("property");
fword("finish-device");
device_end();
- }
+}
- /*
*/
- filll ( addr bytes quad -- )
@@ -857,6 +899,7 @@ arch_of_init(void) feval("['] ppc-dma-sync to (dma-sync)");
#ifdef CONFIG_DRIVER_PCI
- empty_pci_bus_init(); ob_pci_init(); #endif
I'm still not a great fan of this patch, although now with my latest uninorth rework at least there is actually a PCI bus present at 0xf0000000 so if OSs scan the device tree and locate the bus, accesses there won't fail.
Having thought about it though, I do have a better idea: if the issue is simply that "bus-range" needs to be set to different starting value then my work on adding PCI bridge support to OpenBIOS has just about solved this.
How about changing ob_pci_init() to take a single bus_num int which is the starting bus number and then passing that down into ob_configure_pci_device()? That will allow you to set the correct bus_num for the 0xf2000000 PCI bus which should solve your problem, and also get OpenBIOS a small step closer to multiple PCI bus support.
ATB,
Mark.