Hi all,
Continuing more with my work on migrating SPARC32 to OFMEM, I've hit an issue with the ESP driver which is causing me a bit of a problem.
At the moment, I have a hybrid old-mem/OFMEM SPARC32 setup where I am migrating the various memory calls over to OFMEM one at a time. Currently my implementation just uses OFMEM for allocating MMU page tables, and with the default compile option of -Os looks like this:
Configuration device id QEMU version 1 machine id 32 Unhandled Exception 0x0000001f PC = 0xffd12f08 NPC = 0xffd12f0c Stopping execution
The interesting part is that this problem goes away if I compile with any -O3 or -O0 or but shows when I compile with -O2, -O1 or -Os. So I wonder if I've hit some kind of logic bug in OpenBIOS?
Looking at the SPARCv8 specification, exception 0x1f is equivalent to IRQ15 and the offending code where the error occurs can be found in drivers/esp.c:do_command():
esp->ll->regs[ESP_BUSID] = sd->id & 7; // Set DMA address esp->espdma.regs->st_addr = esp->buffer_dvma; // Set DMA length esp->ll->regs[ESP_TCLOW] = cmdlen & 0xff; esp->ll->regs[ESP_TCMED] = (cmdlen >> 8) & 0xff; // Set DMA direction and enable DMA esp->espdma.regs->cond_reg = DMA_ENABLE;
/* Crash occurs somewhere in this section... */
// Set ATN, issue command esp->ll->regs[ESP_CMD] = ESP_CMD_SELA | ESP_CMD_DMA; // Wait for DMA to complete. Can this fail? while ((esp->espdma.regs->cond_reg & DMA_HNDL_INTR) == 0)
/* End of crash section */;
// Check status status = esp->ll->regs[ESP_STATUS]; // Clear interrupts to avoid guests seeing spurious interrupts (void)esp->ll->regs[ESP_INTRPT];
I notice from the code above there is an explicit comment that mentions clearing interrupts to prevent the guest from seeing them so I would have thought that this wouldn't be an issue? I've checked the espdma structures to ensure that they are marked volatile (or _volatile_) and this appears to be the case - so I'm a little bit stumped. Can anyone point me in the right direction or spot the mistake?
ATB,
Mark.