Re: [OpenBIOS] [PATCH] Tick counter

[Mark Cave-Ayland]

On 09/02/14 17:24, Olivier Danet wrote:
> romvec.pvtime is a pointer to an 'uptime' counter, calibrated in
> millisecond.
>
> We use the [1st] CPU timer, running at 100Hz, to increment (+10) the
> counter.
>
> This counter is used by NextStep to measure the 10 seconds delay during
> boot, when asking
> about boot options.
>
> Signed-off-by: Olivier Danet
>
> diff a/arch/sparc32/romvec.c b/arch/sparc32/romvec.c
> --- a/arch/sparc32/romvec.c 2014-02-07 18:23:59.761220839 +0100
> +++ b/arch/sparc32/romvec.c 2014-02-07 18:39:38.728186578 +0100
> @@ -479,6 +479,7 @@ init_openprom(void)
> romvec0.pv_reboot = obp_reboot_handler;
> romvec0.pv_printf = obp_printf_handler;
> romvec0.pv_abort = obp_abort_handler;
> romvec0.pv_ticks = &obp_ticks;
>
> romvec0.pv_halt = obp_halt_handler;
> romvec0.pv_synchook = &sync_hook;
> romvec0.pv_v0bootargs = &obp_argp;
> diff -rup a/arch/sparc32/vectors.S b/arch/sparc32/vectors.S
> --- a/arch/sparc32/vectors.S 2014-02-07 18:22:20.063224477 +0100
> +++ b/arch/sparc32/vectors.S 2014-02-07 18:40:44.161184191 +0100
> @@ -207,6 +207,10 @@ irq_entry14:
> sethi %hi(counter_regs), %l7
> ld [%l7 + %lo(counter_regs)], %l7
> ld [%l7], %g0
> sethi %hi(obp_ticks), %l7
> ld [%l7 + %lo(obp_ticks)], %l6
> add %l6, 10, %l6
> st %l6, [%l7 + %lo(obp_ticks)]
>
> jmp %l1
> rett %l2
>
> diff a/drivers/obio.c b/drivers/obio.c
> --- a/drivers/obio.c 2014-02-07 18:25:08.050218348 +0100
> +++ b/drivers/obio.c 2014-02-07 18:56:54.126148798 +0100
> @@ -253,6 +253,8 @@ ob_aux2_reset_init(uint64_t base, uint64
>
> volatile struct sun4m_timer_regs *counter_regs;
>
> +volatile int32_t obp_ticks;
>
> static void
> ob_counter_init(uint64_t base, unsigned long offset, int ncpu)
> {
> @@ -287,7 +289,7 @@ ob_counter_init(uint64_t base, unsigned
>
> counter_regs = (struct sun4m_timer_regs *)ofmem_map_io(base +
> (uint64_t)offset, sizeof(*counter_regs));
> counter_regs->cfg = 0xffffffff;
> counter_regs->cfg = 0xfffffffe;
>
> counter_regs->l10_timer_limit = 0;
> counter_regs->cpu_timers[0].l14_timer_limit = 0x9c4000; /* see comment
> in obio.h */
> counter_regs->cpu_timers[0].cntrl = 1;
> @@ -304,6 +306,8 @@ ob_counter_init(uint64_t base, unsigned
> push_str("address");
> fword("property");
> obp_ticks = 0;
>
> fword("finish-device");
> }
>
> diff a/drivers/obio.h b/drivers/obio.h
> --- a/drivers/obio.h 2014-02-07 18:22:20.276224469 +0100
> +++ b/drivers/obio.h 2014-02-07 18:45:46.417173162 +0100
> @@ -88,7 +88,7 @@ struct sun4m_timer_regs {
> Registers of hardware timer in sun4m.
>
> */
> struct sun4m_timer_percpu {
> volatile unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */
> volatile unsigned int l14_timer_limit; /* Initial value is 0x009c4000
>
> = 10ms period*/
> volatile unsigned int l14_cur_count;
> };
>
> diff a/include/drivers/drivers.h b/include/drivers/drivers.h
> --- a/include/drivers/drivers.h 2014-02-07 18:25:08.053218348 +0100
> +++ b/include/drivers/drivers.h 2014-02-07 18:43:25.598178300 +0100
> @@ -81,6 +81,7 @@ extern uint16_t graphic_depth;
> extern volatile unsigned char *power_reg;
> extern volatile unsigned int *reset_reg;
> extern volatile struct sun4m_timer_regs *counter_regs;
> +extern volatile int32_t obp_ticks;
>
> void ob_new_obio_device(const char *name, const char *type);
> unsigned long ob_reg(uint64_t base, uint64_t offset, unsigned long size,
> int map);

Hi Olivier,

The basic patch looks like it's a good starting point, however if use 
the QEMU gdbstub to set a breakpoint on irq_entry14 for the timer 
interrupt then it never triggers whilst in OpenBIOS.

If I let the boot continue into the Solaris kernel then it does break 
eventually, which makes me think that the timer initialisation in 
ob_interrupt_init() needs some extra modifications.

Can you double-check your complete patchset and confirm whether or not 
there are any changes to the timer mask registers at all?

ATB,

Mark.