On Tue, 29 Feb 2000, [iso-8859-1] Stephan M�ller wrote:
cool, will you add support for AMD processors? ie k5 and k6 etc?
What does a processor in sockel7-architecture has to do with the chipset?
[...]
I think what was being asked was along the lines of whether or not I would be adding support for the piculuarities of the K5, K6, etc... And the answer is "sort-of". The M1541 has special hardware support for enabling/disabling features that can exploit the slightly different architecture of the various x86 processors, ie:
- Cyrix M1/2 linear wrap mode - K6 Write-allocation
Etc... I actually have no idea what these things are specifically, but they are listed as features of the M1531B...
Most PC BIOS (ie: Award, AMI) will turn on the chipset support for these things if the right processor is detected.
I think that is a great idea, but it is something I feel is better left to a much higher layer of the OpenBIOS architecture. The way I see it, the support for a chipset like this should be done in two layers:
1) low-level (ie: boot16 and boot32 "level" code) Definetly some assembly here, and perhaps some C code. Do the minimum required to make the chipset provide a linear address space, set up some stacks, etc...
2) high-level (ie: C and Forth) -- It would be nice if there could be some way to abstract the chipset "advanced" features into the OpenFirmware device tree. If not, this is still where I think the "performance" related chipset initialization should happen.
-- Burl.
Ciao, Stephan
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