On 07.11.2010, at 23:13, Andreas Färber wrote:
Am 01.11.2010 um 17:36 schrieb Andreas Färber:
Latest state with local patches is that hell breaks loose once the MMU is set up. I get a 0x400 (ISI) exception and when the bctrl to isi_exception() is executed, we end up at trap_error, where it branches to unexpected_excep() and tries to printk() to the serial port that's not yet set up. I'll put a few patches together.
Since r945 everything except for the trampoline issue should be in SVN.
I've made no more progress throughout the week though:
Directly after we set the MSR_IR|MSR_DR bits in the MSR (arch/ppc/qemu/ofmem.c:setup_mmu), we get an ISI exception and end up in arch/ppc/qemu/start.S:vector__0x400 (the 0xfffxxxxx one). We proceed up to the bctrl which should take us to arch/ppc/qemu/ofmem.c:isi_exception, but then get a 0x700 program exception. The value in ctr looks sensible, it's some 0xfffxxxxx address.
i) I read that mtsrin were not allowed in 64-bit mode and its results unpredictable, so I tried switching MSR_SF off before and back on after the loop, without luck.
The mtsrin implementation is a hack. Most PPC cores don't support it at all anymore. But qemu and kvm are fine, so it's a very easy way of setting up SLB entries.
If you want to go the "correct" route, just convert mtsrin to slbmte. That way we could potentially run on real hardware too ;-).
Alex