Hello,
last week a had time to run devbios on my sis735 based motherboard but there
are some questions/problems:
In sis_activate it seems that address 0x51 of the virtual kernel address
space is accessed.
// sis_activate():
..
pci_dummy[1]=readb(0x51);
..
writeb(pci_dummy[1] & 0x7f, 0x51);
..
// sis deactivate():
..
writeb(pci_dummy[1], 0x51);
..
This leads to an segmantation fault in my case. Can someone explain me what
this code should do?
The comment says: /* disable cache */
static void sis_activate(void)
{
char b;
hostbridge = pci_find_class(PCI_CLASS_BRIDGE_HOST<<8,NULL);
if (!hostbridge)
return;
pci_dummy[0]=pci_read(hostbridge, 0x76);
--> pci_dummy[1]=readb(0x51);
pci_dummy[2]=pci_read(CURRENT, 0x40);
pci_dummy[3]=pci_read(CURRENT, 0x45);
/* disable shadow */
pci_write(hostbridge, 0x76, 0x00);
/* disable cache */
--> writeb(pci_dummy[1] & 0x7f, 0x51);
/* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630 */
pci_write(CURRENT, 0x40, pci_dummy[2]|0x0b);
/* Flash write enable on SiS 540/630 */
pci_write(CURRENT, 0x45, pci_dummy[3]|0x40);
/* The same thing on SiS 950 SuperIO side */
outb(0x87, 0x2e);
outb(0x01, 0x2e);
outb(0x55, 0x2e);
outb(0x55, 0x2e);
if (inb(0x2f) != 0x87) {
/* printf("Can not access SiS 950\n"); */
return;
}
outb(0x24, 0x2e);
b = inb(0x2f) | 0xfc;
outb(0x24, 0x2e);
outb(b, 0x2f);
outb(0x02, 0x2e);
outb(0x02, 0x2f);
}
The next thing I noticed is that the ATMEL29C010A doesn't like the
flash_program_atmel() code.
When I use the flash_program -code everything is fine.
void flash_program (void)
{
flash_command(0xa0);
}
void flash_program_atmel (void)
{
flash_command(0x80);
flash_command(0x20);
}
The AT29C010A data sheet says that:
the code in flash_program() is used:
1. to activate data protection
2. ac "program"-command when data protection is activated
the flash_program_atmel() code does switch of the data protection.
I dont know why the flash_program_atmel() code doesn't work for me since it
agrees with the data sheet.
Then there is another problem. (Since the ?? cache disable code ?? (see above)
was commented out I switched off all cache options in BIOS setup: BIOS ROM
cachable, L1 + L2 Cache of processor.)
When loading the devbios module the flashrom is detected correct and I can
read it with dd if=/dev/bios | hex|less.
I also can write to the flash with dd if=/dev/zero of=/dev/bios bs=128
count=1. After this write access the flashrom
can be read with dd to verify that the data is written properly.
The problem is that after the write access no more flash commands can be
executed. That means that every
other write to the bios does fail and when I
rmmod bios
insmod bios.o
then the kernel module doesn't detect the flashrom until next reboot (the
identification command does not work).
I tried this with the EON29F002NT-flashrom which belongs to the board, but
did not write on that, and the ATMEL.
Since both flashroms are not detected this cannot be a flashrom problem.
I modified bios_write-function to use flash_ready_toggle() instead of
flash_ready_poll()
and printk timeout variable (the number of toggles+1)
to see if the flash accepted my write commands.
After rebooting an loading the bios.o module I did a
dd if=/dev/zero of=/dev/bios bs=1024 count=1
for the first 128k sector flash_ready_toggle reported timeout=ca. 4000
for all other sectors flash_ready_toggle reported timeout=1 (0 toggles).
This means that the first sector write succeeds, but all following fail.
I don't understand this becaus in the programming loop of bios_write no
strange things are done:
while (size>0) {
// atmel-specific code commented out - reasons described above:
//if ((flashchips[fn].flags & f_manuf_compl) != f_atmel_compl) {
flash_program();
//} else {
// flash_program_atmel();
//}
for (i=0;i<flashchips[fn].pagesize;i++) {
flash_writeb(offset+writeoffs+i,clipboard[writeoffs+i]);
}
if ((flashchips[fn].flags & f_manuf_compl) == f_atmel_compl) {
udelay(750);
} else {
if (flashchips[fn].pagesize==1)
udelay(30);
else
udelay(300);
}
if (flash_ready_poll(offset+writeoffs+flashchips[fn].pagesize-1,
clipboard[writeoffs+flashchips[fn].pagesize-1])) {
printk (KERN_ERR "BIOS: Error occured, please repeat write
operation.\n");
}
flash_command(0xf0);
writeoffs += flashchips[fn].pagesize;
size -= flashchips[fn].pagesize;
}
I hope that someone can help me to fix the problems.
Regards,
Peter Kögel
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Hi Jack,
> Many thanks for your useful answer. I do not quite understand
> the difference between openbios and linuxbios, to the
> uninitiated like me they sound like the same thing.
LinuxBIOS was started quite some time ago after the OpenBIOS project
only had a little bit of practically useless code. It concentrated on
doing the very basic initialization of a machine, i.e. dram init and
pci init. Early versions then gave control to a Linux kernel that was
able to boot another Linux kernel (so one would gain all the hardware
support to load a recent kernel from any device). By now LinuxBIOS has
many more options, like using Etherboot or the Bochs bios for booting an
OS and it can boot a couple of operating systems (including some windows
flavours afaik)
OpenBIOS basically starts where LinuxBIOS ends - it aims at implementing
an IEEE 1275-1994 Open Firmware system that is able to use the platform
independent boot code available on quite some expansion cards. Open
Firmware is available commercially on many platforms and at least Linux
and BSD know how to communicate with it. Open Firmware has an object
oriented driver design which makes it easy to write simple drivers for
hardware initialization that is not dependent on the underlying CPU
Stefan
--
The x86 isn't all that complex - it just doesn't make a lot of
sense. -- Mike Johnson, Leader of 80x86 Design at AMD
Microprocessor Report (1994)
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Dear Jack,
> Can OpenBIOS be used to initiate tftp booting across the ethernet?
> The alternatives of making a eprom memory strip, or having an eprom
> in the NIC, are more expensive and time consumming, so I am keen
> to use OpenBIOS for this.
>
> I have looked through the news history, and the web site and still
> cannot find the answer. (but of course that doesn't mean much)
Unfortunately OpenBIOS is not ready for prime time yet. I am currently
working on the forth engine and trying to fiddle vocabularies support
into it - one big step towards Package (driver) support.
You might want to have a look at LinuxBIOS though: www.linuxbios.org.
It can be used together with an etherboot payload to boot a kernel
loaded via tftp. (I'm doing the same thing on a Geode system)
Stefan
--
Laissez Faire Economics is the theory that if each acts like a vulture,
all will end as doves.
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Hi,
Can OpenBIOS be used to initiate tftp booting across the ethernet?
The alternatives of making a eprom memory strip, or having an eprom
in the NIC, are more expensive and time consumming, so I am keen
to use OpenBIOS for this.
I have looked through the news history, and the web site and still
cannot find the answer. (but of course that doesn't mean much)
Thanks Jack.
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