OpenBIOS February 2000

openbios@openbios.org

43 participants
83 discussions

initialized arrays in inflate.c
by Ronald G. Minnich 28 Feb '00

28 Feb '00

These should be declared with attribute 'const', which puts them into the .rodata segment, which means they're in the nvram. This fixes a big problem. I'm ansi-fying inflate.c now, to find other issues. ron - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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RE: [OpenBIOS] PCI enumeration?
by Wallace I. Kroeker 28 Feb '00

28 Feb '00

Hello, I posted this a little earlier: As for PCI initialization stuff you may want to check out the Ralf Brown page. He has a very nice piece of software that finds all your PCI devices with lots of information on the devices. http://www.cs.cmu.edu/afs/cs.cmu.edu/user/ralf/pub/WWW/files.html This has his interrupt list AND "RBpciv1.19 - PCI device info program". Wallace > -----Original Message----- > From: Brian Hurt [SMTP:bhurt@talkware.net] > Sent: Saturday, February 26, 2000 2:44 PM > To: OpenBios Mailing List > Subject: [OpenBIOS] PCI enumeration? > > Is anyone else out there working on adding PCI enumeration to OpenBIOS? > Any one have any pointers to code I can theft, er, reuse? I'm looking at > the function pci_scan_bus() in the linux source code (drivers/pci/pci.c), > but that looks like it just reads the results of an already-enummerated > PCI bus. > > Help would be greatly appreciated. > > Brian > > > - > To unsubscribe: send mail to majordomo(a)freiburg.linux.de > with 'unsubscribe openbios' in the body of the message - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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RE: [OpenBIOS] Aladdin V chipset
by Marcus Gossner 28 Feb '00

28 Feb '00

We are using Aladdin 4 chipset here, but the south bridge (1543C A1) maybe is the same. If you need some help in setup the configuration registers for that, feel free to contact me. Marcus > -----Original Message----- > From: Burl Nyswonger > Sent: Saturday, February 26, 2000 6:30 PM > To: openbios(a)wesley.informatik.uni-freiburg.de > Subject: [OpenBIOS] Aladdin V chipset > > > I have begun to hack on OpenBIOS and am looking to add support for x86 and > the Aladdin V chipset (ie: Super Socket7, Asus P5A, etc...). If anyone > else has started work on this, or plans to, it would be nice to talk. > > -- Burl. > > > > - > To unsubscribe: send mail to majordomo(a)freiburg.linux.de > with 'unsubscribe openbios' in the body of the message - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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A problem with the gunzip stuff.
by Ronald G. Minnich 28 Feb '00

28 Feb '00

There are initialized arrays in the inflate code. These get compiled to initialized data. The problem is, when the openbios scripts relink the code32.o stuff, this init data is relocated to 0x90000. Well, guess what ... who's going to initialize that after a reset? It's all zero's! This is kind of standard embedded processor hassle, the old 'how to init' thing. There is some sort of gcc or ld switch to say 'put init const data in with text', and I'll try that out first (it works for char strings now, so I know it's doable). If it fails, I'm turning initialize stuff into functions. That should do the trick. ron - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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Via BIOS source code
by Frank Tagliano 25 Feb '00

25 Feb '00

Via bios code on public ftp: ftp://ftp.via.com.tw/public/sw/ ______________________________________________________ Get Your Private, Free Email at http://www.hotmail.com - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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Extended BIOS Data Area (EBDA)
by Jeff Garzik 23 Feb '00

23 Feb '00

It seems the Phoenix BIOS page doesn't have info on EBDA, so I hit google :) (generic info, grep -i 'ebda') http://www.sot.com/ftp/laitteet/bios/mr_FAQ.html (specific format?, grep -in ebda) http://mvmpc9.ciw.uni-karlsruhe.de/d:/public/helppc/tables.txt (more format, grep -in 'extended bios') http://magic.hurrah.com/~sabre/os/S1Booting/BIOS_SEG.txt [CC'd to the OpenBIOS list as this might be helpful to some there, too.] Regards, Jeff -- Jeff Garzik | Building 1024 | Viva la open source! MandrakeSoft, Inc. | - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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well, I'm gunzipping allright
by Ronald G. Minnich 22 Feb '00

22 Feb '00

and there's a bug in the inflate, it is screwing up. arg! ron - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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RE: [OpenBIOS] Video (particularly 440GX)
by Marcus Gossner 22 Feb '00

22 Feb '00

> >> so, i gather that this dedicated pci bus connects to the graphics chipset. >> and since it appears as another pci device, it must implement the pci >> configuration space, and thus it has an expansion ROM base address >> register which we can determine if a BIOS exist or not. If it has one, >> then it is likely that the initialization of the graphics chip is done by >> the this BIOS instead of the system BIOS. > >Unfortunately it may not be that simple on motherboards with integrated >graphics. There is only one NVRAM chip. This NVRAM is owned by the PIIX4E >bridge. I am not sure how they would do the expansion ROM base address for >the AGP stuff. > >But it is certainly worth a look. If there is only one NVRAM the Video BIOS must be included in the system BIOS. Maybe you can do the following: - start with your original BIOS - copy the Video BIOS to a file (it starts at 0xC0000) - include the file into your BIOS - move the Video BIOS to 0xC0000 - start it I think that should work. Marcus - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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Re: [OpenBIOS] Video (particularly 440GX)
by Ronald G. Minnich 22 Feb '00

22 Feb '00

On Tue, 22 Feb 2000, Chong Chee Yong wrote: > If the system BIOS has to initialise the graphics chipset using codes from > itself (instead of the usual call to the graphics chipset BIOS), then the > system BIOS becomes less generic, probably customised for the > motherboard-graphics chip combination. I'm not sure if this would be the > usual case as it seems less cost-effective, because everytime the > graphics chip changes architecturally, the system BIOS has to change. The system bios is a bit different for every motherboard type. There are lots of subtle differences between these motherboards and each one requires tweaks. Example: the c440gx and l440gx+ motherboards are incredibly similar (check them out on intel.com). They have different BIOSes. Thanks for the ROM base address info. This could be useful. ron - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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Re: [OpenBIOS] Video (particularly 440GX)
by Ronald G. Minnich 22 Feb '00

22 Feb '00

On Tue, 22 Feb 2000, Chong Chee Yong wrote: > so, i gather that this dedicated pci bus connects to the graphics chipset. > and since it appears as another pci device, it must implement the pci > configuration space, and thus it has an expansion ROM base address > register which we can determine if a BIOS exist or not. If it has one, > then it is likely that the initialization of the graphics chip is done by > the this BIOS instead of the system BIOS. Unfortunately it may not be that simple on motherboards with integrated graphics. There is only one NVRAM chip. This NVRAM is owned by the PIIX4E bridge. I am not sure how they would do the expansion ROM base address for the AGP stuff. But it is certainly worth a look. - To unsubscribe: send mail to majordomo(a)freiburg.linux.de with 'unsubscribe openbios' in the body of the message

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