March 2013 - SerialICE - mail.coreboot.org

New patch to review for serialice: 3eefeb2 Allow compilation without ccache
by Stefan Tauner March 25, 2013

March 25, 2013

Stefan Tauner (stefan.tauner(a)gmx.at) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2901 -gerrit commit 3eefeb2098a094bab36300842afaf9dbf5d3c337 Author: Stefan Tauner <stefan.tauner(a)gmx.at> Date: Sun Oct 14 10:47:36 2012 +0200 Allow compilation without ccache Change-Id: Ib10fb87635d8e3396a692d52ed3f0524a7860a9c Signed-off-by: Stefan Tauner <stefan.tauner(a)gmx.at> --- Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 8a77582..46d4657 100644 --- a/Makefile +++ b/Makefile @@ -50,13 +50,13 @@ release: buildall: @printf "\nBuild SerialICE's QEmu\n" - @cd qemu-$(VERSION); ./configure --enable-serialice --target-list=i386-softmmu && $(MAKE) CC="ccache gcc" HOST_CC="ccache gcc" + @cd qemu-$(VERSION); ./configure --enable-serialice --target-list=i386-softmmu && $(MAKE) CC="$(CCACHE) gcc" HOST_CC="$(CCACHE) gcc" @printf "\nBuild SerialICE target stubs\n" @cd SerialICE; \ for board in `grep "^config *BOARD_" Kconfig |cut -d' ' -f2 |grep -v "^BOARD_INIT$$"`; do \ echo CONFIG_$$board=y > .config; \ - yes "" | $(MAKE) HOSTCC="ccache gcc" oldconfig && \ - $(MAKE) HOSTCC="ccache gcc" || exit 1; \ + yes "" | $(MAKE) HOSTCC="$(CCACHE) gcc" oldconfig && \ + $(MAKE) HOSTCC="$(CCACHE) gcc" || exit 1; \ mv build build-$$board; \ done

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Patch merged into serialice/master: 19a5c59 Fix QEMU build for glibc-2.17
by gerrit＠coreboot.org March 22, 2013

March 22, 2013

the following patch was just integrated into master: commit 19a5c59caaf4b064d1d75970ce2e9e62aad0635b Author: Idwer Vollering <vidwer(a)gmail.com> Date: Mon Feb 25 03:49:04 2013 +0100 Fix QEMU build for glibc-2.17 The clock_* functions are no longer in librt starting with glibc-2.17, but timer_* functions are. This solves linker errors similar to this: (32-bit archlinux installation with glibc 2.17-3, binutils 2.23.1-3, glib2 2.34.3-1) /usr/bin/ld: ../qemu-timer.o: undefined reference to symbol 'timer_settime@@GLIBC_2.2' /usr/bin/ld: note: 'timer_settime@@GLIBC_2.2' is defined in DSO /usr/lib/librt.so.1 so try adding it to the linker command line /usr/lib/librt.so.1: could not read symbols: Invalid operation Change-Id: I2d335d065457788ef8aada7d0d500e84ba31e4d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2504 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sun Mar 17 19:10:47 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri Mar 22 16:31:37 2013, giving +2 See http://review.coreboot.org/2504 for details. -gerrit

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Patch merged into serialice/master: 8f48f50 Do not build without compatible Lua
by gerrit＠coreboot.org March 22, 2013

March 22, 2013

the following patch was just integrated into master: commit 8f48f5069b988ad07d63256ffd1a7ddcbbb5c619 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 16 13:12:01 2013 +0200 Do not build without compatible Lua The pre-built Lua library for 32bit distribution is most likely built with the type of LUA_INTEGER having essentially range of signed 32bit integer. SerialICE requires range of 32bit unsigned, so do not even begin the build if that is not satisfied. Change-Id: Icb93d0126aac5e6e6aaa49cb04a2ebb6077389f1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2772 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Sun Mar 17 19:16:49 2013, giving +1 See http://review.coreboot.org/2772 for details. -gerrit

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Patch merged into serialice/master: 2cbc13e Fix generation of shared LUA library.
by gerrit＠coreboot.org March 22, 2013

March 22, 2013

the following patch was just integrated into master: commit 2cbc13e8d14aabb4523a3a0e4439d8a25839110c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 16 13:11:38 2013 +0200 Fix generation of shared LUA library. Include library dependencies '-lm -ldl' in the generation of the shared LUA library already, in case user has to install patched LUA from source. Change-Id: I90e46828ea72862f7d06002df230dd6f348437eb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2771 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sat Mar 16 12:58:35 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri Mar 22 16:30:20 2013, giving +2 See http://review.coreboot.org/2771 for details. -gerrit

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Patch merged into serialice/master: f2f55a8 Move board and chipset files
by gerrit＠coreboot.org March 20, 2013

March 20, 2013

the following patch was just integrated into master: commit f2f55a80cbd7a439d1cb23b50815949ff8a2f423 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 9 10:37:43 2013 +0200 Move board and chipset files Add some structure to the tree and improve script loading. Change-Id: I18221246a706faa278032b4f6444bbcbb93cefeb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2704 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Tue Mar 19 12:49:01 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Wed Mar 20 05:52:33 2013, giving +2 See http://review.coreboot.org/2704 for details. -gerrit

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Patch set updated for serialice: 0a53d64 Move board and chipset files
by Kyösti Mälkki March 19, 2013

March 19, 2013

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2704 -gerrit commit 0a53d64b537cafa37bdf05dfc3a7062497f80978 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 9 10:37:43 2013 +0200 Move board and chipset files Add some structure to the tree and improve script loading. Change-Id: I18221246a706faa278032b4f6444bbcbb93cefeb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/aopen_dxpl_plus.lua | 142 ------ SerialICE/simba/asrock_775i65g.lua | 13 - SerialICE/simba/asus_p4p800_vm.lua | 84 ---- SerialICE/simba/chipset/i82801.lua | 182 ++++++++ SerialICE/simba/chipset/intel_bars.lua | 110 +++++ SerialICE/simba/chipset/intel_smbus.lua | 258 +++++++++++ SerialICE/simba/chipset/pc80.lua | 534 ++++++++++++++++++++++ SerialICE/simba/chipset/smbus_host.lua | 558 +++++++++++++++++++++++ SerialICE/simba/chipset/superio.lua | 262 +++++++++++ SerialICE/simba/chipset/via_bars.lua | 30 ++ SerialICE/simba/commell_lv_672.lua | 57 --- SerialICE/simba/conroexfire_esata2.lua | 86 ---- SerialICE/simba/i82801.lua | 182 -------- SerialICE/simba/intel_bars.lua | 110 ----- SerialICE/simba/intel_d845gbv2.lua | 92 ---- SerialICE/simba/intel_d946gzis.lua | 77 ---- SerialICE/simba/intel_smbus.lua | 258 ----------- SerialICE/simba/mainboard/aopen_dxpl_plus.lua | 142 ++++++ SerialICE/simba/mainboard/asrock_775i65g.lua | 13 + SerialICE/simba/mainboard/asus_p4p800_vm.lua | 84 ++++ SerialICE/simba/mainboard/commell_lv_672.lua | 57 +++ SerialICE/simba/mainboard/conroexfire_esata2.lua | 86 ++++ SerialICE/simba/mainboard/intel_d845gbv2.lua | 92 ++++ SerialICE/simba/mainboard/intel_d946gzis.lua | 77 ++++ SerialICE/simba/mainboard/msi_ms7133.lua | 69 +++ SerialICE/simba/mainboard/via_epia_m_850.lua | 164 +++++++ SerialICE/simba/msi_ms7133.lua | 69 --- SerialICE/simba/pc80.lua | 534 ---------------------- SerialICE/simba/serialice.lua | 17 +- SerialICE/simba/smbus_host.lua | 558 ----------------------- SerialICE/simba/superio.lua | 262 ----------- SerialICE/simba/via_bars.lua | 30 -- SerialICE/simba/via_epia_m_850.lua | 164 ------- 33 files changed, 2730 insertions(+), 2723 deletions(-) diff --git a/SerialICE/simba/aopen_dxpl_plus.lua b/SerialICE/simba/aopen_dxpl_plus.lua deleted file mode 100644 index e8284d3..0000000 --- a/SerialICE/simba/aopen_dxpl_plus.lua +++ /dev/null @@ -1,142 +0,0 @@ --- SerialICE --- --- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- --- Permission is hereby granted, free of charge, to any person obtaining a copy --- of this software and associated documentation files (the "Software"), to deal --- in the Software without restriction, including without limitation the rights --- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell --- copies of the Software, and to permit persons to whom the Software is --- furnished to do so, subject to the following conditions: --- --- The above copyright notice and this permission notice shall be included in --- all copies or substantial portions of the Software. --- --- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR --- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, --- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL --- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER --- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, --- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN --- THE SOFTWARE. --- - -dofile("i82801.lua") -dofile("intel_bars.lua") - --- ********************************************************** --- - -function mainboard_io_read(f, action) - -- Some timer loop - if ( action.addr == 0x61 ) then - if ( regs.eip == 0x1634 ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x20) - end - if ( regs.eip == 0x163a ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x30) - end - end - - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - -- Catch RAM controller ready. - if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then - enable_ram() - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xed then - if ( regs.eip == 0x1792 ) then - regs.ecx = 0x01 - end -if false then - -- SIPI delay - if ( regs.eip == 0xb3bc or regs.eip == 0xb3bf ) then - regs.ecx = 0x01 - end - if ( regs.eip == 0xb4ad or regs.eip == 0xb4af ) then - regs.ecx = 0x01 - end -end - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xed or action.addr == 0xcfb then - return true - end - - -- If KBD controller returns status=0xff, clear 0x02. - if action.addr == 0x64 and not action.write and action.size == 1 then - if action.data == 0xff then - -- tag these but give out correct data - fake_action(f, action, action.data) - end - end -end - -filter_mainboard = { - name = "AOpen", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - - -function do_mainboard_setup() - enable_hook(io_hooks, filter_pci_io_cfg) - enable_hook(mem_hooks, filter_lapic) - enable_hook(mem_hooks, filter_ioapic) - - enable_hook(cpumsr_hooks, filter_intel_microcode) - enable_hook(cpuid_hooks, filter_multiprocessor) - - -- I have a hook to detect RAM initialisation from - -- a POST code I can skip this here - --enable_ram() - - enable_hook_pc80() - enable_hook_superio(0x2e, 0x07) - --enable_hook(io_hooks, filter_com1) - enable_hook_i82801dx() - northbridge_e7505() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/asrock_775i65g.lua b/SerialICE/simba/asrock_775i65g.lua deleted file mode 100644 index 7aeb68d..0000000 --- a/SerialICE/simba/asrock_775i65g.lua +++ /dev/null @@ -1,13 +0,0 @@ - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801dx() - northbridge_i845() - - -- Apply mainboard hooks last, so they are the first ones to check - --enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/asus_p4p800_vm.lua b/SerialICE/simba/asus_p4p800_vm.lua deleted file mode 100644 index e4ed836..0000000 --- a/SerialICE/simba/asus_p4p800_vm.lua +++ /dev/null @@ -1,84 +0,0 @@ - - -function mainboard_io_read(f, action) - -- Some timer loop - if ( action.addr == 0x61 ) then - if ( regs.eip == 0x1634 ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x20) - end - if ( regs.eip == 0x163a ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x30) - end - end - - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xe1 then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then - return true - end - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "test", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801dx() - northbridge_i845() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/chipset/i82801.lua b/SerialICE/simba/chipset/i82801.lua new file mode 100644 index 0000000..24da007 --- /dev/null +++ b/SerialICE/simba/chipset/i82801.lua @@ -0,0 +1,182 @@ +-- ********************************************************** +-- +-- SMBus controller handling + + +load_filter("intel_smbus") + +function smbus_bar_hook(f, action) + intel_smbus_setup(action.data, 0x20) +end + +dev_sb_lpc = { + pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), + name = "Smbus", + bar = {}, +} + +function enable_smbus_host_bar() + pci_cfg16_hook(dev_sb_lpc, 0x20, "SMBus", smbus_bar_hook) +end + + +-- ********************************************************** +-- + +dev_power = { + pci_dev = pci_bdf(0x0,0x1f,0x0,0x0), + name = "SYS", + bar = {}, + acpi = { f = nil }, + tco = { f = nil }, +} + +function pm_io_bar(f, action) + f.dev.acpi.name = "ACPI" + f.dev.acpi.val = action.data + f.dev.acpi.size = 0x60 + generic_io_bar(f.dev.acpi) + + f.dev.tco.name = "TCO" + f.dev.tco.val = action.data + 0x60 + f.dev.tco.size = 0x20 + generic_io_bar(f.dev.tco) +end + +function lpc_io_bar(f, action) + local base = bit32.band(action.data, 0xffff) + local mask = bit32.bor(bit32.rshift(action.data, 16), 3) + local size = mask + 1 + + base = bit32.band(base, bit32.bnot(mask)) + + add_bar(f.dev, f.reg, "LPC", size) + f.dev.bar[f.reg].val = base + generic_io_bar(f.dev.bar[f.reg]) +end + +function lpc_protect_serial_port(f, action) + drop_action(f, action, 0) +end + +-- ********************************************************** +-- +-- AC '97 controller handling + + +dev_audio = { + pci_dev = pci_bdf(0x0,0x1f,0x5,0x0), + name = "Audio", + bar = {} +} + +function enable_audio_bars() + add_io_bar(dev_audio, 0x10, "NAMBAR", 0x100) + add_io_bar(dev_audio, 0x14, "NABMBAR", 0x40) + add_mem_bar(dev_audio, 0x18, "MMBAR", 0x200) + add_mem_bar(dev_audio, 0x1C, "MBBAR", 0x100) +end + +dev_modem = { + pci_dev = pci_bdf(0x0,0x1f,0x6,0x0), + name = "Modem", + bar = {} +} + +function enable_modem_bars() + add_io_bar(dev_modem, 0x10, "MMBAR", 0x100) + add_io_bar(dev_modem, 0x14, "MBAR", 0x80) +end + + +-- ********************************************************** +-- +-- i82801dx + +function enable_dx_power_bars() + pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) + add_io_bar(dev_power, 0x58, "GPIO", 0x40) +end + +function enable_dx_lpc_bars() + pci_cfg8_hook(dev_power, 0xe0, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0xe6, "LPC", lpc_protect_serial_port) + + add_io_bar(dev_power, 0xe4, "LPC1", 0x80) + add_io_bar(dev_power, 0xec, "LPC2", 0x10) +end + +function enable_hook_i82801dx() + enable_smbus_host_bar() + enable_dx_power_bars() + enable_dx_lpc_bars() + enable_audio_bars() + enable_modem_bars() +end + +-- ********************************************************** +-- +-- i82801fx + +function enable_fx_power_bars() + pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) + add_io_bar(dev_power, 0x48, "GPIO", 0x40) +end + +function enable_fx_lpc_bars() + add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) + + pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + + add_io_bar(dev_power, 0x84, "LPC1", 0x80) + add_io_bar(dev_power, 0x88, "LPC2", 0x40) +end + +function enable_hook_i82801fx() + enable_smbus_host_bar() + enable_fx_power_bars() + enable_fx_lpc_bars() +end + +-- ********************************************************** +-- +-- i82801gx + +-- ICH7 TPM +-- Phoenix "Secure" Core bails out if we don't pass the read on ;-) +filter_ich7_tpm = { + name = "ICH7 TPM", + pre = mem_target_only, + post = mem_post, + decode = F_RANGE, + base = 0xfed40000, + size = 0x00001000, + hide = true +} + +function enable_gx_power_bars() + pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) + add_io_bar(dev_power, 0x48, "GPIO", 0x40) +end + +function enable_gx_lpc_bars() + pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + + pci_cfg32_hook(dev_power, 0x84, "LPC", lpc_io_bar) + pci_cfg32_hook(dev_power, 0x88, "LPC", lpc_io_bar) + pci_cfg32_hook(dev_power, 0x8c, "LPC", lpc_io_bar) + pci_cfg32_hook(dev_power, 0x90, "LPC", lpc_io_bar) +end + +function enable_hook_i82801gx() + enable_hook(mem_hooks, filter_ich7_tpm) + add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) + enable_smbus_host_bar() + enable_gx_power_bars() + enable_gx_lpc_bars() +end + + + diff --git a/SerialICE/simba/chipset/intel_bars.lua b/SerialICE/simba/chipset/intel_bars.lua new file mode 100644 index 0000000..0841a23 --- /dev/null +++ b/SerialICE/simba/chipset/intel_bars.lua @@ -0,0 +1,110 @@ +-- ********************************************************** +-- Intel i845 + +dev_i845_mch2 = { + pci_dev = pci_bdf(0x0,0x6,0x0,0x0), + name = "MCH", + bar = {} +} + +function northbridge_i845() + add_mem_bar(dev_i845_mch2, 0x10, "RCOMP", 0x1000) +end + +-- ********************************************************** +-- Intel e7505 + +dev_e7505_mch = { + pci_dev = pci_bdf(0x0,0x0,0x0,0x0), + name = "MCH", + bar = {} +} + +function northbridge_e7505() + add_mem_bar(dev_e7505_mch, 0x14, "RCOMP", 0x1000) +end + + +-- ********************************************************** +-- Intel 82915 PCIe BAR + +dev_i915 = { + pci_dev = pci_bdf(0,0,0,0), + name = "i915", + bar = {}, +} + +function i915_pcie_bar(f, action) + local baseaddr = bit32.band(action.data, 0xf0000000) + local size = 256*1024*1024 + + -- enable is 0:00.0 [054] .31 + if true then + pcie_mm_enable(f.dev, f.reg, baseaddr, size) + else + pcie_mm_disable(f.dev, f.reg, baseaddr, size) + end +end + +function northbridge_i915() + add_mem_bar(dev_i915, 0x40, "EPBAR", 4*1024) + add_mem_bar(dev_i915, 0x44, "MCHBAR", 16*1024) + add_mem_bar(dev_i915, 0x4c, "DMIBAR", 4*1024) + pci_cfg32_hook(dev_i915, 0x48, "PCI", i915_pcie_bar) +end + +-- ********************************************************** +-- Intel 82945 PCIe BAR + +function i945_pcie_bar(f, action) + local base = action.data + local sizebits = bit32.band(bit32.rshift(base, 1), 0x3) + local baseaddr = 0 + local size = 0 + + if sizebits == 0 then + size = 256*1024*1024 + baseaddr = bit32.band(base, 0xf0000000) + elseif sizebits == 1 then + size = 128*1024*1024 + baseaddr = bit32.band(base, 0xf8000000) + elseif sizebits == 2 then + size = 64*1024*1024 + baseaddr = bit32.band(base, 0xfc000000) + else + -- undefined, really + baseaddr = bit32.band(base, 0xfe000000) + size = 32*1024*1024 + end + + if bit32.band(base, 1) ~= 0 then + pcie_mm_enable(f.dev, f.reg, baseaddr, size) + else + pcie_mm_disable(f.dev, f.reg, baseaddr, size) + end +end + +dev_i945 = { + pci_dev = pci_bdf(0,0,0,0), + name = "i945", + bar = {}, +} + +function northbridge_i945() + add_mem_bar(dev_i945, 0x40, "EPBAR", 4*1024) + add_mem_bar(dev_i945, 0x44, "MCHBAR", 16*1024) + add_mem_bar(dev_i945, 0x4c, "DMIBAR", 4*1024) + add_mem_bar(dev_i945, 0x60, "(unknown)", 4*1024) + + pci_cfg32_hook(dev_i945, 0x48, "PCI", i945_pcie_bar) +end + +function northbridge_i946() + add_mem_bar(dev_i945, 0x40, "PXPEPBAR", 4*1024) + add_mem_bar(dev_i945, 0x48, "MCHBAR", 16*1024) + add_mem_bar(dev_i945, 0x68, "DMIBAR", 4*1024) + + pci_cfg32_hook(dev_i945, 0x60, "PCI", i945_pcie_bar) +end + + diff --git a/SerialICE/simba/chipset/intel_smbus.lua b/SerialICE/simba/chipset/intel_smbus.lua new file mode 100644 index 0000000..1c2606d --- /dev/null +++ b/SerialICE/simba/chipset/intel_smbus.lua @@ -0,0 +1,258 @@ + + +load_filter("smbus_host") + +-- ******************************************** +-- Intel 82801 SMBus Host controller + +I801_SMB_HSTSTS = 0 +I801_SMB_HSTCNT = 2 +I801_SMB_HSTCMD = 3 +I801_SMB_HSTADD = 4 +I801_SMB_HSTDAT0 = 5 +I801_SMB_HSTDAT1 = 6 +I801_SMB_BLKDAT = 7 +I801_SMB_PEC = 8 +I801_SMB_AUXSTS = 12 +I801_SMB_AUXCTL = 13 + +I801_QUICK = 0x00 +I801_BYTE = 0x04 +I801_BYTE_DATA = 0x08 +I801_WORD_DATA = 0x0C +I801_PROC_CALL = 0x10 +I801_BLOCK_DATA = 0x14 +I801_I2C_BLOCK_DATA = 0x18 +I801_BLOCK_PROCESS = 0x1C +I801_BLOCK_LAST = 0x34 -- 0x14 | 0x20 +I801_I2C_BLOCK_LAST = 0x38 -- 0x18 | 0x20 +I801_START = 0x40 +I801_PEC_EN = 0x80 + + +local function intel_smbus_get_protocol(f) + local proto = bit32.band(f.reg.control, 0x1c) + + if proto == I801_QUICK then + return SMBUS_QUICK + + elseif proto == I801_BYTE then + return SMBUS_BYTE + + elseif proto == I801_BYTE_DATA then + return SMBUS_BYTE_DATA + + elseif proto == I801_WORD_DATA then + return SMBUS_WORD_DATA + + elseif proto == I801_PROC_CALL then + return SMBUS_PROC_CALL + + elseif proto == I801_BLOCK_DATA then + return SMBUS_BLOCK_DATA + + elseif proto == I801_I2C_BLOCK_DATA then + return SMBUS_I2C_BLOCK_DATA + + elseif proto == I801_BLOCK_PROCESS then + return SMBUS_BLOCK_PROCESS + + else + printk(f, action, "Unknown protocol\n") + return SMBUS_NOOP + end +end + +local function intel_smbus_host_status(f, action) + if not action.write then + if smbus.passive(f) then + f.reg.status = action.data; + end + + if smbus.state(f, HOST_IDLE) then + if not smbus.passive(f) then + f.reg.status = 0x0 + end + if bit32.band(f.reg.status, 0x40) ~= 0 then + printk(f, action, "Host may be busy, ignoring.\n") + end + smbus.get_resource(f) + + elseif smbus.state(f, HOST_ACTIVE) then + f.reg.busy_count = 3 + + elseif smbus.state(f, HOST_STARTED) then + if not smbus.passive(f) then + f.reg.status = bit32.band(f.reg.status, 0xFE) + if f.reg.busy_count > 0 then + f.reg.busy_count = f.reg.busy_count - 1 + f.reg.status = bit32.bor(f.reg.status, 0x01) + end + if bit32.band(f.reg.status, 0x02) == 0 then + smbus_transaction(host) + end + end + + local irq = bit32.band(f.reg.status, 0x02) ~= 0 + local failures = bit32.band(f.reg.status, 0x1c) ~= 0 + local host_busy = bit32.band(f.reg.status, 0x01) ~= 0 + + if irq and not host_busy then + smbus.done(f) + end + if failures then + smbus.timeout(f) + end + end + + if not smbus.passive(f) then + action.data = f.reg.status; + f.reg.status = bit32.bor(f.reg.status, 0x40) + end + else + + if not smbus.passive(f) then + f.reg.status = bit32.band(f.reg.status, bit32.bnot(action.data)) + end + + local ack_irq = bit32.band(action.data, 0x02) ~= 0 + local release_host = bit32.band(action.data, 0x40) ~= 0 + local failures = bit32.band(action.data, 0x1c) ~= 0 + if release_host then + smbus.put_resource(f) + end + if failures then + smbus.timeout_ack(f) + end + if ack_irq then + smbus.ack(f) + end + end + +end + + +local function intel_smbus_host_control(f, action) + + if not action.write then + f.reg.block_ptr=0; + if not smbus.passive(f) then + action.data = bit32.band(f.reg.control, bit32.bnot(0x40)) + end + + else + + f.reg.control = action.data; + if bit32.band(f.reg.control, 0x80) ~= 0 then + printk(f, action, "No PEC simulation\n") + end + + local abort = bit32.band(f.reg.control, 0x02) ~= 0 + local start = bit32.band(f.reg.control, 0x40) ~= 0 + if abort then + smbus.abort(f) + end + if start then + f.reg.block_ptr=0; + smbus.update_register(f, action, SMB_REG_PROTO) + smbus.start(f, intel_smbus_get_protocol(f)) + end + end +end + + + +local function intel_smbus_block_data(f, action) + if f.reg.block_ptr < MAX_BLOCK_SRAM then + smbus.block_data(f, action, f.reg.block_ptr) + end + f.reg.block_ptr = f.reg.block_ptr + 1 + smbus.update_register(f, action, SMB_REG_BLOCK) +end + +local function intel_smbus_host_access(f, action) + local reg = bit32.band(action.addr, (f.size-1)) + + -- mirror hw register both ways + local data_write = 0 + + -- Store this to display CS:IP etc. + f.host.action = action + + if reg == I801_SMB_HSTSTS then + intel_smbus_host_status(f, action); + + elseif reg == I801_SMB_HSTCNT then + intel_smbus_host_control(f, action); + + elseif reg == I801_SMB_HSTCMD then + smbus.update_register(f, action, SMB_REG_CMD) + + elseif reg == I801_SMB_HSTADD then + smbus.update_register(f, action, SMB_REG_SLAVE) + + elseif reg == I801_SMB_HSTDAT0 then + smbus.update_register(f, action, SMB_REG_DATA0) + + elseif reg == I801_SMB_HSTDAT1 then + smbus.update_register(f, action, SMB_REG_DATA1) + + elseif reg == I801_SMB_BLKDAT then + intel_smbus_block_data(f, action); + + elseif reg == I801_SMB_AUXSTS then + if data_write then + f.reg.aux_sts = action.data; + else + action.data = f.reg.aux_sts; + end + + elseif reg == I801_SMB_AUXCTL then + if data_write then + f.reg.aux_ctl = action.data; + else + action.data = f.reg.aux_ctl; + end + + else + printk(f, action, "Unknown register 0x%02x\n", reg); + end +end + + +function intel_smbus_host_pre(f, action) + if action.write then + intel_smbus_host_access(f, action) + end + return handle_action(f, action) +end + +function intel_smbus_host_post(f, action) + if not action.write then + intel_smbus_host_access(f, action) + end + return true +end + + +local intel_smbus_host = { + name = "i801-smbus", + pre = intel_smbus_host_pre, + post = intel_smbus_host_post, + hide = hide_smbus_io, + base = 0x0, + size = 0x0, +} + +function intel_smbus_setup(base, size) + local f = intel_smbus_host + f.base = bit32.band(base, bit32.bnot(size-1)) + f.size = size + if not f.reg then + f.reg = { control = 0, status = 0, busy_count = 0, block_ptr = 0, aux_ctl = 0, aux_sts = 0 } + end + smbus.init(f) + + enable_hook(io_hooks, f) +end + diff --git a/SerialICE/simba/chipset/pc80.lua b/SerialICE/simba/chipset/pc80.lua new file mode 100644 index 0000000..35d01e3 --- /dev/null +++ b/SerialICE/simba/chipset/pc80.lua @@ -0,0 +1,534 @@ +-- ********************************************************** +-- +-- Debug POST port at IO 0x80 + +function debugport_post(f, action) + if action.write then + printk(f, action, "*** %02x ***\n", action.data) + return true + end + return false +end + +filter_debugport = { + name = "POST", + pre = handle_action, + post = debugport_post, + hide = true, + base = 0x80, + size = 0x1 +} + + +-- ********************************************************** +-- +-- i8259 PIC + +function i8259_pre(f, action) + local master = (bit32.rshift(0x05, action.addr) == 0x1) + local slave = (bit32.rshift(0x05, action.addr) == 0x5) + local reg = bit32.band(0x03, action.addr) + if reg == 0 or reg == 1 then + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8259_post(f,action) + local reg = bit32.band(0x03, action.addr) + if reg == 0 or reg == 1 then + return true + end + return false +end + +function i8259_edge_pre(f, action) + return handle_action(f, action) +end + +function i8259_edge_post(f,action) + return true +end + +filter_i8259_master = { + name = "i8259 A", + pre = i8259_pre, + post = i8259_post, + hide = hide_i8259_io, + base = 0x20, + size = 0x20 +} + +filter_i8259_slave = { + name = "i8259 B", + pre = i8259_pre, + post = i8259_post, + hide = hide_i8259_io, + base = 0xa0, + size = 0x20 +} + +filter_i8259_edge = { + name = "i8259 C", + pre = i8259_edge_pre, + post = i8259_edge_post, + hide = hide_i8259_io, + base = 0x4d0, + size = 0x2 +} + +-- ********************************************************** +-- +-- i8237 DMA + +function i8237_pre(f, action) + if action.addr == 0x80 then + return skip_filter(f, action) + end + return handle_action(f, action) +end + +function i8237_post(f, action) + if action.addr == 0x80 then + return false + end + return true +end + + +filter_i8237_a = { + name = "i8237 A", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0x00, + size = 0x20 +} +filter_i8237_b = { + name = "i8237 B", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0x80, + size = 0x20 +} +filter_i8237_c = { + name = "i8237 C", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0xc0, + size = 0x20 +} + + +-- ********************************************************** +-- +-- i8254 IRQ0 and Speaker + +function i8254_pre(f, action) + + -- nothing to do on reads + if not action.write then + return handle_action(f, action) + end + + local reg = bit32.band(0x03, action.addr) + if reg >= 0x0 and reg < 0x03 then + local counter_n = 0 + local counter_p = 0 + if f.counter[reg].lsb then + f.counter[reg].lsb = f.counter[reg].after_lsb + counter_n = action.data + counter_p = bit32.band(0xff00, f.counter[reg].init) + else + counter_n = bit32.lshift(action.data, 8) + counter_p = bit32.band(0x00ff, f.counter[reg].init) + end + f.counter[reg].init = bit32.bor(counter_n, counter_p) + elseif reg == 0x03 then + local reg2 = bit32.rshift(action.data, 6) + local rwsel = bit32.band(0x3, bit32.rshift(action.data, 4)) + if reg2 == 0x3 then + if bit32.band(0x10, action.data) == 0 then + f.counter[0].readback = (bit32.band(0x2, action.data) ~= 0) + f.counter[1].readback = (bit32.band(0x4, action.data) ~= 0) + f.counter[2].readback = (bit32.band(0x8, action.data) ~= 0) + end + if bit32.band(0x20, action.data) == 0 then + f.counter[0].latch = (bit32.band(0x2, action.data) ~= 0) + f.counter[1].latch = (bit32.band(0x4, action.data) ~= 0) + f.counter[2].latch = (bit32.band(0x8, action.data) ~= 0) + end + elseif rwsel == 0x0 then + f.counter[reg2].latch = true + else + f.counter[reg2].mode = bit32.band(0xf, action.data) + if rwsel == 0x1 then + f.counter[reg2].lsb = true + f.counter[reg2].after_lsb = true + elseif rwsel == 0x2 then + f.counter[reg2].lsb = false + f.counter[reg2].after_lsb = false + elseif rwsel == 03 then + f.counter[reg2].lsb = true + f.counter[reg2].after_lsb = false + end + end + end + return handle_action(f, action) +end + +function i8254_post(f, action) + local reg = bit32.band(0x03, action.addr) + if reg >= 0x0 and reg < 0x03 then + if action.write then + local mode = bit32.band(0x0f, f.counter[reg].mode); + local modestr = "Mode" .. mode + if mode == 0x4 then + modestr = "Square Wave" + elseif mode == 0x6 then + modestr = "Rate Generator" + end + if bit32.band(0x01, mode) ~= 0 then + modestr = modestr .. " (BCD)" + end + + local period = 838 * f.counter[reg].init + if reg == 0 then + if period == 0 then + printk(f, action, "IRQ0 disabled\n") + else + printk(f, action, "IRQ0 (%s): %d ns\n", modestr, period) + end + elseif reg == 1 then + if period == 0 then + printk(f, action, "Refresh disabled\n") + else + printk(f, action, "Refresh (%s): %d ns\n", modestr, period) + end + elseif reg == 2 then + if period ~= 0 then + local spktone = 1193000 / f.counter[reg].init + printk(f, action, "Speaker Tone (%s): %d kHz\n", modestr, spktone) + end + end + else + if f.counter[reg].readback then + f.counter[reg].readback = false + f.counter[reg].status = action.data + printk(f, action, "[%d] status = %02x\n", reg, f.counter[reg].status) + end + if f.counter[reg].latch then + f.counter[reg].latch = false + f.counter[reg].current = action.data + printk(f, action, "[%d] current = %d\n", reg, f.counter[reg].current) + end + end + elseif reg == 0x03 then + end + return true +end + +i8254_counters = {} +i8254_counters[0x0] = { init=0, current=0, latch, readback, status=0 } +i8254_counters[0x1] = { init=0, current=0, latch, readback, status=0 } +i8254_counters[0x2] = { init=0, current=0, latch, readback, status=0 } + +filter_i8254_a = { + name = "i8254 A", + pre = i8254_pre, + post = i8254_post, + base = 0x40, + hide = hide_i8254_io, + size = 4, + counter = i8254_counters, +} +filter_i8254_b = { + name = "i8254 B", + pre = i8254_pre, + post = i8254_post, + base = 0x50, + hide = hide_i8254_io, + size = 4, + counter = i8254_counters, +} + + +-- ********************************************************** +-- +-- i8042 KBD, A20, Reset(?) + +function i8042_write(f, action) + if action.addr == 0x60 then + f.reg.data = action.data + f.reg.sts = bit32.band(f.reg.sts, 0xf7) + if (f.reg.cmd == 0xd1) then + f.reg.A20 = (bit32.band(0x02, action.data) == 0x02) + end + return handle_action(f, action) + end + if action.addr == 0x64 then + f.reg.cmd = action.data + f.reg.sts = bit32.bor(f.reg.sts, 0x0a) + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8042_read(f, action) + if action.addr == 0x60 then + f.reg.sts = bit32.band(f.reg.sts, 0xfe) + return handle_action(f, action) + end + if action.addr == 0x64 then + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8042_pre(f, action) + if (action.write) then + return i8042_write(f, action) + else + return i8042_read(f, action) + end +end + +function i8042_post(f, action) + if action.addr == 0x60 then + if action.write and f.reg.cmd == 0xd1 then + if f.reg.A20 then + printk(f, action, "A20 enabled\n") + else + printk(f, action, "A20 disabled\n") + end + end + return true + end + if action.addr == 0x64 then + return true + end + return false +end + +filter_i8042 = { + decode = F_FIXED, + name = "i8042", + pre = i8042_pre, + post = i8042_post, + hide = hide_i8042_io, + base = 0x60, + size = 0x5, + reg = { data = 0, sts = 0, cmd = 0, A20 = 0 } +} + + +-- ********************************************************** +-- +-- CMOS nvram + + +function nvram_bank(addr) + if bit32.band(0xfe, addr) == 0x70 then + return 1 + elseif bit32.band(0xfe, addr) == 0x72 then + return 2 + elseif bit32.band(0xfe, addr) == 0x74 then + return 2 + else + return 0 + end +end + +function nvram_write(f, action) + local val = action.data + local rtc = false + local is_index = (bit32.band(0x01, action.addr) == 0x0) + local bank = nvram_bank(action.addr) + + if bank == 1 then + if is_index then + f.reg.p70 = bit32.band(0x7f, val) + if f.reg.p70 < 0x0E then + rtc = true + end + else + f.nvram_data[f.reg.p70] = val + f.nvram_set[f.reg.p70] = true + if f.reg.p70 < 0x0E then + rtc = true + end + end + elseif bank == 2 then + if is_index then + f.reg.p72 = bit32.band(0x7f, val) + else + local index = 0x80 + f.reg.p72 + f.nvram_data[index] = val + f.nvram_set[index] = true + end + end + if cache_nvram and not rtc then + return fake_action(f, action, val) + else + return handle_action(f, action) + end +end + +function nvram_read(f, action) + local val = 0 + local rtc = false + local is_index = (bit32.band(0x01, action.addr) == 0x0) + local bank = nvram_bank(action.addr) + + if bank == 1 then + if is_index then + -- NMI returned as 0 + val = f.reg.p70 + if f.reg.p70 < 0x0E then + rtc = true + end + else + if f.reg.p70 < 0x0E then + rtc = true + elseif f.nvram_set[f.reg.p70] then + val = f.nvram_data[f.reg.p70] + end + end + else -- bank + if is_index then + -- NMI returned as 0 + val = f.reg.p72 + else + local index = 0x80 + f.reg.p72 + if f.nvram_set[index] then + val = f.nvram_data[index] + end + end + end + if cache_nvram and not rtc then + return fake_action(f, action, val) + else + return handle_action(f, action) + end +end + +function nvram_pre(f, action) + if (action.write) then + return nvram_write(f, action) + else + return nvram_read(f, action) + end +end + +function nvram_post(f, action) + if bit32.band(0x01, action.addr) == 0x0 then + return true + end + + local bank = nvram_bank(action.addr) + if (action.write) then + if bank == 1 then + printk(f, action, "[%02x] <= %02x\n", f.reg.p70, action.data) + elseif bank == 2 then + printk(f, action, "[%02x] <= %02x\n", 0x80 + f.reg.p72, action.data) + end + else + if bank == 1 then + printk(f, action, "[%02x] => %02x\n", f.reg.p70, action.data) + elseif bank == 2 then + printk(f, action, "[%02x] => %02x\n", 0x80 + f.reg.p72, action.data) + end + end + return true +end + +filter_nvram = { + name = "NVram", + pre = nvram_pre, + post = nvram_post, + base = 0x70, + size = 8, + hide = hide_nvram_io, + reg = { p70 = 0, p72 = 0 }, + nvram_data = {}, + nvram_set = {}, +} + + +-- ********************************************************** +-- +-- Reset at 0xcf9 + +function sys_rst_pre(f, action) + if action.size == 1 then + if action.write and bit32.band(action.data, 0x04) == 0x04 then + SerialICE_system_reset() + end + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function sys_rst_post(f, action) + if action.size == 1 then + if action.write then + printk(f, action, "Control = %02x\n", action.data) + return true + end + end + return false +end + +filter_reset = { + name = "Reset", + pre = sys_rst_pre, + post = sys_rst_post, + hide = false, + base = 0xcf9, + size = 1 +} + +-- ********************************************************** +-- +-- VGA io + +function vga_io_pre(f, action) + return skip_filter(f, action) +end + +function vga_io_post(f, action) + return true +end + +filter_vga_io = { + name = "VGA", + pre = vga_io_pre, + post = vga_io_post, + hide = false, + base = 0x3c0, + size = 0x20, +} + + +-- ********************************************************** +-- +-- Enable all PC80 stuff + +function enable_hook_pc80() + enable_hook(io_hooks, filter_i8237_a) + enable_hook(io_hooks, filter_i8237_b) + enable_hook(io_hooks, filter_i8237_c) + enable_hook(io_hooks, filter_i8259_master) + enable_hook(io_hooks, filter_i8259_slave) + enable_hook(io_hooks, filter_i8259_edge) + enable_hook(io_hooks, filter_i8042) + enable_hook(io_hooks, filter_i8254_a) + enable_hook(io_hooks, filter_i8254_b) + enable_hook(io_hooks, filter_reset) + enable_hook(io_hooks, filter_nvram) + enable_hook(io_hooks, filter_vga_io) + enable_hook(io_hooks, filter_debugport) +end + diff --git a/SerialICE/simba/chipset/smbus_host.lua b/SerialICE/simba/chipset/smbus_host.lua new file mode 100644 index 0000000..1da4b0c --- /dev/null +++ b/SerialICE/simba/chipset/smbus_host.lua @@ -0,0 +1,558 @@ + + +local debug_smbus = false +smbus = {} + +smbus.host = { + state = { current = 0, jump_to = 0 }, + proto = 0, + start_proto = 0, + + passive = true, + signals = 0, + + slave = 0, + cmd = 0, + data0 = 0, + data1 = 0, + data0_valid = false, + data1_valid = false, + wr_data0 = 0, + wr_data1 = 0, + block_register = 0, + + block = {}, + max_index = 0, +} + +MAX_BLOCK_SRAM = 32 + +if true then + for i = 0, MAX_BLOCK_SRAM-1, 1 do + smbus.host.block[i] = { hw = 0, tmp = 0, hw_valid = false, tmp_valid = false } + end +end + +-- ******************* + +SIG_INUSE = 0 +SIG_RELEASE = 1 +SIG_START = 2 +SIG_ABORT = 3 +SIG_DONE = 4 +SIG_ACK = 5 +SIG_TIMEOUT = 6 +SIG_TIMEOUT_ACK = 7 +SIG_DATA_WRITE = 8 + +local function signal_reset(f) + f.host.signals = 0 +end + +local function signal_set(f, flag) + local mask = bit32.lshift(1, flag) + f.host.signals = bit32.bor(f.host.signals, mask) +end + +local function signal_clr(f, flag) + local mask = bit32.bnot(bit32.lshift(1, flag)) + f.host.signals = bit32.band(f.host.signals, mask) + +end + +local function signal_in(f, flag) + local mask = bit32.lshift(1, flag) + return bit32.band(f.host.signals, mask) ~= 0 +end + +-- ******************* + +-- SMBus Protocol Message Types +SMBUS_NOOP = 0 +SMBUS_QUICK = 1 +SMBUS_BYTE = 2 +SMBUS_BYTE_DATA = 3 +SMBUS_WORD_DATA = 4 +SMBUS_PROC_CALL = 5 +SMBUS_BLOCK_DATA = 6 +SMBUS_I2C_BLOCK_DATA = 7 +SMBUS_BLOCK_PROCESS = 8 + +local proto_name = {} +proto_name[SMBUS_NOOP] = "(no-op)" +proto_name[SMBUS_QUICK] = "quick" +proto_name[SMBUS_BYTE] = "byte" +proto_name[SMBUS_BYTE_DATA] = "byte_data" +proto_name[SMBUS_WORD_DATA] = "word_data" +proto_name[SMBUS_PROC_CALL] = "proc_call" +proto_name[SMBUS_BLOCK_DATA] = "block" +proto_name[SMBUS_I2C_BLOCK_DATA] = "i2c_block" +proto_name[SMBUS_BLOCK_PROCESS] = "block_process" + +-- SMBus Host +SMB_REG_CMD = 1 +SMB_REG_SLAVE = 2 +SMB_REG_DATA0 = 3 +SMB_REG_DATA1 = 4 +SMB_REG_BLOCK = 5 +SMB_REG_PROTO = 6 + + +local function dump_block(f, length) + local block = "" + local max_length = math.min(length, MAX_BLOCK_SRAM) + + for i=0, max_length-1, 1 do + if f.host.block[i].hw_valid then + block = block .. string.format(" %02x", f.host.block[i].hw) + else + block = block .. " xx" + end + end + return block +end + + +-- FIXME: Probably wrong for process calls and hw-dependent. +local function host_proto(f, proto) + return f.host.proto == proto +end + +local function host_reading(f) + return bit32.band(f.host.slave, 0x01) == 0x01 +end + + + +local function dump_transaction(f, action) + + local data0, data1, length, dir + local invalid_data = "xx" + local iodir = {} + iodir[0] = "<=" + iodir[1] = "=>" + + if host_reading(f) then + dir = iodir[1] + data0 = invalid_data + length = f.host.max_index + if f.host.data0_valid then + length = f.host.data0 + data0 = string.format("%02x", f.host.data0) + end + data1 = invalid_data + if f.host.data1_valid then + data1 = string.format("%02x", f.host.data1) + end + else + dir = iodir[0] + length = f.host.wr_data0 + data0 = string.format("%02x", f.host.wr_data0) + data1 = string.format("%02x", f.host.wr_data1) + end + + + local dump = string.format("%02x %s ", f.host.slave / 2, proto_name[f.host.proto]) + + if host_proto(f, SMBUS_QUICK) then + + elseif host_proto(f, SMBUS_BYTE) then + dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) + + elseif host_proto(f, SMBUS_BYTE_DATA) then + dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) + + elseif host_proto(f, SMBUS_WORD_DATA) then + dump = dump .. string.format("%02x %s %s%s", f.host.cmd, dir, data0, data1) + + elseif host_proto(f, SMBUS_PROC_CALL) then + dump = dump .. string.format("%02x %02x %02x %s %s %s", f.host.cmd, + f.host.wr_data0, f.host.wr_data1, iodir[1], data0, data1) + + elseif host_proto(f, SMBUS_BLOCK_DATA) then + dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, dir) + dump = dump .. dump_block(f, length) .. "" + + elseif host_proto(f, SMBUS_I2C_BLOCK_DATA) then + dump = dump .. string.format("%02x %02x %02x len=%02d %s", + f.host.cmd, f.host.data0, f.host.data1, f.host.max_index, dir) + dump = dump .. dump_block(f, length) .. "" + + elseif host_proto(f, SMBUS_BLOCK_PROCESS) then + dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, iodir[1]) + dump = dump .. dump_block(f, length) .. "" + else + dump = dump .. "Cannot parse command" + end + + if signal_in(f, SIG_TIMEOUT) then + dump = dump .. " (TIMEOUT) " + end + + printk(f, action, "%s\n", dump) +end + + +-- ******************* + +HOST_NOOP = 0 +HOST_IDLE = 1 +HOST_ACTIVE = 2 +HOST_STARTED = 3 +HOST_WAIT = 4 +HOST_COMPLETE = 5 +HOST_FAIL = 6 + +local ctrl_state = {} +ctrl_state[HOST_NOOP] = "noop" +ctrl_state[HOST_IDLE] = "idle" +ctrl_state[HOST_ACTIVE] = "active" +ctrl_state[HOST_STARTED] = "started" +ctrl_state[HOST_WAIT] = "wait" +ctrl_state[HOST_COMPLETE] = "complete" +ctrl_state[HOST_FAIL] = "failed" + +function dprintk(...) + if debug_smbus then + printk(...) + end +end + +local function host_jump(f, state) + f.host.state.jump_to = state +end + +local function host_change_state(f, prev_state, new_state) + + if new_state == HOST_NOOP then + --printk(f, f.host.action, "state switch to HOST_NOOP\n") + new_state = HOST_IDLE + end + + dprintk(f, f.host.action, "%s -> %s\n", + ctrl_state[prev_state], ctrl_state[new_state]) + + -- Jumping to current is no jump. + f.host.state.current = new_state + f.host.state.jump_to = new_state + + if smbus.state(f, HOST_IDLE) then + signal_reset(f) + + elseif smbus.state(f, HOST_ACTIVE) then + signal_reset(f) + signal_set(f, SIG_INUSE) + + elseif smbus.state(f, HOST_STARTED) then + local i + f.host.proto = f.host.start_proto + f.host.wr_data0 = f.host.data0 + f.host.wr_data1 = f.host.data1 + + -- Invalidation used with reads + f.host.data0_valid = false + f.host.data1_valid = false + + for i = 0, MAX_BLOCK_SRAM-1, 1 do + f.host.max_index = 0 + -- On block writes, previously read data in buffer is also valid. + if f.host.block[i].tmp_valid then + f.host.block[i].hw = f.host.block[i].tmp + f.host.block[i].tmp_valid = false + f.host.block[i].hw_valid = true + end + -- On block reads, no data in buffer is yet valid. + if host_reading(f) and host_proto(f, SMBUS_BLOCK_DATA) then + f.host.block[i].hw_valid = false; + end + end + + elseif smbus.state(f, HOST_COMPLETE) then + dump_transaction(f, f.host.action) + if signal_in(f, SIG_RELEASE) then + host_jump(f, HOST_IDLE) + else + host_jump(f, HOST_ACTIVE) + end + + elseif smbus.state(f, HOST_FAIL) then + dump_transaction(f, f.host.action) + host_jump(f, HOST_ACTIVE) + end + +end + +local function host_switch(f, new_state) + local prev_state = f.host.state.current + while prev_state ~= new_state do + host_change_state(f, prev_state, new_state) + prev_state = f.host.state.current + new_state = f.host.state.jump_to + end +end + +local function host_read_completed(f) + + if not host_reading(f) then + return true + end + + local complete = false + + if host_proto(f, SMBUS_QUICK) then + complete = true + + elseif host_proto(f, SMBUS_BYTE) then + complete = f.host.data0_valid + + elseif host_proto(f, SMBUS_BYTE_DATA) then + complete = f.host.data0_valid + + elseif host_proto(f, SMBUS_WORD_DATA) then + complete = f.host.data0_valid and f.host.data1_valid + + elseif host_proto(f, SMBUS_BLOCK_DATA) then + complete = f.host.data0_valid and f.host.max_index >= f.host.data0 + + elseif host_proto(f, SMBUS_PROC_CALL) or host_proto(f, SMBUS_I2C_BLOCK_DATA) + or host_proto(f, SMBUS_BLOCK_PROCESS) then + printk(f, f.host.action, "Unimplemented completion (proto %d)\n", f.host.proto) + end + return complete +end + + +-- Syncronize state machine according to input signals. +local function host_sync(f) + +-- if release and not smbus.state(f, HOST_ACTIVE) then +-- printk(f, f.host.action, "Premature reset of bit INUSE_STS\n") +-- end + if signal_in(f, SIG_ABORT) then + -- FIXME Killing on-going transaction. + host_switch(f, HOST_COMPLETE) + end + + if smbus.state(f, HOST_IDLE) then + if signal_in(f, SIG_INUSE) then + host_switch(f, HOST_ACTIVE) + end + if signal_in(f, SIG_START) then + host_switch(f, HOST_STARTED) + end + + elseif smbus.state(f, HOST_ACTIVE) then + if signal_in(f, SIG_START) then + host_switch(f, HOST_STARTED) + end + + elseif smbus.state(f, HOST_STARTED) then + if signal_in(f, SIG_TIMEOUT) then + host_switch(f, HOST_FAIL) + elseif signal_in(f, SIG_DONE) then + host_switch(f, HOST_WAIT) + end + + elseif smbus.state(f, HOST_WAIT) then + if signal_in(f, SIG_START) then + -- Restarting previous transaction. + host_switch(f, HOST_COMPLETE) + host_switch(f, HOST_STARTED) + elseif signal_in(f, SIG_ACK) and not host_reading(f) then + -- Complete after sw ack. + host_switch(f, HOST_COMPLETE) + elseif signal_in(f, SIG_DATA_WRITE) or host_read_completed(f) then + -- Complete after all data read or new data written + -- remain active + signal_clr(f, SIG_RELEASE) + host_switch(f, HOST_COMPLETE) + end + elseif smbus.state(f, HOST_FAIL) then + if signal_in(f, SIG_TIMEOUT_ACK) then + host_switch(f, HOST_COMPLETE) + end + end + + if signal_in(f, SIG_START) and not smbus.state(f, HOST_STARTED) then + printk(f, f.host.action, "Starting from illegal state\n"); + end + + signal_clr(f, SIG_DONE) + signal_clr(f, SIG_START) + signal_clr(f, SIG_DATA_WRITE) +end + + + +-- ******************************* + +-- Mutual exclusion. +function smbus.get_resource(f) + signal_set(f, SIG_INUSE) + host_sync(f) +end + +function smbus.put_resource(f) + signal_set(f, SIG_RELEASE) + host_sync(f) +end + +-- status +function smbus.state(f, state) + return f.host.state.current == state +end + +function smbus.passive(f) + return f.host.passive +end + +-- control +function smbus.start(f, proto) + signal_set(f, SIG_START) + f.host.start_proto = proto + host_sync(f) +end + +function smbus.timeout(f) + signal_set(f, SIG_TIMEOUT) + host_sync(f) +end + +function smbus.timeout_ack(f) + signal_set(f, SIG_TIMEOUT_ACK) + host_sync(f) +end + +function smbus.done(f) + signal_set(f, SIG_DONE) + host_sync(f) +end + +function smbus.ack(f) + signal_set(f, SIG_ACK) + host_sync(f) +end + +function smbus.abort(f) + signal_set(f, SIG_ABORT) + host_sync(f) +end + +-- A data read may complete and close an active transaction. +function smbus.data_read(f, action) + if not action.write then + signal_clr(f, SIG_DATA_WRITE) + host_sync(f) + end +end + +-- A data write will close active transaction. +function smbus.data_write(f, action) + if action.write then + signal_set(f, SIG_DATA_WRITE) + host_sync(f) + end +end + + + +function smbus.update_register(f, action, smb_reg) + + local data_write = action.write or smbus.passive(f) + + -- A write to data registers completes previous transaction. + smbus.data_write(f, action) + + if smb_reg == SMB_REG_SLAVE then + if data_write then + f.host.slave = action.data + else + action.data = f.host.slave + end + + elseif smb_reg == SMB_REG_CMD then + if data_write then + f.host.cmd = action.data + else + action.data = f.host.cmd + end + + elseif smb_reg == SMB_REG_DATA0 then + if data_write then + f.host.data0 = action.data + else + action.data = f.host.data0 + end + f.host.data0_valid = true + + elseif smb_reg == SMB_REG_DATA1 then + if data_write then + f.host.data1 = action.data + else + action.data = f.host.data1 + end + f.host.data1_valid = true + + elseif smb_reg == SMB_REG_BLOCK then + if data_write then + f.host.block_register = action.data + else + action.data = f.host.block_register + end + -- Nothing here, smbus.host_block_data updates datas. + -- This exist to check completion below for blocks. + elseif smb_reg == SMB_REG_PROTO then + -- Nothing here. Protocol updates when signalling start. + else + printk(f, f.host.action, "Undefined host register\n") + end + + -- New read data may complete a waiting transaction. + smbus.data_read(f, action) +end + +function smbus.block_data(f, action, index) + + if smbus.passive(f) then + if not action.write then + f.host.block[index].hw = action.data + f.host.block[index].hw_valid = true + end + f.host.block[index].tmp = action.data + f.host.block[index].tmp_valid = true + else + if action.write then + f.host.block[index].tmp = action.data + f.host.block[index].tmp_valid = true + else + action.data = 0xff + if f.host.block[index].tmp_valid then + action.data = f.host.block[index].tmp + elseif f.host.block[index].hw_valid then + action.data = f.host.block[index].hw + end + end + end + + -- Detect for block read completion via maximum indexed item. + if not action.write then + f.host.max_index = math.max(f.host.max_index, index+1) + end +end + +local init_action = { + name = "init", + cs = 0, + eip = 0, + my_id = 0, + parent_id = 0, +} +function smbus.init(f) + if not f.host then + f.host = smbus.host + f.host.action = init_action + end + host_switch(f, HOST_IDLE) +end + + diff --git a/SerialICE/simba/chipset/superio.lua b/SerialICE/simba/chipset/superio.lua new file mode 100644 index 0000000..7d6252c --- /dev/null +++ b/SerialICE/simba/chipset/superio.lua @@ -0,0 +1,262 @@ + + +function pnp_switch_ldn(f, data) + if not f.ldn[data] then + f.ldn[data] = { data = {}, set = {}, bar0 = {}, bar1 = {} } + end + f.pnp.active_ldn = data +end + +function pnp_select_cfg(f, data) + f.pnp.reg = data +end + +function pnp_store_cfg(f, data) + local reg = f.pnp.reg + if reg < 0x30 then + f.chip.data[reg] = data; + f.chip.set[reg] = true; + else + local ldn = f.pnp.active_ldn + f.ldn[ldn].data[reg] = data; + f.ldn[ldn].set[reg] = true; + end +end + + +-- ********************************************************** +-- +-- SuperIO device handling + +function superio_pnpdev(f) + return string.format("%s %02x:%02x", f.name, f.base, f.pnp.active_ldn) +end + +function superio_string(f) + if f.pnp.reg < 0x30 then + return string.format("%02x: ", f.base) + else + return string.format("%02x:%02x ", f.base, f.pnp.active_ldn) + end +end + +function superio_register_post(f, action) + local str = superio_string(f) + if action.write then + printk(f, action, "%s [%02x] <= %02x\n", str, f.pnp.reg, action.data) + else + printk(f, action, "%s [%02x] => %02x\n", str, f.pnp.reg, action.data) + end +end + +function superio_string_post(f, action, str2) + printk(f, action, "%s %s\n", superio_string(f), str2) +end + +function superio_try_enable_io(f, idx) + + local ldn = f.ldn[f.pnp.active_ldn] + + if ldn.set[0x30] and ldn.data[0x30] ~= 0x0 then + if idx == 0 and ldn.set[0x60] and ldn.set[0x61] then + local iobase = bit32.bor(bit32.lshift(ldn.data[0x60], 8), ldn.data[0x61]) + if not ldn.bar0.size then + ldn.bar0.size = 1 + end + if not ldn.bar0.name then + ldn.bar0.name = superio_pnpdev(f) + end + if iobase ~= 0x60 then + ldn.bar0.val = iobase + generic_io_bar(ldn.bar0) + ldn.bar0.f.decode = F_FIXED + end + end + if idx == 1 and ldn.set[0x62] and ldn.set[0x63] then + local iobase = bit32.bor(bit32.lshift(ldn.data[0x62], 8), ldn.data[0x63]) + if not ldn.bar1.size then + ldn.bar1.size = 1 + end + if not ldn.bar1.name then + ldn.bar1.name = superio_pnpdev(f) + end + if iobase ~= 0x64 then + ldn.bar1.val = iobase + generic_io_bar(ldn.bar1) + ldn.bar1.f.decode = F_FIXED + end + end + end +end + +function superio_try_enable_ldn(f, action) + local ldn = f.ldn[f.pnp.active_ldn] + + if ldn.set[0x30] and ldn.data[0x30] == 0x0 then + superio_string_post(f, action, "disabled") + else + superio_string_post(f, action, "enabled") + end +end + +function superio_pre(f, action) + if not action.write then + return handle_action(f, action) + end + + if action.addr == f.base then + pnp_select_cfg(f, action.data) + return handle_action(f, action) + end + + if action.addr == f.base + 0x01 then + -- Also creates new LDN instance, if necessary. + if f.pnp.reg == f.pnp.ldn_register then + pnp_switch_ldn(f, action.data) + end + + pnp_store_cfg(f, action.data) + + -- Don't allow that our SIO power gets disabled. + if f.pnp.reg == 0x02 then + return drop_action(f, action, 0) + end + + -- Don't mess with oscillator setup. + if f.pnp.reg == 0x24 then + return drop_action(f, action, 0) + end + return handle_action(f, action) + end + + -- should not reach here + return skip_filter(f, action) +end + +function superio_post(f, action) + + -- Do not log change of register or LDN. + if action.addr == f.base or f.pnp.reg == f.pnp.ldn_register then + return true + end + + if not action.write then + superio_register_post(f, action) + return true + end + + local ldn = f.ldn[f.pnp.active_ldn] + + -- Log base address once both bytes are set. + + if ( f.pnp.reg == 0x60 or f.pnp.reg == 0x61 ) then + superio_try_enable_io(f, 0) + return true + end + + if ( f.pnp.reg == 0x62 or f.pnp.reg == 0x63 ) then + superio_try_enable_io(f, 1) + return true + end + + if f.pnp.reg == 0x30 then + superio_try_enable_io(f, 0) + superio_try_enable_io(f, 1) + superio_try_enable_ldn(f, action) + return true + end + + if f.pnp.reg == 0x70 then + superio_string_post(f, action, string.format("irq = %d", ldn.data[0x70])) + return true + end + if f.pnp.reg == 0x72 then + superio_string_post(f, action, string.format("irq2 = %d", ldn.data[0x72])) + return true + end + + superio_register_post(f, action) + return true +end + + +filter_superio_2e = { + name = "PnP", + pre = superio_pre, + post = superio_post, + base = 0x2e, + size = 0x02, + hide = hide_superio_cfg, + chip = { data = {}, set = {} }, + pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, + ldn = {}, +} +filter_superio_4e = { + name = "PnP", + pre = superio_pre, + post = superio_post, + base = 0x4e, + size = 0x02, + hide = hide_superio_cfg, + chip = { data = {}, set = {} }, + pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, + ldn = {}, +} + + +function superio_get_filter(cfg_base) + if cfg_base == 0x2e then + return filter_superio_2e + elseif cfg_base == 0x4e then + return filter_superio_4e + else + return nil + end +end + +function superio_set_ldn_register(f, ldn_register) + f.pnp.ldn_register = ldn_register +end + +function superio_new_ldn(f, idx) + if not f.ldn[idx] then + f.ldn[idx] = { data = {}, set = {}, bar0 = {}, bar1 = {} } + end +end + +function superio_ldn_iobase0(f, idx, name, size) + f.ldn[idx].bar0.name = name + f.ldn[idx].bar0.size = size +end + +function superio_ldn_iobase1(f, idx, name, size) + f.ldn[idx].bar1.name = name + f.ldn[idx].bar1.size = size +end + +function enable_hook_superio(base, ldn_register) + local sio = superio_get_filter(base) + superio_set_ldn_register(sio, ldn_register) + enable_hook(io_hooks, sio) +end + +-- ********************************************************** +-- +-- Serial Port handling + +function com_pre(f, action) + if (action.write) then + return drop_action(f, action, action.data) + else + return drop_action(f, action, 0xff) + end +end + +filter_com1 = { + name = "COM1", + pre = com_pre, + post = io_post, + base = 0x3f8, + size = 8, + hide = false, +} diff --git a/SerialICE/simba/chipset/via_bars.lua b/SerialICE/simba/chipset/via_bars.lua new file mode 100644 index 0000000..7868535 --- /dev/null +++ b/SerialICE/simba/chipset/via_bars.lua @@ -0,0 +1,30 @@ + +function sb_pcie_bar(dev, reg, base) + local baseaddr = bit32.lshift(base, 16) + local size = 64*1024 + + pcie_mm_cfg_bar(baseaddr, size) +end + +dev_sb = { + pci_dev = pci_bdf(0,0x11,0,0), + name = "sb", + bar = {}, +} + +function nb_pcie_bar(dev, reg, base) + local size = 64*1024 + + pcie_mm_cfg_bar(base, size) +end + +dev_nb = { + pci_dev = pci_bdf(0,0,0,0), + name = "nb", + bar = {}, +} + +function northbridge_vx900() + pci_cfg16_hook(dev_sb, 0xbd, "SB_PCI", sb_pcie_bar) + pci_cfg32_hook(dev_nb, 0x0, "NB_PCI", nb_pcie_bar) +end diff --git a/SerialICE/simba/commell_lv_672.lua b/SerialICE/simba/commell_lv_672.lua deleted file mode 100644 index 2c7710d..0000000 --- a/SerialICE/simba/commell_lv_672.lua +++ /dev/null @@ -1,57 +0,0 @@ - -function mainboard_io_read(f, action) - -- IO slowdown - if action.addr == 0xeb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - -- IO slowdown - if action.addr == 0xeb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "test", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801fx() - northbridge_i915() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/conroexfire_esata2.lua b/SerialICE/simba/conroexfire_esata2.lua deleted file mode 100644 index d974d7c..0000000 --- a/SerialICE/simba/conroexfire_esata2.lua +++ /dev/null @@ -1,86 +0,0 @@ - - - -function mainboard_io_read(f, action) - -- Some timer loop - if ( action.addr == 0x61 ) then - if ( regs.eip == 0x1634 ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x20) - end - if ( regs.eip == 0x163a ) then - regs.ecx = 0x01 - return fake_action(f, action, 0x30) - end - end - - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xe1 then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then - return true - end - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "test", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801gx() - - northbridge_i945() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/i82801.lua b/SerialICE/simba/i82801.lua deleted file mode 100644 index 96fc8c3..0000000 --- a/SerialICE/simba/i82801.lua +++ /dev/null @@ -1,182 +0,0 @@ --- ********************************************************** --- --- SMBus controller handling - - -dofile("intel_smbus.lua") - -function smbus_bar_hook(f, action) - intel_smbus_setup(action.data, 0x20) -end - -dev_sb_lpc = { - pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), - name = "Smbus", - bar = {}, -} - -function enable_smbus_host_bar() - pci_cfg16_hook(dev_sb_lpc, 0x20, "SMBus", smbus_bar_hook) -end - - --- ********************************************************** --- - -dev_power = { - pci_dev = pci_bdf(0x0,0x1f,0x0,0x0), - name = "SYS", - bar = {}, - acpi = { f = nil }, - tco = { f = nil }, -} - -function pm_io_bar(f, action) - f.dev.acpi.name = "ACPI" - f.dev.acpi.val = action.data - f.dev.acpi.size = 0x60 - generic_io_bar(f.dev.acpi) - - f.dev.tco.name = "TCO" - f.dev.tco.val = action.data + 0x60 - f.dev.tco.size = 0x20 - generic_io_bar(f.dev.tco) -end - -function lpc_io_bar(f, action) - local base = bit32.band(action.data, 0xffff) - local mask = bit32.bor(bit32.rshift(action.data, 16), 3) - local size = mask + 1 - - base = bit32.band(base, bit32.bnot(mask)) - - add_bar(f.dev, f.reg, "LPC", size) - f.dev.bar[f.reg].val = base - generic_io_bar(f.dev.bar[f.reg]) -end - -function lpc_protect_serial_port(f, action) - drop_action(f, action, 0) -end - --- ********************************************************** --- --- AC '97 controller handling - - -dev_audio = { - pci_dev = pci_bdf(0x0,0x1f,0x5,0x0), - name = "Audio", - bar = {} -} - -function enable_audio_bars() - add_io_bar(dev_audio, 0x10, "NAMBAR", 0x100) - add_io_bar(dev_audio, 0x14, "NABMBAR", 0x40) - add_mem_bar(dev_audio, 0x18, "MMBAR", 0x200) - add_mem_bar(dev_audio, 0x1C, "MBBAR", 0x100) -end - -dev_modem = { - pci_dev = pci_bdf(0x0,0x1f,0x6,0x0), - name = "Modem", - bar = {} -} - -function enable_modem_bars() - add_io_bar(dev_modem, 0x10, "MMBAR", 0x100) - add_io_bar(dev_modem, 0x14, "MBAR", 0x80) -end - - --- ********************************************************** --- --- i82801dx - -function enable_dx_power_bars() - pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) - add_io_bar(dev_power, 0x58, "GPIO", 0x40) -end - -function enable_dx_lpc_bars() - pci_cfg8_hook(dev_power, 0xe0, "LPC", lpc_protect_serial_port) - pci_cfg8_hook(dev_power, 0xe6, "LPC", lpc_protect_serial_port) - - add_io_bar(dev_power, 0xe4, "LPC1", 0x80) - add_io_bar(dev_power, 0xec, "LPC2", 0x10) -end - -function enable_hook_i82801dx() - enable_smbus_host_bar() - enable_dx_power_bars() - enable_dx_lpc_bars() - enable_audio_bars() - enable_modem_bars() -end - --- ********************************************************** --- --- i82801fx - -function enable_fx_power_bars() - pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) - add_io_bar(dev_power, 0x48, "GPIO", 0x40) -end - -function enable_fx_lpc_bars() - add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) - - pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) - pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) - - add_io_bar(dev_power, 0x84, "LPC1", 0x80) - add_io_bar(dev_power, 0x88, "LPC2", 0x40) -end - -function enable_hook_i82801fx() - enable_smbus_host_bar() - enable_fx_power_bars() - enable_fx_lpc_bars() -end - --- ********************************************************** --- --- i82801gx - --- ICH7 TPM --- Phoenix "Secure" Core bails out if we don't pass the read on ;-) -filter_ich7_tpm = { - name = "ICH7 TPM", - pre = mem_target_only, - post = mem_post, - decode = F_RANGE, - base = 0xfed40000, - size = 0x00001000, - hide = true -} - -function enable_gx_power_bars() - pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) - add_io_bar(dev_power, 0x48, "GPIO", 0x40) -end - -function enable_gx_lpc_bars() - pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) - pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) - - pci_cfg32_hook(dev_power, 0x84, "LPC", lpc_io_bar) - pci_cfg32_hook(dev_power, 0x88, "LPC", lpc_io_bar) - pci_cfg32_hook(dev_power, 0x8c, "LPC", lpc_io_bar) - pci_cfg32_hook(dev_power, 0x90, "LPC", lpc_io_bar) -end - -function enable_hook_i82801gx() - enable_hook(mem_hooks, filter_ich7_tpm) - add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) - enable_smbus_host_bar() - enable_gx_power_bars() - enable_gx_lpc_bars() -end - - - diff --git a/SerialICE/simba/intel_bars.lua b/SerialICE/simba/intel_bars.lua deleted file mode 100644 index 0841a23..0000000 --- a/SerialICE/simba/intel_bars.lua +++ /dev/null @@ -1,110 +0,0 @@ --- ********************************************************** --- Intel i845 - -dev_i845_mch2 = { - pci_dev = pci_bdf(0x0,0x6,0x0,0x0), - name = "MCH", - bar = {} -} - -function northbridge_i845() - add_mem_bar(dev_i845_mch2, 0x10, "RCOMP", 0x1000) -end - --- ********************************************************** --- Intel e7505 - -dev_e7505_mch = { - pci_dev = pci_bdf(0x0,0x0,0x0,0x0), - name = "MCH", - bar = {} -} - -function northbridge_e7505() - add_mem_bar(dev_e7505_mch, 0x14, "RCOMP", 0x1000) -end - - --- ********************************************************** --- Intel 82915 PCIe BAR - -dev_i915 = { - pci_dev = pci_bdf(0,0,0,0), - name = "i915", - bar = {}, -} - -function i915_pcie_bar(f, action) - local baseaddr = bit32.band(action.data, 0xf0000000) - local size = 256*1024*1024 - - -- enable is 0:00.0 [054] .31 - if true then - pcie_mm_enable(f.dev, f.reg, baseaddr, size) - else - pcie_mm_disable(f.dev, f.reg, baseaddr, size) - end -end - -function northbridge_i915() - add_mem_bar(dev_i915, 0x40, "EPBAR", 4*1024) - add_mem_bar(dev_i915, 0x44, "MCHBAR", 16*1024) - add_mem_bar(dev_i915, 0x4c, "DMIBAR", 4*1024) - pci_cfg32_hook(dev_i915, 0x48, "PCI", i915_pcie_bar) -end - --- ********************************************************** --- Intel 82945 PCIe BAR - -function i945_pcie_bar(f, action) - local base = action.data - local sizebits = bit32.band(bit32.rshift(base, 1), 0x3) - local baseaddr = 0 - local size = 0 - - if sizebits == 0 then - size = 256*1024*1024 - baseaddr = bit32.band(base, 0xf0000000) - elseif sizebits == 1 then - size = 128*1024*1024 - baseaddr = bit32.band(base, 0xf8000000) - elseif sizebits == 2 then - size = 64*1024*1024 - baseaddr = bit32.band(base, 0xfc000000) - else - -- undefined, really - baseaddr = bit32.band(base, 0xfe000000) - size = 32*1024*1024 - end - - if bit32.band(base, 1) ~= 0 then - pcie_mm_enable(f.dev, f.reg, baseaddr, size) - else - pcie_mm_disable(f.dev, f.reg, baseaddr, size) - end -end - -dev_i945 = { - pci_dev = pci_bdf(0,0,0,0), - name = "i945", - bar = {}, -} - -function northbridge_i945() - add_mem_bar(dev_i945, 0x40, "EPBAR", 4*1024) - add_mem_bar(dev_i945, 0x44, "MCHBAR", 16*1024) - add_mem_bar(dev_i945, 0x4c, "DMIBAR", 4*1024) - add_mem_bar(dev_i945, 0x60, "(unknown)", 4*1024) - - pci_cfg32_hook(dev_i945, 0x48, "PCI", i945_pcie_bar) -end - -function northbridge_i946() - add_mem_bar(dev_i945, 0x40, "PXPEPBAR", 4*1024) - add_mem_bar(dev_i945, 0x48, "MCHBAR", 16*1024) - add_mem_bar(dev_i945, 0x68, "DMIBAR", 4*1024) - - pci_cfg32_hook(dev_i945, 0x60, "PCI", i945_pcie_bar) -end - - diff --git a/SerialICE/simba/intel_d845gbv2.lua b/SerialICE/simba/intel_d845gbv2.lua deleted file mode 100644 index 1f08dfc..0000000 --- a/SerialICE/simba/intel_d845gbv2.lua +++ /dev/null @@ -1,92 +0,0 @@ - - -function mainboard_io_read(f, action) - -- Some timer loop - if ( action.addr == 0x61 ) then - end - - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - -- Catch RAM controller ready. - if action.addr == 0x80 and action.data == 0xd5 and not ram_enabled() then - -- enable_ram() - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xe1 then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then - return true - end - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "GEBV2", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") - -function do_mainboard_setup() - new_car_region(0xfef00000, 0x800) - - enable_hook(io_hooks, filter_pci_io_cfg) - enable_hook(mem_hooks, filter_lapic) - enable_hook(mem_hooks, filter_ioapic) - - enable_hook(cpumsr_hooks, filter_intel_microcode) - enable_hook(cpuid_hooks, filter_multiprocessor) - - -- I have a hook to detect RAM initialisation from - -- a POST code I can skip this here - enable_ram() - - enable_hook_pc80() - enable_hook_superio(0x2e, 0x07) - --enable_hook(io_hooks, filter_com1) - enable_hook_i82801dx() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/intel_d946gzis.lua b/SerialICE/simba/intel_d946gzis.lua deleted file mode 100644 index da3338d..0000000 --- a/SerialICE/simba/intel_d946gzis.lua +++ /dev/null @@ -1,77 +0,0 @@ - - - -function mainboard_io_read(f, action) - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xe1 then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then - return true - end - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "test", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801gx() - enable_hook(cpumsr_hooks, filter_intel_microcode) - enable_hook(cpuid_hooks, filter_multiprocessor) - northbridge_i946() - - new_car_region(0xfef00000,0x2000) - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/intel_smbus.lua b/SerialICE/simba/intel_smbus.lua deleted file mode 100644 index bfdf384..0000000 --- a/SerialICE/simba/intel_smbus.lua +++ /dev/null @@ -1,258 +0,0 @@ - - -dofile("smbus_host.lua") - --- ******************************************** --- Intel 82801 SMBus Host controller - -I801_SMB_HSTSTS = 0 -I801_SMB_HSTCNT = 2 -I801_SMB_HSTCMD = 3 -I801_SMB_HSTADD = 4 -I801_SMB_HSTDAT0 = 5 -I801_SMB_HSTDAT1 = 6 -I801_SMB_BLKDAT = 7 -I801_SMB_PEC = 8 -I801_SMB_AUXSTS = 12 -I801_SMB_AUXCTL = 13 - -I801_QUICK = 0x00 -I801_BYTE = 0x04 -I801_BYTE_DATA = 0x08 -I801_WORD_DATA = 0x0C -I801_PROC_CALL = 0x10 -I801_BLOCK_DATA = 0x14 -I801_I2C_BLOCK_DATA = 0x18 -I801_BLOCK_PROCESS = 0x1C -I801_BLOCK_LAST = 0x34 -- 0x14 | 0x20 -I801_I2C_BLOCK_LAST = 0x38 -- 0x18 | 0x20 -I801_START = 0x40 -I801_PEC_EN = 0x80 - - -local function intel_smbus_get_protocol(f) - local proto = bit32.band(f.reg.control, 0x1c) - - if proto == I801_QUICK then - return SMBUS_QUICK - - elseif proto == I801_BYTE then - return SMBUS_BYTE - - elseif proto == I801_BYTE_DATA then - return SMBUS_BYTE_DATA - - elseif proto == I801_WORD_DATA then - return SMBUS_WORD_DATA - - elseif proto == I801_PROC_CALL then - return SMBUS_PROC_CALL - - elseif proto == I801_BLOCK_DATA then - return SMBUS_BLOCK_DATA - - elseif proto == I801_I2C_BLOCK_DATA then - return SMBUS_I2C_BLOCK_DATA - - elseif proto == I801_BLOCK_PROCESS then - return SMBUS_BLOCK_PROCESS - - else - printk(f, action, "Unknown protocol\n") - return SMBUS_NOOP - end -end - -local function intel_smbus_host_status(f, action) - if not action.write then - if smbus.passive(f) then - f.reg.status = action.data; - end - - if smbus.state(f, HOST_IDLE) then - if not smbus.passive(f) then - f.reg.status = 0x0 - end - if bit32.band(f.reg.status, 0x40) ~= 0 then - printk(f, action, "Host may be busy, ignoring.\n") - end - smbus.get_resource(f) - - elseif smbus.state(f, HOST_ACTIVE) then - f.reg.busy_count = 3 - - elseif smbus.state(f, HOST_STARTED) then - if not smbus.passive(f) then - f.reg.status = bit32.band(f.reg.status, 0xFE) - if f.reg.busy_count > 0 then - f.reg.busy_count = f.reg.busy_count - 1 - f.reg.status = bit32.bor(f.reg.status, 0x01) - end - if bit32.band(f.reg.status, 0x02) == 0 then - smbus_transaction(host) - end - end - - local irq = bit32.band(f.reg.status, 0x02) ~= 0 - local failures = bit32.band(f.reg.status, 0x1c) ~= 0 - local host_busy = bit32.band(f.reg.status, 0x01) ~= 0 - - if irq and not host_busy then - smbus.done(f) - end - if failures then - smbus.timeout(f) - end - end - - if not smbus.passive(f) then - action.data = f.reg.status; - f.reg.status = bit32.bor(f.reg.status, 0x40) - end - else - - if not smbus.passive(f) then - f.reg.status = bit32.band(f.reg.status, bit32.bnot(action.data)) - end - - local ack_irq = bit32.band(action.data, 0x02) ~= 0 - local release_host = bit32.band(action.data, 0x40) ~= 0 - local failures = bit32.band(action.data, 0x1c) ~= 0 - if release_host then - smbus.put_resource(f) - end - if failures then - smbus.timeout_ack(f) - end - if ack_irq then - smbus.ack(f) - end - end - -end - - -local function intel_smbus_host_control(f, action) - - if not action.write then - f.reg.block_ptr=0; - if not smbus.passive(f) then - action.data = bit32.band(f.reg.control, bit32.bnot(0x40)) - end - - else - - f.reg.control = action.data; - if bit32.band(f.reg.control, 0x80) ~= 0 then - printk(f, action, "No PEC simulation\n") - end - - local abort = bit32.band(f.reg.control, 0x02) ~= 0 - local start = bit32.band(f.reg.control, 0x40) ~= 0 - if abort then - smbus.abort(f) - end - if start then - f.reg.block_ptr=0; - smbus.update_register(f, action, SMB_REG_PROTO) - smbus.start(f, intel_smbus_get_protocol(f)) - end - end -end - - - -local function intel_smbus_block_data(f, action) - if f.reg.block_ptr < MAX_BLOCK_SRAM then - smbus.block_data(f, action, f.reg.block_ptr) - end - f.reg.block_ptr = f.reg.block_ptr + 1 - smbus.update_register(f, action, SMB_REG_BLOCK) -end - -local function intel_smbus_host_access(f, action) - local reg = bit32.band(action.addr, (f.size-1)) - - -- mirror hw register both ways - local data_write = 0 - - -- Store this to display CS:IP etc. - f.host.action = action - - if reg == I801_SMB_HSTSTS then - intel_smbus_host_status(f, action); - - elseif reg == I801_SMB_HSTCNT then - intel_smbus_host_control(f, action); - - elseif reg == I801_SMB_HSTCMD then - smbus.update_register(f, action, SMB_REG_CMD) - - elseif reg == I801_SMB_HSTADD then - smbus.update_register(f, action, SMB_REG_SLAVE) - - elseif reg == I801_SMB_HSTDAT0 then - smbus.update_register(f, action, SMB_REG_DATA0) - - elseif reg == I801_SMB_HSTDAT1 then - smbus.update_register(f, action, SMB_REG_DATA1) - - elseif reg == I801_SMB_BLKDAT then - intel_smbus_block_data(f, action); - - elseif reg == I801_SMB_AUXSTS then - if data_write then - f.reg.aux_sts = action.data; - else - action.data = f.reg.aux_sts; - end - - elseif reg == I801_SMB_AUXCTL then - if data_write then - f.reg.aux_ctl = action.data; - else - action.data = f.reg.aux_ctl; - end - - else - printk(f, action, "Unknown register 0x%02x\n", reg); - end -end - - -function intel_smbus_host_pre(f, action) - if action.write then - intel_smbus_host_access(f, action) - end - return handle_action(f, action) -end - -function intel_smbus_host_post(f, action) - if not action.write then - intel_smbus_host_access(f, action) - end - return true -end - - -local intel_smbus_host = { - name = "i801-smbus", - pre = intel_smbus_host_pre, - post = intel_smbus_host_post, - hide = hide_smbus_io, - base = 0x0, - size = 0x0, -} - -function intel_smbus_setup(base, size) - local f = intel_smbus_host - f.base = bit32.band(base, bit32.bnot(size-1)) - f.size = size - if not f.reg then - f.reg = { control = 0, status = 0, busy_count = 0, block_ptr = 0, aux_ctl = 0, aux_sts = 0 } - end - smbus.init(f) - - enable_hook(io_hooks, f) -end - diff --git a/SerialICE/simba/mainboard/aopen_dxpl_plus.lua b/SerialICE/simba/mainboard/aopen_dxpl_plus.lua new file mode 100644 index 0000000..1a4c715 --- /dev/null +++ b/SerialICE/simba/mainboard/aopen_dxpl_plus.lua @@ -0,0 +1,142 @@ +-- SerialICE +-- +-- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + +load_filter("i82801") +load_filter("intel_bars") + +-- ********************************************************** +-- + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then + enable_ram() + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xed then + if ( regs.eip == 0x1792 ) then + regs.ecx = 0x01 + end +if false then + -- SIPI delay + if ( regs.eip == 0xb3bc or regs.eip == 0xb3bf ) then + regs.ecx = 0x01 + end + if ( regs.eip == 0xb4ad or regs.eip == 0xb4af ) then + regs.ecx = 0x01 + end +end + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xed or action.addr == 0xcfb then + return true + end + + -- If KBD controller returns status=0xff, clear 0x02. + if action.addr == 0x64 and not action.write and action.size == 1 then + if action.data == 0xff then + -- tag these but give out correct data + fake_action(f, action, action.data) + end + end +end + +filter_mainboard = { + name = "AOpen", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + + +function do_mainboard_setup() + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + --enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x2e, 0x07) + --enable_hook(io_hooks, filter_com1) + enable_hook_i82801dx() + northbridge_e7505() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/asrock_775i65g.lua b/SerialICE/simba/mainboard/asrock_775i65g.lua new file mode 100644 index 0000000..130b512 --- /dev/null +++ b/SerialICE/simba/mainboard/asrock_775i65g.lua @@ -0,0 +1,13 @@ + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801dx() + northbridge_i845() + + -- Apply mainboard hooks last, so they are the first ones to check + --enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/asus_p4p800_vm.lua b/SerialICE/simba/mainboard/asus_p4p800_vm.lua new file mode 100644 index 0000000..88c4002 --- /dev/null +++ b/SerialICE/simba/mainboard/asus_p4p800_vm.lua @@ -0,0 +1,84 @@ + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801dx() + northbridge_i845() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/commell_lv_672.lua b/SerialICE/simba/mainboard/commell_lv_672.lua new file mode 100644 index 0000000..85e4421 --- /dev/null +++ b/SerialICE/simba/mainboard/commell_lv_672.lua @@ -0,0 +1,57 @@ + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/conroexfire_esata2.lua b/SerialICE/simba/mainboard/conroexfire_esata2.lua new file mode 100644 index 0000000..4c95e6d --- /dev/null +++ b/SerialICE/simba/mainboard/conroexfire_esata2.lua @@ -0,0 +1,86 @@ + + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801gx() + + northbridge_i945() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/intel_d845gbv2.lua b/SerialICE/simba/mainboard/intel_d845gbv2.lua new file mode 100644 index 0000000..0224356 --- /dev/null +++ b/SerialICE/simba/mainboard/intel_d845gbv2.lua @@ -0,0 +1,92 @@ + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0xd5 and not ram_enabled() then + -- enable_ram() + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "GEBV2", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") + +function do_mainboard_setup() + new_car_region(0xfef00000, 0x800) + + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x2e, 0x07) + --enable_hook(io_hooks, filter_com1) + enable_hook_i82801dx() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/intel_d946gzis.lua b/SerialICE/simba/mainboard/intel_d946gzis.lua new file mode 100644 index 0000000..d1c92b1 --- /dev/null +++ b/SerialICE/simba/mainboard/intel_d946gzis.lua @@ -0,0 +1,77 @@ + + + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801gx() + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + northbridge_i946() + + new_car_region(0xfef00000,0x2000) + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/msi_ms7133.lua b/SerialICE/simba/mainboard/msi_ms7133.lua new file mode 100644 index 0000000..2aec108 --- /dev/null +++ b/SerialICE/simba/mainboard/msi_ms7133.lua @@ -0,0 +1,69 @@ + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +load_filter("i82801") +load_filter("intel_bars") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/mainboard/via_epia_m_850.lua b/SerialICE/simba/mainboard/via_epia_m_850.lua new file mode 100644 index 0000000..44f0fde --- /dev/null +++ b/SerialICE/simba/mainboard/via_epia_m_850.lua @@ -0,0 +1,164 @@ +-- SerialICE +-- +-- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + + +-- ********************************************************** +-- + +function mainboard_io_read(f, action) + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then + enable_ram() + end + +-- if action.addr == 0xcfb then +-- ignore_action(f, action) +-- return drop_action(f, action, 0) +-- end + + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xeb or action.addr == 0xed then + return true + end + + -- If KBD controller returns status=0xff, clear 0x02. + if action.addr == 0x64 and not action.write and action.size == 1 then + if action.data == 0xff then + -- tag these but give out correct data + fake_action(f, action, action.data) + end + end +end + +filter_mainboard = { + name = "VIA", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + + + +-- MOVE THIS TO CHIPSET FILE + +load_filter("intel_smbus") +load_filter("via_bars") + +function smbus_bar_hook(dev, reg, base) + intel_smbus_setup(base, 0x20) +end + +dev_sb_lpc = { + pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), + name = "Smbus", + bar = {}, +} + +dev_power = { + pci_dev = pci_bdf(0x0,0x11,0x0,0x0), + name = "SYS", + bar = {}, + acpi = { f = nil }, + tco = { f = nil }, +} + +function pm_io_bar(dev, reg, base) + dev.acpi.name = "ACPI" + dev.acpi.base = base + dev.acpi.size = 0x60 + generic_io_bar(dev.acpi) +end + + + +-- **************** + +function do_mainboard_setup() + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + --enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x4e, 0x07) + + northbridge_vx900() + pci_cfg16_hook(dev_power, 0x88, "PM", pm_io_bar) + pci_cfg16_hook(dev_power, 0xd0, "SMBus", smbus_bar_hook) + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/msi_ms7133.lua b/SerialICE/simba/msi_ms7133.lua deleted file mode 100644 index 039496f..0000000 --- a/SerialICE/simba/msi_ms7133.lua +++ /dev/null @@ -1,69 +0,0 @@ - -function mainboard_io_read(f, action) - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xe1 then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then - return true - end - if action.addr == 0x80 and not action.write then - return true - end -end - -filter_mainboard = { - name = "test", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - -dofile("i82801.lua") -dofile("intel_bars.lua") - -function do_mainboard_setup() - do_default_setup() - - enable_hook_i82801fx() - northbridge_i915() - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end diff --git a/SerialICE/simba/pc80.lua b/SerialICE/simba/pc80.lua deleted file mode 100644 index 35d01e3..0000000 --- a/SerialICE/simba/pc80.lua +++ /dev/null @@ -1,534 +0,0 @@ --- ********************************************************** --- --- Debug POST port at IO 0x80 - -function debugport_post(f, action) - if action.write then - printk(f, action, "*** %02x ***\n", action.data) - return true - end - return false -end - -filter_debugport = { - name = "POST", - pre = handle_action, - post = debugport_post, - hide = true, - base = 0x80, - size = 0x1 -} - - --- ********************************************************** --- --- i8259 PIC - -function i8259_pre(f, action) - local master = (bit32.rshift(0x05, action.addr) == 0x1) - local slave = (bit32.rshift(0x05, action.addr) == 0x5) - local reg = bit32.band(0x03, action.addr) - if reg == 0 or reg == 1 then - return handle_action(f, action) - end - return skip_filter(f, action) -end - -function i8259_post(f,action) - local reg = bit32.band(0x03, action.addr) - if reg == 0 or reg == 1 then - return true - end - return false -end - -function i8259_edge_pre(f, action) - return handle_action(f, action) -end - -function i8259_edge_post(f,action) - return true -end - -filter_i8259_master = { - name = "i8259 A", - pre = i8259_pre, - post = i8259_post, - hide = hide_i8259_io, - base = 0x20, - size = 0x20 -} - -filter_i8259_slave = { - name = "i8259 B", - pre = i8259_pre, - post = i8259_post, - hide = hide_i8259_io, - base = 0xa0, - size = 0x20 -} - -filter_i8259_edge = { - name = "i8259 C", - pre = i8259_edge_pre, - post = i8259_edge_post, - hide = hide_i8259_io, - base = 0x4d0, - size = 0x2 -} - --- ********************************************************** --- --- i8237 DMA - -function i8237_pre(f, action) - if action.addr == 0x80 then - return skip_filter(f, action) - end - return handle_action(f, action) -end - -function i8237_post(f, action) - if action.addr == 0x80 then - return false - end - return true -end - - -filter_i8237_a = { - name = "i8237 A", - pre = i8237_pre, - post = i8237_post, - hide = hide_i8237_io, - base = 0x00, - size = 0x20 -} -filter_i8237_b = { - name = "i8237 B", - pre = i8237_pre, - post = i8237_post, - hide = hide_i8237_io, - base = 0x80, - size = 0x20 -} -filter_i8237_c = { - name = "i8237 C", - pre = i8237_pre, - post = i8237_post, - hide = hide_i8237_io, - base = 0xc0, - size = 0x20 -} - - --- ********************************************************** --- --- i8254 IRQ0 and Speaker - -function i8254_pre(f, action) - - -- nothing to do on reads - if not action.write then - return handle_action(f, action) - end - - local reg = bit32.band(0x03, action.addr) - if reg >= 0x0 and reg < 0x03 then - local counter_n = 0 - local counter_p = 0 - if f.counter[reg].lsb then - f.counter[reg].lsb = f.counter[reg].after_lsb - counter_n = action.data - counter_p = bit32.band(0xff00, f.counter[reg].init) - else - counter_n = bit32.lshift(action.data, 8) - counter_p = bit32.band(0x00ff, f.counter[reg].init) - end - f.counter[reg].init = bit32.bor(counter_n, counter_p) - elseif reg == 0x03 then - local reg2 = bit32.rshift(action.data, 6) - local rwsel = bit32.band(0x3, bit32.rshift(action.data, 4)) - if reg2 == 0x3 then - if bit32.band(0x10, action.data) == 0 then - f.counter[0].readback = (bit32.band(0x2, action.data) ~= 0) - f.counter[1].readback = (bit32.band(0x4, action.data) ~= 0) - f.counter[2].readback = (bit32.band(0x8, action.data) ~= 0) - end - if bit32.band(0x20, action.data) == 0 then - f.counter[0].latch = (bit32.band(0x2, action.data) ~= 0) - f.counter[1].latch = (bit32.band(0x4, action.data) ~= 0) - f.counter[2].latch = (bit32.band(0x8, action.data) ~= 0) - end - elseif rwsel == 0x0 then - f.counter[reg2].latch = true - else - f.counter[reg2].mode = bit32.band(0xf, action.data) - if rwsel == 0x1 then - f.counter[reg2].lsb = true - f.counter[reg2].after_lsb = true - elseif rwsel == 0x2 then - f.counter[reg2].lsb = false - f.counter[reg2].after_lsb = false - elseif rwsel == 03 then - f.counter[reg2].lsb = true - f.counter[reg2].after_lsb = false - end - end - end - return handle_action(f, action) -end - -function i8254_post(f, action) - local reg = bit32.band(0x03, action.addr) - if reg >= 0x0 and reg < 0x03 then - if action.write then - local mode = bit32.band(0x0f, f.counter[reg].mode); - local modestr = "Mode" .. mode - if mode == 0x4 then - modestr = "Square Wave" - elseif mode == 0x6 then - modestr = "Rate Generator" - end - if bit32.band(0x01, mode) ~= 0 then - modestr = modestr .. " (BCD)" - end - - local period = 838 * f.counter[reg].init - if reg == 0 then - if period == 0 then - printk(f, action, "IRQ0 disabled\n") - else - printk(f, action, "IRQ0 (%s): %d ns\n", modestr, period) - end - elseif reg == 1 then - if period == 0 then - printk(f, action, "Refresh disabled\n") - else - printk(f, action, "Refresh (%s): %d ns\n", modestr, period) - end - elseif reg == 2 then - if period ~= 0 then - local spktone = 1193000 / f.counter[reg].init - printk(f, action, "Speaker Tone (%s): %d kHz\n", modestr, spktone) - end - end - else - if f.counter[reg].readback then - f.counter[reg].readback = false - f.counter[reg].status = action.data - printk(f, action, "[%d] status = %02x\n", reg, f.counter[reg].status) - end - if f.counter[reg].latch then - f.counter[reg].latch = false - f.counter[reg].current = action.data - printk(f, action, "[%d] current = %d\n", reg, f.counter[reg].current) - end - end - elseif reg == 0x03 then - end - return true -end - -i8254_counters = {} -i8254_counters[0x0] = { init=0, current=0, latch, readback, status=0 } -i8254_counters[0x1] = { init=0, current=0, latch, readback, status=0 } -i8254_counters[0x2] = { init=0, current=0, latch, readback, status=0 } - -filter_i8254_a = { - name = "i8254 A", - pre = i8254_pre, - post = i8254_post, - base = 0x40, - hide = hide_i8254_io, - size = 4, - counter = i8254_counters, -} -filter_i8254_b = { - name = "i8254 B", - pre = i8254_pre, - post = i8254_post, - base = 0x50, - hide = hide_i8254_io, - size = 4, - counter = i8254_counters, -} - - --- ********************************************************** --- --- i8042 KBD, A20, Reset(?) - -function i8042_write(f, action) - if action.addr == 0x60 then - f.reg.data = action.data - f.reg.sts = bit32.band(f.reg.sts, 0xf7) - if (f.reg.cmd == 0xd1) then - f.reg.A20 = (bit32.band(0x02, action.data) == 0x02) - end - return handle_action(f, action) - end - if action.addr == 0x64 then - f.reg.cmd = action.data - f.reg.sts = bit32.bor(f.reg.sts, 0x0a) - return handle_action(f, action) - end - return skip_filter(f, action) -end - -function i8042_read(f, action) - if action.addr == 0x60 then - f.reg.sts = bit32.band(f.reg.sts, 0xfe) - return handle_action(f, action) - end - if action.addr == 0x64 then - return handle_action(f, action) - end - return skip_filter(f, action) -end - -function i8042_pre(f, action) - if (action.write) then - return i8042_write(f, action) - else - return i8042_read(f, action) - end -end - -function i8042_post(f, action) - if action.addr == 0x60 then - if action.write and f.reg.cmd == 0xd1 then - if f.reg.A20 then - printk(f, action, "A20 enabled\n") - else - printk(f, action, "A20 disabled\n") - end - end - return true - end - if action.addr == 0x64 then - return true - end - return false -end - -filter_i8042 = { - decode = F_FIXED, - name = "i8042", - pre = i8042_pre, - post = i8042_post, - hide = hide_i8042_io, - base = 0x60, - size = 0x5, - reg = { data = 0, sts = 0, cmd = 0, A20 = 0 } -} - - --- ********************************************************** --- --- CMOS nvram - - -function nvram_bank(addr) - if bit32.band(0xfe, addr) == 0x70 then - return 1 - elseif bit32.band(0xfe, addr) == 0x72 then - return 2 - elseif bit32.band(0xfe, addr) == 0x74 then - return 2 - else - return 0 - end -end - -function nvram_write(f, action) - local val = action.data - local rtc = false - local is_index = (bit32.band(0x01, action.addr) == 0x0) - local bank = nvram_bank(action.addr) - - if bank == 1 then - if is_index then - f.reg.p70 = bit32.band(0x7f, val) - if f.reg.p70 < 0x0E then - rtc = true - end - else - f.nvram_data[f.reg.p70] = val - f.nvram_set[f.reg.p70] = true - if f.reg.p70 < 0x0E then - rtc = true - end - end - elseif bank == 2 then - if is_index then - f.reg.p72 = bit32.band(0x7f, val) - else - local index = 0x80 + f.reg.p72 - f.nvram_data[index] = val - f.nvram_set[index] = true - end - end - if cache_nvram and not rtc then - return fake_action(f, action, val) - else - return handle_action(f, action) - end -end - -function nvram_read(f, action) - local val = 0 - local rtc = false - local is_index = (bit32.band(0x01, action.addr) == 0x0) - local bank = nvram_bank(action.addr) - - if bank == 1 then - if is_index then - -- NMI returned as 0 - val = f.reg.p70 - if f.reg.p70 < 0x0E then - rtc = true - end - else - if f.reg.p70 < 0x0E then - rtc = true - elseif f.nvram_set[f.reg.p70] then - val = f.nvram_data[f.reg.p70] - end - end - else -- bank - if is_index then - -- NMI returned as 0 - val = f.reg.p72 - else - local index = 0x80 + f.reg.p72 - if f.nvram_set[index] then - val = f.nvram_data[index] - end - end - end - if cache_nvram and not rtc then - return fake_action(f, action, val) - else - return handle_action(f, action) - end -end - -function nvram_pre(f, action) - if (action.write) then - return nvram_write(f, action) - else - return nvram_read(f, action) - end -end - -function nvram_post(f, action) - if bit32.band(0x01, action.addr) == 0x0 then - return true - end - - local bank = nvram_bank(action.addr) - if (action.write) then - if bank == 1 then - printk(f, action, "[%02x] <= %02x\n", f.reg.p70, action.data) - elseif bank == 2 then - printk(f, action, "[%02x] <= %02x\n", 0x80 + f.reg.p72, action.data) - end - else - if bank == 1 then - printk(f, action, "[%02x] => %02x\n", f.reg.p70, action.data) - elseif bank == 2 then - printk(f, action, "[%02x] => %02x\n", 0x80 + f.reg.p72, action.data) - end - end - return true -end - -filter_nvram = { - name = "NVram", - pre = nvram_pre, - post = nvram_post, - base = 0x70, - size = 8, - hide = hide_nvram_io, - reg = { p70 = 0, p72 = 0 }, - nvram_data = {}, - nvram_set = {}, -} - - --- ********************************************************** --- --- Reset at 0xcf9 - -function sys_rst_pre(f, action) - if action.size == 1 then - if action.write and bit32.band(action.data, 0x04) == 0x04 then - SerialICE_system_reset() - end - return handle_action(f, action) - end - return skip_filter(f, action) -end - -function sys_rst_post(f, action) - if action.size == 1 then - if action.write then - printk(f, action, "Control = %02x\n", action.data) - return true - end - end - return false -end - -filter_reset = { - name = "Reset", - pre = sys_rst_pre, - post = sys_rst_post, - hide = false, - base = 0xcf9, - size = 1 -} - --- ********************************************************** --- --- VGA io - -function vga_io_pre(f, action) - return skip_filter(f, action) -end - -function vga_io_post(f, action) - return true -end - -filter_vga_io = { - name = "VGA", - pre = vga_io_pre, - post = vga_io_post, - hide = false, - base = 0x3c0, - size = 0x20, -} - - --- ********************************************************** --- --- Enable all PC80 stuff - -function enable_hook_pc80() - enable_hook(io_hooks, filter_i8237_a) - enable_hook(io_hooks, filter_i8237_b) - enable_hook(io_hooks, filter_i8237_c) - enable_hook(io_hooks, filter_i8259_master) - enable_hook(io_hooks, filter_i8259_slave) - enable_hook(io_hooks, filter_i8259_edge) - enable_hook(io_hooks, filter_i8042) - enable_hook(io_hooks, filter_i8254_a) - enable_hook(io_hooks, filter_i8254_b) - enable_hook(io_hooks, filter_reset) - enable_hook(io_hooks, filter_nvram) - enable_hook(io_hooks, filter_vga_io) - enable_hook(io_hooks, filter_debugport) -end - diff --git a/SerialICE/simba/serialice.lua b/SerialICE/simba/serialice.lua index 4905da1..191a691 100644 --- a/SerialICE/simba/serialice.lua +++ b/SerialICE/simba/serialice.lua @@ -36,12 +36,18 @@ dofile("core_io.lua") dofile("memory.lua") dofile("cpu.lua") dofile("pci_cfg.lua") -dofile("pc80.lua") -dofile("superio.lua") dofile("mmio.lua") io.write("SerialICE: LUA script initialized.\n") +function load_filter(str) + local filename = "chipset/" .. str .. ".lua" + dofile(filename) +end + +load_filter("pc80") +load_filter("superio") + function do_minimal_setup() enable_hook(io_hooks, filter_io_fallback) enable_hook(mem_hooks, filter_mem_fallback) @@ -64,18 +70,19 @@ function do_default_setup() end end -mainboard_file = string.format("%s.lua", string.lower(string.gsub(SerialICE_mainboard, "[ -]", "_"))) +root_info("Mainboard %s connected.\n", SerialICE_mainboard) +local mainboard_file = string.format("mainboard/%s.lua", string.lower(string.gsub(SerialICE_mainboard, "[ -]", "_"))) local mainboard_lua, ferr = loadfile(mainboard_file) local mainboard_script = io.open(mainboard_file) if mainboard_script then io.close(mainboard_script) assert(mainboard_lua, ferr) mainboard_lua() - root_info("Mainboard script %s initialized.\n", mainboard_file) + root_info("Using script %s.\n", mainboard_file) do_minimal_setup() do_mainboard_setup() else - root_info("Mainboard script %s not found.\n", mainboard_file) + root_info("Script %s not found.\n", mainboard_file) do_minimal_setup() do_default_setup() end diff --git a/SerialICE/simba/smbus_host.lua b/SerialICE/simba/smbus_host.lua deleted file mode 100644 index 1da4b0c..0000000 --- a/SerialICE/simba/smbus_host.lua +++ /dev/null @@ -1,558 +0,0 @@ - - -local debug_smbus = false -smbus = {} - -smbus.host = { - state = { current = 0, jump_to = 0 }, - proto = 0, - start_proto = 0, - - passive = true, - signals = 0, - - slave = 0, - cmd = 0, - data0 = 0, - data1 = 0, - data0_valid = false, - data1_valid = false, - wr_data0 = 0, - wr_data1 = 0, - block_register = 0, - - block = {}, - max_index = 0, -} - -MAX_BLOCK_SRAM = 32 - -if true then - for i = 0, MAX_BLOCK_SRAM-1, 1 do - smbus.host.block[i] = { hw = 0, tmp = 0, hw_valid = false, tmp_valid = false } - end -end - --- ******************* - -SIG_INUSE = 0 -SIG_RELEASE = 1 -SIG_START = 2 -SIG_ABORT = 3 -SIG_DONE = 4 -SIG_ACK = 5 -SIG_TIMEOUT = 6 -SIG_TIMEOUT_ACK = 7 -SIG_DATA_WRITE = 8 - -local function signal_reset(f) - f.host.signals = 0 -end - -local function signal_set(f, flag) - local mask = bit32.lshift(1, flag) - f.host.signals = bit32.bor(f.host.signals, mask) -end - -local function signal_clr(f, flag) - local mask = bit32.bnot(bit32.lshift(1, flag)) - f.host.signals = bit32.band(f.host.signals, mask) - -end - -local function signal_in(f, flag) - local mask = bit32.lshift(1, flag) - return bit32.band(f.host.signals, mask) ~= 0 -end - --- ******************* - --- SMBus Protocol Message Types -SMBUS_NOOP = 0 -SMBUS_QUICK = 1 -SMBUS_BYTE = 2 -SMBUS_BYTE_DATA = 3 -SMBUS_WORD_DATA = 4 -SMBUS_PROC_CALL = 5 -SMBUS_BLOCK_DATA = 6 -SMBUS_I2C_BLOCK_DATA = 7 -SMBUS_BLOCK_PROCESS = 8 - -local proto_name = {} -proto_name[SMBUS_NOOP] = "(no-op)" -proto_name[SMBUS_QUICK] = "quick" -proto_name[SMBUS_BYTE] = "byte" -proto_name[SMBUS_BYTE_DATA] = "byte_data" -proto_name[SMBUS_WORD_DATA] = "word_data" -proto_name[SMBUS_PROC_CALL] = "proc_call" -proto_name[SMBUS_BLOCK_DATA] = "block" -proto_name[SMBUS_I2C_BLOCK_DATA] = "i2c_block" -proto_name[SMBUS_BLOCK_PROCESS] = "block_process" - --- SMBus Host -SMB_REG_CMD = 1 -SMB_REG_SLAVE = 2 -SMB_REG_DATA0 = 3 -SMB_REG_DATA1 = 4 -SMB_REG_BLOCK = 5 -SMB_REG_PROTO = 6 - - -local function dump_block(f, length) - local block = "" - local max_length = math.min(length, MAX_BLOCK_SRAM) - - for i=0, max_length-1, 1 do - if f.host.block[i].hw_valid then - block = block .. string.format(" %02x", f.host.block[i].hw) - else - block = block .. " xx" - end - end - return block -end - - --- FIXME: Probably wrong for process calls and hw-dependent. -local function host_proto(f, proto) - return f.host.proto == proto -end - -local function host_reading(f) - return bit32.band(f.host.slave, 0x01) == 0x01 -end - - - -local function dump_transaction(f, action) - - local data0, data1, length, dir - local invalid_data = "xx" - local iodir = {} - iodir[0] = "<=" - iodir[1] = "=>" - - if host_reading(f) then - dir = iodir[1] - data0 = invalid_data - length = f.host.max_index - if f.host.data0_valid then - length = f.host.data0 - data0 = string.format("%02x", f.host.data0) - end - data1 = invalid_data - if f.host.data1_valid then - data1 = string.format("%02x", f.host.data1) - end - else - dir = iodir[0] - length = f.host.wr_data0 - data0 = string.format("%02x", f.host.wr_data0) - data1 = string.format("%02x", f.host.wr_data1) - end - - - local dump = string.format("%02x %s ", f.host.slave / 2, proto_name[f.host.proto]) - - if host_proto(f, SMBUS_QUICK) then - - elseif host_proto(f, SMBUS_BYTE) then - dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) - - elseif host_proto(f, SMBUS_BYTE_DATA) then - dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) - - elseif host_proto(f, SMBUS_WORD_DATA) then - dump = dump .. string.format("%02x %s %s%s", f.host.cmd, dir, data0, data1) - - elseif host_proto(f, SMBUS_PROC_CALL) then - dump = dump .. string.format("%02x %02x %02x %s %s %s", f.host.cmd, - f.host.wr_data0, f.host.wr_data1, iodir[1], data0, data1) - - elseif host_proto(f, SMBUS_BLOCK_DATA) then - dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, dir) - dump = dump .. dump_block(f, length) .. "" - - elseif host_proto(f, SMBUS_I2C_BLOCK_DATA) then - dump = dump .. string.format("%02x %02x %02x len=%02d %s", - f.host.cmd, f.host.data0, f.host.data1, f.host.max_index, dir) - dump = dump .. dump_block(f, length) .. "" - - elseif host_proto(f, SMBUS_BLOCK_PROCESS) then - dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, iodir[1]) - dump = dump .. dump_block(f, length) .. "" - else - dump = dump .. "Cannot parse command" - end - - if signal_in(f, SIG_TIMEOUT) then - dump = dump .. " (TIMEOUT) " - end - - printk(f, action, "%s\n", dump) -end - - --- ******************* - -HOST_NOOP = 0 -HOST_IDLE = 1 -HOST_ACTIVE = 2 -HOST_STARTED = 3 -HOST_WAIT = 4 -HOST_COMPLETE = 5 -HOST_FAIL = 6 - -local ctrl_state = {} -ctrl_state[HOST_NOOP] = "noop" -ctrl_state[HOST_IDLE] = "idle" -ctrl_state[HOST_ACTIVE] = "active" -ctrl_state[HOST_STARTED] = "started" -ctrl_state[HOST_WAIT] = "wait" -ctrl_state[HOST_COMPLETE] = "complete" -ctrl_state[HOST_FAIL] = "failed" - -function dprintk(...) - if debug_smbus then - printk(...) - end -end - -local function host_jump(f, state) - f.host.state.jump_to = state -end - -local function host_change_state(f, prev_state, new_state) - - if new_state == HOST_NOOP then - --printk(f, f.host.action, "state switch to HOST_NOOP\n") - new_state = HOST_IDLE - end - - dprintk(f, f.host.action, "%s -> %s\n", - ctrl_state[prev_state], ctrl_state[new_state]) - - -- Jumping to current is no jump. - f.host.state.current = new_state - f.host.state.jump_to = new_state - - if smbus.state(f, HOST_IDLE) then - signal_reset(f) - - elseif smbus.state(f, HOST_ACTIVE) then - signal_reset(f) - signal_set(f, SIG_INUSE) - - elseif smbus.state(f, HOST_STARTED) then - local i - f.host.proto = f.host.start_proto - f.host.wr_data0 = f.host.data0 - f.host.wr_data1 = f.host.data1 - - -- Invalidation used with reads - f.host.data0_valid = false - f.host.data1_valid = false - - for i = 0, MAX_BLOCK_SRAM-1, 1 do - f.host.max_index = 0 - -- On block writes, previously read data in buffer is also valid. - if f.host.block[i].tmp_valid then - f.host.block[i].hw = f.host.block[i].tmp - f.host.block[i].tmp_valid = false - f.host.block[i].hw_valid = true - end - -- On block reads, no data in buffer is yet valid. - if host_reading(f) and host_proto(f, SMBUS_BLOCK_DATA) then - f.host.block[i].hw_valid = false; - end - end - - elseif smbus.state(f, HOST_COMPLETE) then - dump_transaction(f, f.host.action) - if signal_in(f, SIG_RELEASE) then - host_jump(f, HOST_IDLE) - else - host_jump(f, HOST_ACTIVE) - end - - elseif smbus.state(f, HOST_FAIL) then - dump_transaction(f, f.host.action) - host_jump(f, HOST_ACTIVE) - end - -end - -local function host_switch(f, new_state) - local prev_state = f.host.state.current - while prev_state ~= new_state do - host_change_state(f, prev_state, new_state) - prev_state = f.host.state.current - new_state = f.host.state.jump_to - end -end - -local function host_read_completed(f) - - if not host_reading(f) then - return true - end - - local complete = false - - if host_proto(f, SMBUS_QUICK) then - complete = true - - elseif host_proto(f, SMBUS_BYTE) then - complete = f.host.data0_valid - - elseif host_proto(f, SMBUS_BYTE_DATA) then - complete = f.host.data0_valid - - elseif host_proto(f, SMBUS_WORD_DATA) then - complete = f.host.data0_valid and f.host.data1_valid - - elseif host_proto(f, SMBUS_BLOCK_DATA) then - complete = f.host.data0_valid and f.host.max_index >= f.host.data0 - - elseif host_proto(f, SMBUS_PROC_CALL) or host_proto(f, SMBUS_I2C_BLOCK_DATA) - or host_proto(f, SMBUS_BLOCK_PROCESS) then - printk(f, f.host.action, "Unimplemented completion (proto %d)\n", f.host.proto) - end - return complete -end - - --- Syncronize state machine according to input signals. -local function host_sync(f) - --- if release and not smbus.state(f, HOST_ACTIVE) then --- printk(f, f.host.action, "Premature reset of bit INUSE_STS\n") --- end - if signal_in(f, SIG_ABORT) then - -- FIXME Killing on-going transaction. - host_switch(f, HOST_COMPLETE) - end - - if smbus.state(f, HOST_IDLE) then - if signal_in(f, SIG_INUSE) then - host_switch(f, HOST_ACTIVE) - end - if signal_in(f, SIG_START) then - host_switch(f, HOST_STARTED) - end - - elseif smbus.state(f, HOST_ACTIVE) then - if signal_in(f, SIG_START) then - host_switch(f, HOST_STARTED) - end - - elseif smbus.state(f, HOST_STARTED) then - if signal_in(f, SIG_TIMEOUT) then - host_switch(f, HOST_FAIL) - elseif signal_in(f, SIG_DONE) then - host_switch(f, HOST_WAIT) - end - - elseif smbus.state(f, HOST_WAIT) then - if signal_in(f, SIG_START) then - -- Restarting previous transaction. - host_switch(f, HOST_COMPLETE) - host_switch(f, HOST_STARTED) - elseif signal_in(f, SIG_ACK) and not host_reading(f) then - -- Complete after sw ack. - host_switch(f, HOST_COMPLETE) - elseif signal_in(f, SIG_DATA_WRITE) or host_read_completed(f) then - -- Complete after all data read or new data written - -- remain active - signal_clr(f, SIG_RELEASE) - host_switch(f, HOST_COMPLETE) - end - elseif smbus.state(f, HOST_FAIL) then - if signal_in(f, SIG_TIMEOUT_ACK) then - host_switch(f, HOST_COMPLETE) - end - end - - if signal_in(f, SIG_START) and not smbus.state(f, HOST_STARTED) then - printk(f, f.host.action, "Starting from illegal state\n"); - end - - signal_clr(f, SIG_DONE) - signal_clr(f, SIG_START) - signal_clr(f, SIG_DATA_WRITE) -end - - - --- ******************************* - --- Mutual exclusion. -function smbus.get_resource(f) - signal_set(f, SIG_INUSE) - host_sync(f) -end - -function smbus.put_resource(f) - signal_set(f, SIG_RELEASE) - host_sync(f) -end - --- status -function smbus.state(f, state) - return f.host.state.current == state -end - -function smbus.passive(f) - return f.host.passive -end - --- control -function smbus.start(f, proto) - signal_set(f, SIG_START) - f.host.start_proto = proto - host_sync(f) -end - -function smbus.timeout(f) - signal_set(f, SIG_TIMEOUT) - host_sync(f) -end - -function smbus.timeout_ack(f) - signal_set(f, SIG_TIMEOUT_ACK) - host_sync(f) -end - -function smbus.done(f) - signal_set(f, SIG_DONE) - host_sync(f) -end - -function smbus.ack(f) - signal_set(f, SIG_ACK) - host_sync(f) -end - -function smbus.abort(f) - signal_set(f, SIG_ABORT) - host_sync(f) -end - --- A data read may complete and close an active transaction. -function smbus.data_read(f, action) - if not action.write then - signal_clr(f, SIG_DATA_WRITE) - host_sync(f) - end -end - --- A data write will close active transaction. -function smbus.data_write(f, action) - if action.write then - signal_set(f, SIG_DATA_WRITE) - host_sync(f) - end -end - - - -function smbus.update_register(f, action, smb_reg) - - local data_write = action.write or smbus.passive(f) - - -- A write to data registers completes previous transaction. - smbus.data_write(f, action) - - if smb_reg == SMB_REG_SLAVE then - if data_write then - f.host.slave = action.data - else - action.data = f.host.slave - end - - elseif smb_reg == SMB_REG_CMD then - if data_write then - f.host.cmd = action.data - else - action.data = f.host.cmd - end - - elseif smb_reg == SMB_REG_DATA0 then - if data_write then - f.host.data0 = action.data - else - action.data = f.host.data0 - end - f.host.data0_valid = true - - elseif smb_reg == SMB_REG_DATA1 then - if data_write then - f.host.data1 = action.data - else - action.data = f.host.data1 - end - f.host.data1_valid = true - - elseif smb_reg == SMB_REG_BLOCK then - if data_write then - f.host.block_register = action.data - else - action.data = f.host.block_register - end - -- Nothing here, smbus.host_block_data updates datas. - -- This exist to check completion below for blocks. - elseif smb_reg == SMB_REG_PROTO then - -- Nothing here. Protocol updates when signalling start. - else - printk(f, f.host.action, "Undefined host register\n") - end - - -- New read data may complete a waiting transaction. - smbus.data_read(f, action) -end - -function smbus.block_data(f, action, index) - - if smbus.passive(f) then - if not action.write then - f.host.block[index].hw = action.data - f.host.block[index].hw_valid = true - end - f.host.block[index].tmp = action.data - f.host.block[index].tmp_valid = true - else - if action.write then - f.host.block[index].tmp = action.data - f.host.block[index].tmp_valid = true - else - action.data = 0xff - if f.host.block[index].tmp_valid then - action.data = f.host.block[index].tmp - elseif f.host.block[index].hw_valid then - action.data = f.host.block[index].hw - end - end - end - - -- Detect for block read completion via maximum indexed item. - if not action.write then - f.host.max_index = math.max(f.host.max_index, index+1) - end -end - -local init_action = { - name = "init", - cs = 0, - eip = 0, - my_id = 0, - parent_id = 0, -} -function smbus.init(f) - if not f.host then - f.host = smbus.host - f.host.action = init_action - end - host_switch(f, HOST_IDLE) -end - - diff --git a/SerialICE/simba/superio.lua b/SerialICE/simba/superio.lua deleted file mode 100644 index 7d6252c..0000000 --- a/SerialICE/simba/superio.lua +++ /dev/null @@ -1,262 +0,0 @@ - - -function pnp_switch_ldn(f, data) - if not f.ldn[data] then - f.ldn[data] = { data = {}, set = {}, bar0 = {}, bar1 = {} } - end - f.pnp.active_ldn = data -end - -function pnp_select_cfg(f, data) - f.pnp.reg = data -end - -function pnp_store_cfg(f, data) - local reg = f.pnp.reg - if reg < 0x30 then - f.chip.data[reg] = data; - f.chip.set[reg] = true; - else - local ldn = f.pnp.active_ldn - f.ldn[ldn].data[reg] = data; - f.ldn[ldn].set[reg] = true; - end -end - - --- ********************************************************** --- --- SuperIO device handling - -function superio_pnpdev(f) - return string.format("%s %02x:%02x", f.name, f.base, f.pnp.active_ldn) -end - -function superio_string(f) - if f.pnp.reg < 0x30 then - return string.format("%02x: ", f.base) - else - return string.format("%02x:%02x ", f.base, f.pnp.active_ldn) - end -end - -function superio_register_post(f, action) - local str = superio_string(f) - if action.write then - printk(f, action, "%s [%02x] <= %02x\n", str, f.pnp.reg, action.data) - else - printk(f, action, "%s [%02x] => %02x\n", str, f.pnp.reg, action.data) - end -end - -function superio_string_post(f, action, str2) - printk(f, action, "%s %s\n", superio_string(f), str2) -end - -function superio_try_enable_io(f, idx) - - local ldn = f.ldn[f.pnp.active_ldn] - - if ldn.set[0x30] and ldn.data[0x30] ~= 0x0 then - if idx == 0 and ldn.set[0x60] and ldn.set[0x61] then - local iobase = bit32.bor(bit32.lshift(ldn.data[0x60], 8), ldn.data[0x61]) - if not ldn.bar0.size then - ldn.bar0.size = 1 - end - if not ldn.bar0.name then - ldn.bar0.name = superio_pnpdev(f) - end - if iobase ~= 0x60 then - ldn.bar0.val = iobase - generic_io_bar(ldn.bar0) - ldn.bar0.f.decode = F_FIXED - end - end - if idx == 1 and ldn.set[0x62] and ldn.set[0x63] then - local iobase = bit32.bor(bit32.lshift(ldn.data[0x62], 8), ldn.data[0x63]) - if not ldn.bar1.size then - ldn.bar1.size = 1 - end - if not ldn.bar1.name then - ldn.bar1.name = superio_pnpdev(f) - end - if iobase ~= 0x64 then - ldn.bar1.val = iobase - generic_io_bar(ldn.bar1) - ldn.bar1.f.decode = F_FIXED - end - end - end -end - -function superio_try_enable_ldn(f, action) - local ldn = f.ldn[f.pnp.active_ldn] - - if ldn.set[0x30] and ldn.data[0x30] == 0x0 then - superio_string_post(f, action, "disabled") - else - superio_string_post(f, action, "enabled") - end -end - -function superio_pre(f, action) - if not action.write then - return handle_action(f, action) - end - - if action.addr == f.base then - pnp_select_cfg(f, action.data) - return handle_action(f, action) - end - - if action.addr == f.base + 0x01 then - -- Also creates new LDN instance, if necessary. - if f.pnp.reg == f.pnp.ldn_register then - pnp_switch_ldn(f, action.data) - end - - pnp_store_cfg(f, action.data) - - -- Don't allow that our SIO power gets disabled. - if f.pnp.reg == 0x02 then - return drop_action(f, action, 0) - end - - -- Don't mess with oscillator setup. - if f.pnp.reg == 0x24 then - return drop_action(f, action, 0) - end - return handle_action(f, action) - end - - -- should not reach here - return skip_filter(f, action) -end - -function superio_post(f, action) - - -- Do not log change of register or LDN. - if action.addr == f.base or f.pnp.reg == f.pnp.ldn_register then - return true - end - - if not action.write then - superio_register_post(f, action) - return true - end - - local ldn = f.ldn[f.pnp.active_ldn] - - -- Log base address once both bytes are set. - - if ( f.pnp.reg == 0x60 or f.pnp.reg == 0x61 ) then - superio_try_enable_io(f, 0) - return true - end - - if ( f.pnp.reg == 0x62 or f.pnp.reg == 0x63 ) then - superio_try_enable_io(f, 1) - return true - end - - if f.pnp.reg == 0x30 then - superio_try_enable_io(f, 0) - superio_try_enable_io(f, 1) - superio_try_enable_ldn(f, action) - return true - end - - if f.pnp.reg == 0x70 then - superio_string_post(f, action, string.format("irq = %d", ldn.data[0x70])) - return true - end - if f.pnp.reg == 0x72 then - superio_string_post(f, action, string.format("irq2 = %d", ldn.data[0x72])) - return true - end - - superio_register_post(f, action) - return true -end - - -filter_superio_2e = { - name = "PnP", - pre = superio_pre, - post = superio_post, - base = 0x2e, - size = 0x02, - hide = hide_superio_cfg, - chip = { data = {}, set = {} }, - pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, - ldn = {}, -} -filter_superio_4e = { - name = "PnP", - pre = superio_pre, - post = superio_post, - base = 0x4e, - size = 0x02, - hide = hide_superio_cfg, - chip = { data = {}, set = {} }, - pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, - ldn = {}, -} - - -function superio_get_filter(cfg_base) - if cfg_base == 0x2e then - return filter_superio_2e - elseif cfg_base == 0x4e then - return filter_superio_4e - else - return nil - end -end - -function superio_set_ldn_register(f, ldn_register) - f.pnp.ldn_register = ldn_register -end - -function superio_new_ldn(f, idx) - if not f.ldn[idx] then - f.ldn[idx] = { data = {}, set = {}, bar0 = {}, bar1 = {} } - end -end - -function superio_ldn_iobase0(f, idx, name, size) - f.ldn[idx].bar0.name = name - f.ldn[idx].bar0.size = size -end - -function superio_ldn_iobase1(f, idx, name, size) - f.ldn[idx].bar1.name = name - f.ldn[idx].bar1.size = size -end - -function enable_hook_superio(base, ldn_register) - local sio = superio_get_filter(base) - superio_set_ldn_register(sio, ldn_register) - enable_hook(io_hooks, sio) -end - --- ********************************************************** --- --- Serial Port handling - -function com_pre(f, action) - if (action.write) then - return drop_action(f, action, action.data) - else - return drop_action(f, action, 0xff) - end -end - -filter_com1 = { - name = "COM1", - pre = com_pre, - post = io_post, - base = 0x3f8, - size = 8, - hide = false, -} diff --git a/SerialICE/simba/via_bars.lua b/SerialICE/simba/via_bars.lua deleted file mode 100644 index 7868535..0000000 --- a/SerialICE/simba/via_bars.lua +++ /dev/null @@ -1,30 +0,0 @@ - -function sb_pcie_bar(dev, reg, base) - local baseaddr = bit32.lshift(base, 16) - local size = 64*1024 - - pcie_mm_cfg_bar(baseaddr, size) -end - -dev_sb = { - pci_dev = pci_bdf(0,0x11,0,0), - name = "sb", - bar = {}, -} - -function nb_pcie_bar(dev, reg, base) - local size = 64*1024 - - pcie_mm_cfg_bar(base, size) -end - -dev_nb = { - pci_dev = pci_bdf(0,0,0,0), - name = "nb", - bar = {}, -} - -function northbridge_vx900() - pci_cfg16_hook(dev_sb, 0xbd, "SB_PCI", sb_pcie_bar) - pci_cfg32_hook(dev_nb, 0x0, "NB_PCI", nb_pcie_bar) -end diff --git a/SerialICE/simba/via_epia_m_850.lua b/SerialICE/simba/via_epia_m_850.lua deleted file mode 100644 index b305353..0000000 --- a/SerialICE/simba/via_epia_m_850.lua +++ /dev/null @@ -1,164 +0,0 @@ --- SerialICE --- --- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- --- Permission is hereby granted, free of charge, to any person obtaining a copy --- of this software and associated documentation files (the "Software"), to deal --- in the Software without restriction, including without limitation the rights --- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell --- copies of the Software, and to permit persons to whom the Software is --- furnished to do so, subject to the following conditions: --- --- The above copyright notice and this permission notice shall be included in --- all copies or substantial portions of the Software. --- --- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR --- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, --- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL --- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER --- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, --- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN --- THE SOFTWARE. --- - - --- ********************************************************** --- - -function mainboard_io_read(f, action) - - -- IO slowdown - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - -- IO slowdown - if action.addr == 0xeb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - if action.addr == 0xcfb then - ignore_action(f, action) - return drop_action(f, action, 0) - end - - return skip_filter(f, action) -end - - -function mainboard_io_write(f, action) - - -- Catch RAM controller ready. - if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then - enable_ram() - end - --- if action.addr == 0xcfb then --- ignore_action(f, action) --- return drop_action(f, action, 0) --- end - - if action.addr == 0xeb then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - if action.addr == 0xed then - ignore_action(f, action) - return drop_action(f, action, action.data) - end - - return skip_filter(f, action) -end - -function mainboard_io_pre(f, action) - if action.write then - return mainboard_io_write(f, action) - else - return mainboard_io_read(f, action) - end -end - -function mainboard_io_post(f, action) - if action.addr == 0xeb or action.addr == 0xed then - return true - end - - -- If KBD controller returns status=0xff, clear 0x02. - if action.addr == 0x64 and not action.write and action.size == 1 then - if action.data == 0xff then - -- tag these but give out correct data - fake_action(f, action, action.data) - end - end -end - -filter_mainboard = { - name = "VIA", - pre = mainboard_io_pre, - post = mainboard_io_post, - hide = hide_mainboard_io, - base = 0x0, - size = 0x10000 -} - - - --- MOVE THIS TO CHIPSET FILE - -dofile("intel_smbus.lua") -dofile("via_bars.lua") - -function smbus_bar_hook(dev, reg, base) - intel_smbus_setup(base, 0x20) -end - -dev_sb_lpc = { - pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), - name = "Smbus", - bar = {}, -} - -dev_power = { - pci_dev = pci_bdf(0x0,0x11,0x0,0x0), - name = "SYS", - bar = {}, - acpi = { f = nil }, - tco = { f = nil }, -} - -function pm_io_bar(dev, reg, base) - dev.acpi.name = "ACPI" - dev.acpi.base = base - dev.acpi.size = 0x60 - generic_io_bar(dev.acpi) -end - - - --- **************** - -function do_mainboard_setup() - enable_hook(io_hooks, filter_pci_io_cfg) - enable_hook(mem_hooks, filter_lapic) - enable_hook(mem_hooks, filter_ioapic) - - enable_hook(cpumsr_hooks, filter_intel_microcode) - enable_hook(cpuid_hooks, filter_multiprocessor) - - -- I have a hook to detect RAM initialisation from - -- a POST code I can skip this here - --enable_ram() - - enable_hook_pc80() - enable_hook_superio(0x4e, 0x07) - - northbridge_vx900() - pci_cfg16_hook(dev_power, 0x88, "PM", pm_io_bar) - pci_cfg16_hook(dev_power, 0xd0, "SMBus", smbus_bar_hook) - - -- Apply mainboard hooks last, so they are the first ones to check - enable_hook(io_hooks, filter_mainboard) -end

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Patch set updated for serialice: 916de93 Fix QEMU build for glibc-2.17
by Kyösti Mälkki March 17, 2013

March 17, 2013

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2504 -gerrit commit 916de93aa5d883cdae0a4659b8f163a0c3a62229 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Mon Feb 25 03:49:04 2013 +0100 Fix QEMU build for glibc-2.17 The clock_* functions are no longer in librt starting with glibc-2.17, but timer_* functions are. This solves linker errors similar to this: (32-bit archlinux installation with glibc 2.17-3, binutils 2.23.1-3, glib2 2.34.3-1) /usr/bin/ld: ../qemu-timer.o: undefined reference to symbol 'timer_settime@@GLIBC_2.2' /usr/bin/ld: note: 'timer_settime@@GLIBC_2.2' is defined in DSO /usr/lib/librt.so.1 so try adding it to the linker command line /usr/lib/librt.so.1: could not read symbols: Invalid operation Change-Id: I2d335d065457788ef8aada7d0d500e84ba31e4d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/configure | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 24778bf..947fa3f 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -2401,7 +2401,10 @@ fi cat > $TMPC <<EOF #include <signal.h> #include <time.h> -int main(void) { clockid_t id; return clock_gettime(id, NULL); } +int main(void) { + timer_t timer; struct itimerspec timeout; timer_settime(timer, 0, &timeout, NULL); + clockid_t id; return clock_gettime(id, NULL); +} EOF if compile_prog "" "" ; then

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Patch set updated for serialice: 59acf36 Do not build without compatible Lua
by Kyösti Mälkki March 17, 2013

March 17, 2013

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2772 -gerrit commit 59acf368a2c4f91cf64d6bd6ffbc670b8666fae5 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 16 13:12:01 2013 +0200 Do not build without compatible Lua The pre-built Lua library for 32bit distribution is most likely built with the type of LUA_INTEGER having essentially range of signed 32bit integer. SerialICE requires range of 32bit unsigned, so do not even begin the build if that is not satisfied. Change-Id: Icb93d0126aac5e6e6aaa49cb04a2ebb6077389f1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/build.sh | 4 +++- qemu-0.15.x/configure | 21 +++++++++++++++++++-- 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/qemu-0.15.x/build.sh b/qemu-0.15.x/build.sh index 34b564c..e44ebc1 100644 --- a/qemu-0.15.x/build.sh +++ b/qemu-0.15.x/build.sh @@ -2,4 +2,6 @@ ./configure --disable-kvm --disable-sdl --enable-serialice \ --target-list="x86_64-softmmu, i386-softmmu" -make +if [ $? -eq 0 ]; then + make +fi diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 5eed581..24778bf 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -1759,11 +1759,28 @@ EOF fi if test "$got_lua" != "yes" ; then echo - echo "Error LUA version >= 5.2 not found, can't build with SerialICE support." + echo "Error Lua version >= 5.2 not found. Can't build QEMU with SerialICE support." echo exit 1 fi - serialice=yes + +# Test if lua-5.2.x-intsize.patch has been applied. On a 32bit host system +# LUA_INTEGER is often a signed 32bit integer (ptrdiff_t) and not enough for our needs. + cat > $TMPC << EOF +#include <lua.h> +int main(void) { LUA_INTEGER a = (unsigned long int)1<<31; if (a<0) return 1; else return 0; } +EOF + + if compile_prog "$lua_cflags" "$lua_ldflags" && $TMPE > /dev/null 2> /dev/null ; then + serialice=yes + else + echo + echo "Error Found Lua but it needs a patch to handle 32bit unsigned integers" + echo "correctly. Can't build QEMU with SerialICE support." + echo + exit 1 + fi + libs_softmmu="$lua_ldflags $libs_softmmu" fi # test "$serialice"

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New patch to review for serialice: 836b5a1 Fix generation of shared LUA library.
by Kyösti Mälkki March 16, 2013

March 16, 2013

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2771 -gerrit commit 836b5a11c3f1703b781e4e526c392346bee86a8d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 16 13:11:38 2013 +0200 Fix generation of shared LUA library. Include library dependencies '-lm -ldl' in the generation of the shared LUA library already, in case user has to install patched LUA from source. Change-Id: I90e46828ea72862f7d06002df230dd6f348437eb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/patches/lua-5.2.0-shared.diff | 2 +- qemu-0.15.x/build.sh | 2 +- qemu-0.15.x/configure | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/SerialICE/patches/lua-5.2.0-shared.diff b/SerialICE/patches/lua-5.2.0-shared.diff index 465adf2..4b8aaaf 100644 --- a/SerialICE/patches/lua-5.2.0-shared.diff +++ b/SerialICE/patches/lua-5.2.0-shared.diff @@ -35,7 +35,7 @@ diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile $(RANLIB) $@ +$(LUA_SO): $(CORE_O) $(LIB_O) -+ $(CC) -o $@ -shared $? ++ $(CC) -o $@ -shared $? -lm -ldl + $(LUA_T): $(LUA_O) $(LUA_A) $(CC) -o $@ $(LDFLAGS) $(LUA_O) $(LUA_A) $(LIBS) diff --git a/qemu-0.15.x/build.sh b/qemu-0.15.x/build.sh index 2cac6f5..34b564c 100644 --- a/qemu-0.15.x/build.sh +++ b/qemu-0.15.x/build.sh @@ -1,5 +1,5 @@ #!/bin/sh -./configure --extra-ldflags="-ldl" --disable-kvm --disable-sdl --enable-serialice \ +./configure --disable-kvm --disable-sdl --enable-serialice \ --target-list="x86_64-softmmu, i386-softmmu" make diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 29f4a1b..5eed581 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -1738,7 +1738,7 @@ EOF if test "$got_lua" != "yes" ; then lua_cflags="-I/usr/local/include" - lua_ldflags="-L/usr/local/lib -llua -lm" + lua_ldflags="-L/usr/local/lib -llua" if compile_prog "$lua_cflags" "$lua_ldflags" > /dev/null 2> /dev/null ; then got_lua=yes fi

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New patch to review for serialice: d362bbc Do not build without compatible LUA
by Kyösti Mälkki March 16, 2013

March 16, 2013

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2772 -gerrit commit d362bbceedc33c5895840977149546703279f5aa Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 16 13:12:01 2013 +0200 Do not build without compatible LUA The pre-built LUA library for 32-bit distro is most likely built with the type of LUA_INTEGER having essentially range of signed 32 bit integer. SerialICE requires range of 32bit unsigned, so do not even begin the build if that is not satisfied. Change-Id: Icb93d0126aac5e6e6aaa49cb04a2ebb6077389f1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/build.sh | 5 ++++- qemu-0.15.x/configure | 19 ++++++++++++++++++- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/qemu-0.15.x/build.sh b/qemu-0.15.x/build.sh index 34b564c..2d8ec98 100644 --- a/qemu-0.15.x/build.sh +++ b/qemu-0.15.x/build.sh @@ -2,4 +2,7 @@ ./configure --disable-kvm --disable-sdl --enable-serialice \ --target-list="x86_64-softmmu, i386-softmmu" -make +if [ $? -eq 0 ]; then + make +fi + diff --git a/qemu-0.15.x/configure b/qemu-0.15.x/configure index 5eed581..5bb082f 100755 --- a/qemu-0.15.x/configure +++ b/qemu-0.15.x/configure @@ -1763,7 +1763,24 @@ EOF echo exit 1 fi - serialice=yes + +# Test if lua-5.2.x-intsize.patch has been applied. On a 32-bit host system +# LUA_INTEGER is a signed 32 bit integer and not enough for our needs. + cat > $TMPC << EOF +#include <lua.h> +int main(void) { LUA_INTEGER a = (unsigned long int)1<<31; if (a<0) return -1; else return 0; } +EOF + + if compile_prog "$lua_cflags" "$lua_ldflags" && $TMPE > /dev/null 2> /dev/null ; then + serialice=yes + else + echo + echo "Error Found LUA but it needs patch to handle 32 bit unsigned integers" + echo "correctly. Can't build with SerialICE support." + echo + exit 1 + fi + libs_softmmu="$lua_ldflags $libs_softmmu" fi # test "$serialice"

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