Lubomir Rintel (lkundrak@v3.sk) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10326
-gerrit
commit ead085840f7ca43292ac3660327d1e592693a756 Author: Lubomir Rintel lkundrak@v3.sk Date: Wed May 27 22:17:23 2015 +0200
i82801: protect serial port in DLPC superio too
Change-Id: I6de2fbbc269fb070e56aa37c6e4e1c296fcbc1ec Signed-off-by: Lubomir Rintel lkundrak@v3.sk --- SerialICE/simba/chipset/i82801.lua | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/SerialICE/simba/chipset/i82801.lua b/SerialICE/simba/chipset/i82801.lua index 40be0f9..e27509c 100644 --- a/SerialICE/simba/chipset/i82801.lua +++ b/SerialICE/simba/chipset/i82801.lua @@ -166,7 +166,10 @@ function enable_gx_lpc_bars()
pci_cfg32_hook(dev_power, 0x84, "LPC", lpc_io_bar) pci_cfg32_hook(dev_power, 0x88, "LPC", lpc_io_bar) - pci_cfg32_hook(dev_power, 0x8c, "LPC", lpc_io_bar) + -- The GPIO range 0x1680-0x169f is forwarded to DLPC via this DRR. + -- We want our own hook for that range so that we can mask out D_PLTRST + -- toggle, ignore it here. + pci_cfg32_hook(dev_power, 0x8c, "LPC", lpc_protect_serial_port) pci_cfg32_hook(dev_power, 0x90, "LPC", lpc_io_bar) end