On 27.11.2009 00:24, Carl-Daniel Hailfinger wrote:
Give me 16 bytes of CAR/RAM and some registers (32bit reg for address, 8bit reg for data) to work with, and I can give you an interface that can do byte writes.
I think I should clarify this. If a chip requires n bytes to be written at once (some chips absolutely require 128 bytes (known), some others may require 256 bytes (not so sure)), and we can use standard JEDEC sequences, we need n+15 bytes of CAR/RAM for the write. A FIFO or other scratchpad (in-chipset "BIOS RAM") will do, but it has to reach a sustained data rate of 80 kByte/s at the very minimum (and that may result in flaky writes, so let's be conservative and require 200 kByte/s).
Regards, Carl-Daniel