Patrick Georgi (patrick@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/460
-gerrit
commit 4721aaa7808c37e741559ac40c30372edbe983ab Author: Patrick Georgi patrick.georgi@secunet.com Date: Thu Dec 1 12:09:56 2011 +0100
Support "high speed" serial transfers
This requires some chipset specific handling in case transfers faster than 115200bps are used. Due to that, the build must be reorganized a bit.
Signed-off-by: Patrick Georgi patrick.georgi@secunet.com Change-Id: I5a36e939a15fea9ed58bf25dbcb322d0e6aa7c5a --- SerialICE/Kconfig | 20 ++++++++++++++++++++ SerialICE/Makefile | 2 +- SerialICE/chipset.c | 2 ++ SerialICE/serial.c | 10 ++++++++++ SerialICE/serialice.c | 6 +++--- 5 files changed, 36 insertions(+), 4 deletions(-)
diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index a28b4c5..917a4b1 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -124,6 +124,14 @@ config BOARD_INIT default "hp_dl165_g6.c" if BOARD_HP_DL165_G6 default "wyse_s50.c" if BOARD_WYSE_S50 default "asrock_p4i65gv.c" if BOARD_ASROCK_P4I65GV + +config SOUTHBRIDGE_INIT + string + +config SUPERIO_INIT + string + + choice prompt "Target communication"
@@ -192,6 +200,16 @@ choice default SERIAL_115200 depends on SERIAL
+config SERIAL_460800 + bool "460800 bps" + help + Set serial port speed to 460800 bps. + +config SERIAL_230400 + bool "230400 bps" + help + Set serial port speed to 230400 bps. + config SERIAL_115200 bool "115200 bps" help @@ -221,6 +239,8 @@ endchoice
config SERIAL_BAUDRATE int + default 460800 if SERIAL_460800 + default 230400 if SERIAL_230400 default 115200 if SERIAL_115200 default 57600 if SERIAL_57600 default 38400 if SERIAL_38400 diff --git a/SerialICE/Makefile b/SerialICE/Makefile index 2fce4cc..102be31 100644 --- a/SerialICE/Makefile +++ b/SerialICE/Makefile @@ -120,7 +120,7 @@ $(obj)/serialice.elf: $(obj)/serialice.o $(obj)/start.o $(src)/serialice.ld
$(obj)/serialice.S: $(SOURCES) $(obj)/romcc $(Q)printf " ROMCC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(obj)/romcc -mcpu=i386 $(INCLUDES) -I. -Imainboard -DVERSION="$(VERSION)" -o $@.tmp $< + $(Q)$(obj)/romcc -mcpu=i386 $(INCLUDES) -I. -Imainboard -Isouthbridge -Isuperio -DVERSION="$(VERSION)" -o $@.tmp $< $(Q)printf ".section ".rom.text"\n.globl main\nmain:\n" > $@ $(Q)cat $@.tmp >> $@ $(Q)rm $@.tmp diff --git a/SerialICE/chipset.c b/SerialICE/chipset.c index 97d0cbb..dd88f75 100644 --- a/SerialICE/chipset.c +++ b/SerialICE/chipset.c @@ -123,5 +123,7 @@ static void pnp_exit_ext_func_mode_ite(u16 port) pnp_write_register(port, 0x02, 0x02); }
+#include CONFIG_SOUTHBRIDGE_INIT +#include CONFIG_SUPERIO_INIT #include MAINBOARD
diff --git a/SerialICE/serial.c b/SerialICE/serial.c index 9aaecb6..eee7e49 100644 --- a/SerialICE/serial.c +++ b/SerialICE/serial.c @@ -39,7 +39,17 @@
static void sio_init(void) { +#if SIO_SPEED > 115200 + /* "high speed" serial requires special chip setup + * (to be done in superio_init), and special divisor + * values (implement superio_serial_divisor() for that). + * Maybe it requires even more, but so far that seems + * to be enough. + */ + int divisor = superio_serial_divisor(SIO_SPEED); +#else int divisor = 115200 / SIO_SPEED; +#endif int lcs = 3; outb(0x00, SIO_PORT + UART_IER); outb(0x01, SIO_PORT + UART_FCR); diff --git a/SerialICE/serialice.c b/SerialICE/serialice.c index 35531dc..649ee11 100644 --- a/SerialICE/serialice.c +++ b/SerialICE/serialice.c @@ -21,13 +21,13 @@ #include <serialice.h> #include <io.h>
-/* SIO functions */ -#include "serial.c" - /* Hardware specific functions */
#include "chipset.c"
+/* SIO functions */ +#include "serial.c" + /* Accessor functions */
static void serialice_read_memory(void)