Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3510
-gerrit
commit af90943213d8219bbd8cf0d649d573844ce974d1
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Fri Jun 21 10:17:46 2013 +0200
Add support for ASRock E350M1
Change-Id: I0a1eea0cf01d36682b737e0161eb2dfbc05f8d21
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
---
SerialICE/Kconfig | 6 +++++
SerialICE/mainboard/asrock_e350m1.c | 50 +++++++++++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig
index 00933b2..16b5c6b 100644
--- a/SerialICE/Kconfig
+++ b/SerialICE/Kconfig
@@ -69,6 +69,10 @@ config BOARD_ASUS_M4A77TD_PRO
bool "ASUS M4A77TD-PRO"
select BUILD_XMMSTACK
+config BOARD_ASROCK_E350M1
+ bool "ASRock E350M1"
+ select BUILD_XMMSTACK
+
config BOARD_ASROCK_939A785GMH
bool "ASRock 939A785GMH"
select BUILD_XMMSTACK
@@ -163,10 +167,12 @@ config BOARD_INIT
default "intel_d845gbv2.c" if BOARD_INTEL_D845GBV2
default "asrock_775i65g.c" if BOARD_ASROCK_775I65G
default "commell_lv_672.c" if BOARD_COMMELL_LV_672
+ default "asrock_e350m1.c" if BOARD_ASROCK_E350M1
config SOUTHBRIDGE_INIT
string
default "southbridge/intel-ich7.c" if BOARD_KONTRON_986LCD_M
+ default "southbridge/amd-sbxxx.c" if BOARD_ASROCK_E350M1
default "southbridge/amd-sbxxx.c" if BOARD_ASUS_F2A85_M
config SUPERIO_INIT
diff --git a/SerialICE/mainboard/asrock_e350m1.c b/SerialICE/mainboard/asrock_e350m1.c
new file mode 100644
index 0000000..d3b9087
--- /dev/null
+++ b/SerialICE/mainboard/asrock_e350m1.c
@@ -0,0 +1,50 @@
+/*
+ * SerialICE
+ *
+ * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de>
+ * Copyright (C) 2013 Paul Menzel <paulepanter(a)users.sourceforge.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+const char boardname[33]="ASRock E350M1 ";
+
+#define SUPERIO_CONFIG_PORT 0x2e
+
+static void superio_init(void)
+{
+ u8 byte;
+ pnp_enter_ext_func_mode_ite(SUPERIO_CONFIG_PORT);
+
+ /* Disable the watchdog. */
+ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 7);
+ pnp_write_register(SUPERIO_CONFIG_PORT, 0x72, 0x00);
+
+ /* Enable the serial port. */
+ pnp_set_logical_device(SUPERIO_CONFIG_PORT, 1); /* COM1 */
+ pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+ pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+ pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+ pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+
+ pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT);
+}
+
+
+static void chipset_init(void)
+{
+ southbridge_init();
+ sbxxx_enable_48mhzout();
+ superio_init();
+}
the following patch was just integrated into master:
commit 0729fccede01ca6738d368ac92de447687d00a99
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Fri Jun 21 10:18:21 2013 +0200
Kconfig: Uniformly use the official spelling »ASRock«
Change-Id: Iff9449f4b722838c842e92e73147871a94efb766
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3509
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
See http://review.coreboot.org/3509 for details.
-gerrit
the following patch was just integrated into master:
commit 8b343b88ee8328cb0c4ae32068f5980d0cfc76c1
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Thu May 23 13:39:43 2013 -0500
EPIA-M850: Disable auto-reboot
The VX900 chipset on this board has a watchdog-like mechanism. This
reboots the board four seconds after it is powered on. It will not reboot
it a second time, but is still annoying when debugging.
Disable the timer that causes the reset. This prevents the board from
resetting 4 seconds after power on.
Change-Id: Ib604634ef4b33ddd3f552676ef5df7c4d142ead0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Reviewed-on: http://review.coreboot.org/3278
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
See http://review.coreboot.org/3278 for details.
-gerrit
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3278
-gerrit
commit f784e200b275f7a95d9da535a22c304b2c629b9c
Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
Date: Thu May 23 13:39:43 2013 -0500
EPIA-M850: Disable auto-reboot
The VX900 chipset on this board has a watchdog-like mechanism. This
reboots the board four seconds after it is powered on. It will not reboot
it a second time, but is still annoying when debugging.
Disable the timer that causes the reset. This prevents the board from
resetting 4 seconds after power on.
Change-Id: Ib604634ef4b33ddd3f552676ef5df7c4d142ead0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com>
---
SerialICE/mainboard/via_epia_m850.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/SerialICE/mainboard/via_epia_m850.c b/SerialICE/mainboard/via_epia_m850.c
index 6d041bd..fdf3990 100644
--- a/SerialICE/mainboard/via_epia_m850.c
+++ b/SerialICE/mainboard/via_epia_m850.c
@@ -17,10 +17,12 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-const char boardname[33]="VIA EPIA M-850 ";
+const char boardname[33] = "VIA EPIA M-850 ";
#define SUPERIO_CONFIG_PORT 0x2e
+#define LPC(x) PCI_ADDR(0, 0x11, 0, x)
+
static inline void pnp_enter_conf_state(u16 port)
{
outb(0x87, port);
@@ -32,8 +34,17 @@ static inline void pnp_exit_conf_state(u16 port)
outb(0xaa, port);
}
+static inline void vx900_disable_auto_reboot(void)
+{
+ /* Disable the GP3 timer, which is the root of all evil */
+ pci_write_config8(LPC(0x98), 0);
+ /* Yep, that's all it takes */
+}
+
static void superio_init(void)
{
+ vx900_disable_auto_reboot();
+
pnp_enter_conf_state(SUPERIO_CONFIG_PORT);
pnp_set_logical_device(SUPERIO_CONFIG_PORT, 0);
pnp_set_enable(SUPERIO_CONFIG_PORT, 0);