SerialICE February 2013

serialice@serialice.com

1 participants
29 discussions

Patch merged into serialice/master: 2b6ba6c Add Intel i915 filters
by gerrit＠coreboot.org 23 Feb '13

23 Feb '13

the following patch was just integrated into master: commit 2b6ba6cf289eb585182a09faca0e7668660b473b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 19 23:55:57 2013 +0200 Add Intel i915 filters Decodes some documented BARs on Intel 915G. Change-Id: I86c5588b2c2092d3aa42668b2e0ca8d0e7e82a09 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2475 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Fri Feb 22 09:14:10 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Feb 23 01:06:43 2013, giving +2 See http://review.coreboot.org/2475 for details. -gerrit

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New patch to review for serialice: 32ae29f Fix some Intel ICH7 filters
by Kyösti Mälkki 22 Feb '13

22 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2486 -gerrit commit 32ae29f147629b3457c1270f63c72548b82cc6e1 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 22 20:10:08 2013 +0200 Fix some Intel ICH7 filters The enable bits to route serial COM port ranges to LPC are a byte register 0x82. Remove incorrect AC'97 device mappings. Change-Id: If7b89838d94d953ac19d97d5573bc866bb71d2ba Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/i82801.lua | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/SerialICE/simba/i82801.lua b/SerialICE/simba/i82801.lua index ddc9a6e..f276c51 100644 --- a/SerialICE/simba/i82801.lua +++ b/SerialICE/simba/i82801.lua @@ -162,7 +162,7 @@ end function enable_gx_lpc_bars() pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) - pci_cfg16_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) pci_cfg32_hook(dev_power, 0x84, "LPC", lpc_io_bar) pci_cfg32_hook(dev_power, 0x88, "LPC", lpc_io_bar) @@ -176,8 +176,6 @@ function enable_hook_i82801gx() enable_smbus_host_bar() enable_gx_power_bars() enable_gx_lpc_bars() - enable_audio_bars() - enable_modem_bars() end

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Patch set updated for serialice: dd557e0 Add Commell LV-672
by Kyösti Mälkki 22 Feb '13

22 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2478 -gerrit commit dd557e02c9232444d7b22f0c7683f150daced321 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 19 23:50:10 2013 +0200 Add Commell LV-672 Change-Id: I56a2eb48a53c20a055670cab06683a938ec18d5a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/Kconfig | 4 ++ SerialICE/mainboard/commell_lv_672.c | 72 ++++++++++++++++++++++++++++++++++++ SerialICE/simba/commell_lv_672.lua | 58 +++++++++++++++++++++++++++++ 3 files changed, 134 insertions(+) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 57c8af3..3d5fa9c 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -121,6 +121,9 @@ config BOARD_INTEL_D845GBV2 config BOARD_ASROCK_775I65G bool "ASRock 775i65G" +config BOARD_COMMELL_LV_672 + bool "Commell LV-672" + endchoice config BOARD_INIT @@ -153,6 +156,7 @@ config BOARD_INIT default "via_epia_m850.c" if BOARD_VIA_EPIA_M850 default "intel_d845gbv2.c" if BOARD_INTEL_D845GBV2 default "asrock_775i65g.c" if BOARD_ASROCK_775I65G + default "commell_lv_672.c" if BOARD_COMMELL_LV_672 config SOUTHBRIDGE_INIT string diff --git a/SerialICE/mainboard/commell_lv_672.c b/SerialICE/mainboard/commell_lv_672.c new file mode 100644 index 0000000..8f81e8e --- /dev/null +++ b/SerialICE/mainboard/commell_lv_672.c @@ -0,0 +1,72 @@ +/* + * SerialICE + * + * Copyright (C) 2013 Kyösti Mälkki <kyosti.malkki(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="Commell LV-672 "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void southbridge_init(void) +{ + u16 reg16; + + /* Disable watchdog */ +#define PMBASE 0x500 +#define TCOBASE (PMBASE + 0x60) + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0x40), PMBASE | 1); + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x44), 0x80); + reg16 = inw(TCOBASE + 0x08); + reg16 |= (1 << 11); + outw(reg16, TCOBASE + 0x08); + outw(0x0008, TCOBASE + 0x04); + outw(0x0002, TCOBASE + 0x06); + + /* Select COM1 COM2 I/O ranges. */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x80), 0x10); + + /* Enable COM1, COM2, KBD, SIO config registers 0x2e. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x82), 0x1403); + + /* Enable Serial IRQ */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x64), 0xd0); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Settings for Winbond W83627THF/THG */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 0); + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc2); /* Select oscillator */ + + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} + diff --git a/SerialICE/simba/commell_lv_672.lua b/SerialICE/simba/commell_lv_672.lua new file mode 100644 index 0000000..9ebf6ea --- /dev/null +++ b/SerialICE/simba/commell_lv_672.lua @@ -0,0 +1,58 @@ + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801.lua") +dofile("intel_bars.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end

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Patch set updated for serialice: 34b35c4 Add some Intel ICH6 filters
by Kyösti Mälkki 22 Feb '13

22 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2476 -gerrit commit 34b35c4261d89c22f2b463a36d30d7a720a17fb7 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 20 00:08:20 2013 +0200 Add some Intel ICH6 filters Only the most useful BARs added. Change-Id: I4f3b87f939849fe814045604fee9bc392159aa21 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/i82801.lua | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/SerialICE/simba/i82801.lua b/SerialICE/simba/i82801.lua index f06088d..ddc9a6e 100644 --- a/SerialICE/simba/i82801.lua +++ b/SerialICE/simba/i82801.lua @@ -116,6 +116,31 @@ end -- ********************************************************** -- +-- i82801fx + +function enable_fx_power_bars() + pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) + add_io_bar(dev_power, 0x48, "GPIO", 0x40) +end + +function enable_fx_lpc_bars() + add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) + + pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + + add_io_bar(dev_power, 0x84, "LPC1", 0x80) + add_io_bar(dev_power, 0x88, "LPC2", 0x40) +end + +function enable_hook_i82801fx() + enable_smbus_host_bar() + enable_fx_power_bars() + enable_fx_lpc_bars() +end + +-- ********************************************************** +-- -- i82801gx -- ICH7 TPM

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Patch set updated for serialice: f39ca5e Add MSI MS-7133
by Kyösti Mälkki 22 Feb '13

22 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2477 -gerrit commit f39ca5e027c8e3d968ea3359c9187817de149853 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Nov 10 18:59:43 2012 +0200 Add MSI MS-7133 Change-Id: I05f50ef3867d2ef0b9ad77d5afd9f49ca5856a77 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/Kconfig | 4 +++ SerialICE/mainboard/msi_ms7133.c | 75 ++++++++++++++++++++++++++++++++++++++++ SerialICE/simba/msi_ms7133.lua | 70 +++++++++++++++++++++++++++++++++++++ 3 files changed, 149 insertions(+) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 32e2895..57c8af3 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -70,6 +70,9 @@ config BOARD_ASROCK_939A785GMH config BOARD_MSI_MS6178 bool "MSI MS6178" +config BOARD_MSI_MS7133 + bool "MSI MS-7133" + config BOARD_RCA_RM4100 bool "RCA RM4100" @@ -132,6 +135,7 @@ config BOARD_INIT default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE default "asus_k8v-x.c" if BOARD_ASUS_K8V_X default "msi_ms6178.c" if BOARD_MSI_MS6178 + default "msi_ms7133.c" if BOARD_MSI_MS7133 default "rca_rm4100.c" if BOARD_RCA_RM4100 default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 default "asus_p2b.c" if BOARD_ASUS_P2B diff --git a/SerialICE/mainboard/msi_ms7133.c b/SerialICE/mainboard/msi_ms7133.c new file mode 100644 index 0000000..fc7e753 --- /dev/null +++ b/SerialICE/mainboard/msi_ms7133.c @@ -0,0 +1,75 @@ +/* + * SerialICE + * + * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2013 Kyösti Mälkki <kyosti.malkki(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="MSI MS7133 "; + +#define PMBASE 0x40 +#define COM_DEC 0x80 +#define LPC_EN 0x82 + +#define PMBASE_ADDR 0x500 +#define TCOBASE (PMBASE + 0x60) +#define TCO1_STS (TCOBASE + 0x04) +#define TCO2_STS (TCOBASE + 0x06) +#define TCO1_CNT (TCOBASE + 0x08) + +#define SUPERIO_CONFIG_PORT 0x4e + +static void southbridge_init(void) +{ + u16 reg16; + + /* Disable watchdog. */ + pci_write_config32(PCI_ADDR(0, 0x1f, 0, PMBASE), PMBASE_ADDR | 1); + reg16 = inw(TCO1_CNT); + reg16 |= (1 << 11); /* Halt TCO timer. */ + outw(reg16, TCO1_CNT); + outw(0x0008, TCO1_STS); /* Clear timeout status. */ + outw(0x0002, TCO2_STS); /* Clear second timeout status. */ + + /* Set COM1/COM2 decode range. */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, COM_DEC), 0x10); + + /* Enable COM1, COM2, and Super I/O config registers 0x2e/0x4e. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, LPC_EN), 0x3003); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Set CLKSEL=1 to select 48 MHz (otherwise serial won't work). */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc6); + + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} diff --git a/SerialICE/simba/msi_ms7133.lua b/SerialICE/simba/msi_ms7133.lua new file mode 100644 index 0000000..41bd7bf --- /dev/null +++ b/SerialICE/simba/msi_ms7133.lua @@ -0,0 +1,70 @@ + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801.lua") +dofile("intel_bars.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end

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New patch to review for serialice: 49cc13a Add Commell LV-672
by Kyösti Mälkki 21 Feb '13

21 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2478 -gerrit commit 49cc13a132e96af1ab9d3a7632a1e11bb61538e1 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 19 23:50:10 2013 +0200 Add Commell LV-672 Change-Id: I56a2eb48a53c20a055670cab06683a938ec18d5a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/Kconfig | 4 ++ SerialICE/mainboard/commell_lv_672.c | 72 ++++++++++++++++++++++++++++++++++++ SerialICE/simba/commell_lv_672.lua | 60 ++++++++++++++++++++++++++++++ 3 files changed, 136 insertions(+) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 57c8af3..3d5fa9c 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -121,6 +121,9 @@ config BOARD_INTEL_D845GBV2 config BOARD_ASROCK_775I65G bool "ASRock 775i65G" +config BOARD_COMMELL_LV_672 + bool "Commell LV-672" + endchoice config BOARD_INIT @@ -153,6 +156,7 @@ config BOARD_INIT default "via_epia_m850.c" if BOARD_VIA_EPIA_M850 default "intel_d845gbv2.c" if BOARD_INTEL_D845GBV2 default "asrock_775i65g.c" if BOARD_ASROCK_775I65G + default "commell_lv_672.c" if BOARD_COMMELL_LV_672 config SOUTHBRIDGE_INIT string diff --git a/SerialICE/mainboard/commell_lv_672.c b/SerialICE/mainboard/commell_lv_672.c new file mode 100644 index 0000000..c88b9f2 --- /dev/null +++ b/SerialICE/mainboard/commell_lv_672.c @@ -0,0 +1,72 @@ +/* + * SerialICE + * + * Copyright (C) 2013 Kyösti Mälkki <kyosti.malkki(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="Commell LV-672 "; + +#define SUPERIO_CONFIG_PORT 0x2e + +/* Hardware specific functions */ +static void southbridge_init(void) +{ + u16 reg16; + + /* Disable watchdog */ +#define PMBASE 0x500 +#define TCOBASE (PMBASE + 0x60) + pci_write_config32(PCI_ADDR(0, 0x1f, 0, 0x40), PMBASE | 1); + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x44), 0x80); + reg16 = inw(TCOBASE + 0x08); + reg16 |= (1 << 11); + outw(reg16, TCOBASE + 0x08); + outw(0x0008, TCOBASE + 0x04); + outw(0x0002, TCOBASE + 0x06); + + /* Select COM1 COM2 I/O ranges. */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x80), 0x10); + + /* Enable COM1, COM2, KBD, SIO config registers 0x2e. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0x82), 0x1403); + + /* Enable Serial IRQ */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0x64), 0xd0); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Settings for Winbond W83627THF/THG */ + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 0); + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc2); /* Select oscillator */ + + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} + diff --git a/SerialICE/simba/commell_lv_672.lua b/SerialICE/simba/commell_lv_672.lua new file mode 100644 index 0000000..62f7c2a --- /dev/null +++ b/SerialICE/simba/commell_lv_672.lua @@ -0,0 +1,60 @@ + + +function mainboard_io_read(f, action) + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801.lua") +dofile("intel_bars.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end

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New patch to review for serialice: 9f189c4 Add MSI MS-7133
by Kyösti Mälkki 21 Feb '13

21 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2477 -gerrit commit 9f189c46b3cbcfd1772837cec4908f4b99053370 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Nov 10 18:59:43 2012 +0200 Add MSI MS-7133 Change-Id: I05f50ef3867d2ef0b9ad77d5afd9f49ca5856a77 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/Kconfig | 4 ++ SerialICE/mainboard/msi_ms7133.c | 74 ++++++++++++++++++++++++++++++++++ SerialICE/simba/msi_ms7133.lua | 85 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 163 insertions(+) diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig index 32e2895..57c8af3 100644 --- a/SerialICE/Kconfig +++ b/SerialICE/Kconfig @@ -70,6 +70,9 @@ config BOARD_ASROCK_939A785GMH config BOARD_MSI_MS6178 bool "MSI MS6178" +config BOARD_MSI_MS7133 + bool "MSI MS-7133" + config BOARD_RCA_RM4100 bool "RCA RM4100" @@ -132,6 +135,7 @@ config BOARD_INIT default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE default "asus_k8v-x.c" if BOARD_ASUS_K8V_X default "msi_ms6178.c" if BOARD_MSI_MS6178 + default "msi_ms7133.c" if BOARD_MSI_MS7133 default "rca_rm4100.c" if BOARD_RCA_RM4100 default "thomson_ip1000.c" if BOARD_THOMSON_IP1000 default "asus_p2b.c" if BOARD_ASUS_P2B diff --git a/SerialICE/mainboard/msi_ms7133.c b/SerialICE/mainboard/msi_ms7133.c new file mode 100644 index 0000000..8948efb --- /dev/null +++ b/SerialICE/mainboard/msi_ms7133.c @@ -0,0 +1,74 @@ +/* + * SerialICE + * + * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +const char boardname[33]="MSI MS7133 "; + +#define PMBASE 0x40 +#define COM_DEC 0x80 +#define LPC_EN 0x82 + +#define PMBASE_ADDR 0x500 +#define TCOBASE (PMBASE + 0x60) +#define TCO1_STS (TCOBASE + 0x04) +#define TCO2_STS (TCOBASE + 0x06) +#define TCO1_CNT (TCOBASE + 0x08) + +#define SUPERIO_CONFIG_PORT 0x4e + +static void southbridge_init(void) +{ + u16 reg16; + + /* Disable watchdog. */ + pci_write_config32(PCI_ADDR(0, 0x1f, 0, PMBASE), PMBASE_ADDR | 1); + reg16 = inw(TCO1_CNT); + reg16 |= (1 << 11); /* Halt TCO timer. */ + outw(reg16, TCO1_CNT); + outw(0x0008, TCO1_STS); /* Clear timeout status. */ + outw(0x0002, TCO2_STS); /* Clear second timeout status. */ + + /* Set COM1/COM2 decode range. */ + pci_write_config8(PCI_ADDR(0, 0x1f, 0, COM_DEC), 0x10); + + /* Enable COM1, COM2, and Super I/O config registers 0x2e/0x4e. */ + pci_write_config16(PCI_ADDR(0, 0x1f, 0, LPC_EN), 0x3003); +} + +static void superio_init(void) +{ + pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT); + + /* Set CLKSEL=1 to select 48 MHz (otherwise serial won't work). */ + pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc6); + + pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */ + pnp_set_enable(SUPERIO_CONFIG_PORT, 0); + pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8); + pnp_set_irq0(SUPERIO_CONFIG_PORT, 4); + pnp_set_enable(SUPERIO_CONFIG_PORT, 1); + + pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT); +} + +static void chipset_init(void) +{ + southbridge_init(); + superio_init(); +} diff --git a/SerialICE/simba/msi_ms7133.lua b/SerialICE/simba/msi_ms7133.lua new file mode 100644 index 0000000..2b2e384 --- /dev/null +++ b/SerialICE/simba/msi_ms7133.lua @@ -0,0 +1,85 @@ + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801.lua") +dofile("intel_bars.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801fx() + northbridge_i915() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end

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New patch to review for serialice: 42f4386 Add some Intel ICH6 filters
by Kyösti Mälkki 21 Feb '13

21 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2476 -gerrit commit 42f43867255b142362c559d355cbd4d4f309c03c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 20 00:08:20 2013 +0200 Add some Intel ICH6 filters Only the most useful BARs added. Change-Id: I4f3b87f939849fe814045604fee9bc392159aa21 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/i82801.lua | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/SerialICE/simba/i82801.lua b/SerialICE/simba/i82801.lua index f06088d..0fe1523 100644 --- a/SerialICE/simba/i82801.lua +++ b/SerialICE/simba/i82801.lua @@ -116,6 +116,32 @@ end -- ********************************************************** -- +-- i82801fx + +function enable_fx_power_bars() + pci_cfg16_hook(dev_power, 0x40, "PM", pm_io_bar) + add_io_bar(dev_power, 0x48, "GPIO", 0x40) +end + +function enable_fx_lpc_bars() + add_mem_bar(dev_power, 0xf0, "RCBA", 0x4000) + + pci_cfg8_hook(dev_power, 0x80, "LPC", lpc_protect_serial_port) + pci_cfg8_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + --pci_cfg16_hook(dev_power, 0x82, "LPC", lpc_protect_serial_port) + + add_io_bar(dev_power, 0x84, "LPC1", 0x80) + add_io_bar(dev_power, 0x88, "LPC2", 0x40) +end + +function enable_hook_i82801fx() + enable_smbus_host_bar() + enable_fx_power_bars() + enable_fx_lpc_bars() +end + +-- ********************************************************** +-- -- i82801gx -- ICH7 TPM

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New patch to review for serialice: 0947680 Add Intel i915 filters
by Kyösti Mälkki 21 Feb '13

21 Feb '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2475 -gerrit commit 094768008a80f1b24acdf1d8bdcd9c63237f426d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 19 23:55:57 2013 +0200 Add Intel i915 filters Decodes some documented BARs on Intel 915G. Change-Id: I86c5588b2c2092d3aa42668b2e0ca8d0e7e82a09 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/intel_bars.lua | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/SerialICE/simba/intel_bars.lua b/SerialICE/simba/intel_bars.lua index 15607fd..1e42cac 100644 --- a/SerialICE/simba/intel_bars.lua +++ b/SerialICE/simba/intel_bars.lua @@ -12,6 +12,35 @@ function northbridge_e7505() add_mem_bar(dev_e7505_mch, 0x14, "RCOMP", 0x1000) end + +-- ********************************************************** +-- Intel 82915 PCIe BAR + +dev_i915 = { + pci_dev = pci_bdf(0,0,0,0), + name = "i915", + bar = {}, +} + +function i915_pcie_bar(f, action) + local baseaddr = bit32.band(action.data, 0xf0000000) + local size = 256*1024*1024 + + -- enable is 0:00.0 [054] .31 + if true then + pcie_mm_enable(f.dev, f.reg, baseaddr, size) + else + pcie_mm_disable(f.dev, f.reg, baseaddr, size) + end +end + +function northbridge_i915() + add_mem_bar(dev_i915, 0x40, "EPBAR", 4*1024) + add_mem_bar(dev_i915, 0x44, "MCHBAR", 16*1024) + add_mem_bar(dev_i915, 0x4c, "DMIBAR", 4*1024) + pci_cfg32_hook(dev_i915, 0x48, "PCI", i915_pcie_bar) +end + -- ********************************************************** -- Intel 82945 PCIe BAR

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SerialICE February 2013