SerialICE August 2012

serialice@serialice.com

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30 discussions

New patch to review for serialice: ca33e70 SerialICE: Unify IO and memory handling
by Kyösti Mälkki 20 Aug '12

20 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1464 -gerrit commit ca33e70a15ec8a291fda10335044c2bd63f95870 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Aug 19 21:26:21 2012 +0300 SerialICE: Unify IO and memory handling There are no separate handlers for 8/16/32 bit memory access, make IO access work in similar fashion. Change-Id: I0407240a4495fbf723272b48b23e3863a97e7d1e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/serialice.c | 142 +++++++++--------------------------- qemu-0.15.x/serialice.h | 9 +-- qemu-0.15.x/target-i386/op_helper.c | 12 +-- 3 files changed, 42 insertions(+), 121 deletions(-) diff --git a/qemu-0.15.x/serialice.c b/qemu-0.15.x/serialice.c index 1e677bf..aaf69b0 100644 --- a/qemu-0.15.x/serialice.c +++ b/qemu-0.15.x/serialice.c @@ -105,114 +105,6 @@ static void serialice_screen(void) // ************************************************************************** // high level communication with the SerialICE shell -uint8_t serialice_inb(uint16_t port) -{ - uint8_t ret; - uint32_t data; - int filtered; - - filtered = serialice_io_read_filter(&data, port, 1); - - if (filtered) { - ret = data & 0xff; - } else { - return serialice_io_read_wrapper(port, 1); - } - - serialice_log(LOG_READ | LOG_IO, ret, port, 1); - - return ret; -} - -uint16_t serialice_inw(uint16_t port) -{ - uint16_t ret; - uint32_t data; - int filtered; - - filtered = serialice_io_read_filter(&data, port, 2); - - if (filtered) { - ret = data & 0xffff; - } else { - return serialice_io_read_wrapper(port, 2); - } - - serialice_log(LOG_READ | LOG_IO, ret, port, 2); - - return ret; -} - -uint32_t serialice_inl(uint16_t port) -{ - uint32_t ret; - uint32_t data; - int filtered; - - filtered = serialice_io_read_filter(&data, port, 4); - - if (filtered) { - ret = data; - } else { - return serialice_io_read_wrapper(port, 4); - } - - serialice_log(LOG_READ | LOG_IO, ret, port, 4); - - return ret; -} - -void serialice_outb(uint8_t data, uint16_t port) -{ - uint32_t filtered_data = (uint32_t) data; - int filtered; - - filtered = serialice_io_write_filter(&filtered_data, port, 1); - - if (filtered) { - data = (uint8_t) filtered_data; - } else { - data = (uint8_t) filtered_data; - serialice_io_write_wrapper(port, 1, data); - } - - serialice_log(LOG_WRITE | LOG_IO, data, port, 1); -} - -void serialice_outw(uint16_t data, uint16_t port) -{ - uint32_t filtered_data = (uint32_t) data; - int filtered; - - filtered = serialice_io_write_filter(&filtered_data, port, 2); - - if (filtered) { - data = (uint16_t) filtered_data; - } else { - data = (uint16_t) filtered_data; - serialice_io_write_wrapper(port, 2, data); - } - - serialice_log(LOG_WRITE | LOG_IO, data, port, 2); -} - -void serialice_outl(uint32_t data, uint16_t port) -{ - uint32_t filtered_data = data; - int filtered; - - filtered = serialice_io_write_filter(&filtered_data, port, 4); - - if (filtered) { - data = filtered_data; - } else { - data = filtered_data; - serialice_io_write_wrapper(port, 4, data); - } - - serialice_log(LOG_WRITE | LOG_IO, data, port, 4); -} - uint64_t serialice_rdmsr(uint32_t addr, uint32_t key) { uint32_t hi, lo; @@ -346,6 +238,40 @@ int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size) return (write_to_qemu == 0); } +#define mask_data(val,bytes) (val & (((uint64_t)1<<(bytes*8))-1)) + +uint32_t serialice_io_read(uint16_t port, unsigned int size) +{ + uint32_t data = 0; + int filtered; + + filtered = serialice_io_read_filter(&data, port, size); + if (!filtered) { + return serialice_io_read_wrapper(port, size); + } + + data = mask_data(data, size); + serialice_log(LOG_READ | LOG_IO, data, port, size); + return data; +} + +void serialice_io_write(uint16_t port, unsigned int size, uint32 data) +{ + uint32_t filtered_data = mask_data(data, size); + int filtered; + + filtered = serialice_io_write_filter(&filtered_data, port, size); + + if (filtered) { + data = mask_data(filtered_data, size); + } else { + data = mask_data(filtered_data, size); + serialice_io_write_wrapper(port, size, data); + } + + serialice_log(LOG_WRITE | LOG_IO, data, port, size); +} + // ************************************************************************** // initialization and exit diff --git a/qemu-0.15.x/serialice.h b/qemu-0.15.x/serialice.h index 27e9eb5..e9558f8 100644 --- a/qemu-0.15.x/serialice.h +++ b/qemu-0.15.x/serialice.h @@ -61,13 +61,8 @@ void serialice_command(const char *command, int reply_len); void serialice_get_version(void); void serialice_get_mainboard(void); -uint8_t serialice_inb(uint16_t port); -uint16_t serialice_inw(uint16_t port); -uint32_t serialice_inl(uint16_t port); - -void serialice_outb(uint8_t data, uint16_t port); -void serialice_outw(uint16_t data, uint16_t port); -void serialice_outl(uint32_t data, uint16_t port); +uint32_t serialice_io_read(uint16_t port, unsigned int size); +void serialice_io_write(uint16_t port, unsigned int size, uint32_t data); uint64_t serialice_rdmsr(uint32_t addr, uint32_t key); void serialice_wrmsr(uint64_t data, uint32_t addr, uint32_t key); diff --git a/qemu-0.15.x/target-i386/op_helper.c b/qemu-0.15.x/target-i386/op_helper.c index 2f6b8b3..1823c74 100644 --- a/qemu-0.15.x/target-i386/op_helper.c +++ b/qemu-0.15.x/target-i386/op_helper.c @@ -559,7 +559,7 @@ void helper_outb(uint32_t port, uint32_t data) { #ifdef CONFIG_SERIALICE if (serialice_active) { - serialice_outb(data & 0xff, port); + serialice_io_write(port, 1, data); return; } #endif @@ -570,7 +570,7 @@ target_ulong helper_inb(uint32_t port) { #ifdef CONFIG_SERIALICE if (serialice_active) { - return (target_ulong) serialice_inb(port); + return (target_ulong) serialice_io_read(port, 1); } #endif return cpu_inb(port); @@ -580,7 +580,7 @@ void helper_outw(uint32_t port, uint32_t data) { #ifdef CONFIG_SERIALICE if (serialice_active) { - serialice_outw(data & 0xffff, port); + serialice_io_write(port, 2, data); return; } #endif @@ -591,7 +591,7 @@ target_ulong helper_inw(uint32_t port) { #ifdef CONFIG_SERIALICE if (serialice_active) { - return (target_ulong) serialice_inw(port); + return (target_ulong) serialice_io_read(port, 2); } #endif return cpu_inw(port); @@ -601,7 +601,7 @@ void helper_outl(uint32_t port, uint32_t data) { #ifdef CONFIG_SERIALICE if (serialice_active) { - serialice_outl(data & 0xffffffff, port); + serialice_io_write(port, 4, data); return; } #endif @@ -612,7 +612,7 @@ target_ulong helper_inl(uint32_t port) { #ifdef CONFIG_SERIALICE if (serialice_active) { - return (target_ulong) serialice_inl(port); + return (target_ulong) serialice_io_read(port, 4); } #endif return cpu_inl(port);

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New patch to review for serialice: 22bc2b1 SerialICE: Export MSRs for filter
by Kyösti Mälkki 19 Aug '12

19 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1459 -gerrit commit 22bc2b1ca3468cf6469be778880815517833c131 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Aug 18 12:52:24 2012 +0300 SerialICE: Export MSRs for filter Required so that filter can access QEMU CPU's MSRs. Change-Id: I01a9f4725b5f037d0d9fb51b1f53ff50ef232662 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/target-i386/cpu.h | 2 + qemu-0.15.x/target-i386/op_helper.c | 94 ++++++++++++++++++++----------------- 2 files changed, 52 insertions(+), 44 deletions(-) diff --git a/qemu-0.15.x/target-i386/cpu.h b/qemu-0.15.x/target-i386/cpu.h index 0a62e18..86d9e3b 100644 --- a/qemu-0.15.x/target-i386/cpu.h +++ b/qemu-0.15.x/target-i386/cpu.h @@ -1055,6 +1055,8 @@ void do_smm_enter(CPUState *env1); void svm_check_intercept(CPUState *env1, uint32_t type); +void cpu_wrmsr(uint64_t val, uint32_t addr); +uint64_t cpu_rdmsr(uint32_t addr); cpuid_regs_t cpu_cpuid(uint32_t in_eax, uint32_t in_ecx); uint32_t cpu_cc_compute_all(CPUState *env1, int op); diff --git a/qemu-0.15.x/target-i386/op_helper.c b/qemu-0.15.x/target-i386/op_helper.c index bbb5ef4..2f6b8b3 100644 --- a/qemu-0.15.x/target-i386/op_helper.c +++ b/qemu-0.15.x/target-i386/op_helper.c @@ -3093,22 +3093,10 @@ void helper_rdmsr(void) { } #else -void helper_wrmsr(void) -{ - uint64_t val; - - helper_svm_check_intercept_param(SVM_EXIT_MSR, 1); - - val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); - -#ifdef CONFIG_SERIALICE - if (serialice_active) { - serialice_wrmsr(val, (uint32_t) ECX, (uint32_t) EDI); - return; - } -#endif - switch((uint32_t)ECX) { +void cpu_wrmsr(uint64_t val, uint32_t addr) +{ + switch(addr) { case MSR_IA32_SYSENTER_CS: env->sysenter_cs = val & 0xffff; break; @@ -3178,7 +3166,7 @@ void helper_wrmsr(void) case MSR_MTRRphysBase(5): case MSR_MTRRphysBase(6): case MSR_MTRRphysBase(7): - env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base = val; + env->mtrr_var[(addr - MSR_MTRRphysBase(0)) / 2].base = val; break; case MSR_MTRRphysMask(0): case MSR_MTRRphysMask(1): @@ -3188,14 +3176,14 @@ void helper_wrmsr(void) case MSR_MTRRphysMask(5): case MSR_MTRRphysMask(6): case MSR_MTRRphysMask(7): - env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask = val; + env->mtrr_var[(addr - MSR_MTRRphysMask(0)) / 2].mask = val; break; case MSR_MTRRfix64K_00000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix64K_00000] = val; + env->mtrr_fixed[addr - MSR_MTRRfix64K_00000] = val; break; case MSR_MTRRfix16K_80000: case MSR_MTRRfix16K_A0000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1] = val; + env->mtrr_fixed[addr - MSR_MTRRfix16K_80000 + 1] = val; break; case MSR_MTRRfix4K_C0000: case MSR_MTRRfix4K_C8000: @@ -3205,7 +3193,7 @@ void helper_wrmsr(void) case MSR_MTRRfix4K_E8000: case MSR_MTRRfix4K_F0000: case MSR_MTRRfix4K_F8000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3] = val; + env->mtrr_fixed[addr - MSR_MTRRfix4K_C0000 + 3] = val; break; case MSR_MTRRdefType: env->mtrr_deftype = val; @@ -3222,9 +3210,9 @@ void helper_wrmsr(void) env->tsc_aux = val; break; default: - if ((uint32_t)ECX >= MSR_MC0_CTL - && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { - uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL; + if (addr >= MSR_MC0_CTL + && addr < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { + uint32_t offset = addr - MSR_MC0_CTL; if ((offset & 0x3) != 0 || (val == 0 || val == ~(uint64_t)0)) env->mce_banks[offset] = val; @@ -3235,22 +3223,11 @@ void helper_wrmsr(void) } } -void helper_rdmsr(void) +uint64_t cpu_rdmsr(uint32_t addr) { uint64_t val; - helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); - -#ifdef CONFIG_SERIALICE - if (serialice_active) { - val = serialice_rdmsr((uint32_t) ECX, (uint32_t) EDI); - EAX = (uint32_t) (val); - EDX = (uint32_t) (val >> 32); - return; - } -#endif - - switch((uint32_t)ECX) { + switch(addr) { case MSR_IA32_SYSENTER_CS: val = env->sysenter_cs; break; @@ -3312,7 +3289,7 @@ void helper_rdmsr(void) case MSR_MTRRphysBase(5): case MSR_MTRRphysBase(6): case MSR_MTRRphysBase(7): - val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base; + val = env->mtrr_var[(addr - MSR_MTRRphysBase(0)) / 2].base; break; case MSR_MTRRphysMask(0): case MSR_MTRRphysMask(1): @@ -3322,14 +3299,14 @@ void helper_rdmsr(void) case MSR_MTRRphysMask(5): case MSR_MTRRphysMask(6): case MSR_MTRRphysMask(7): - val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask; + val = env->mtrr_var[(addr - MSR_MTRRphysMask(0)) / 2].mask; break; case MSR_MTRRfix64K_00000: val = env->mtrr_fixed[0]; break; case MSR_MTRRfix16K_80000: case MSR_MTRRfix16K_A0000: - val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1]; + val = env->mtrr_fixed[addr - MSR_MTRRfix16K_80000 + 1]; break; case MSR_MTRRfix4K_C0000: case MSR_MTRRfix4K_C8000: @@ -3339,7 +3316,7 @@ void helper_rdmsr(void) case MSR_MTRRfix4K_E8000: case MSR_MTRRfix4K_F0000: case MSR_MTRRfix4K_F8000: - val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3]; + val = env->mtrr_fixed[addr - MSR_MTRRfix4K_C0000 + 3]; break; case MSR_MTRRdefType: val = env->mtrr_deftype; @@ -3364,9 +3341,9 @@ void helper_rdmsr(void) val = env->mcg_status; break; default: - if ((uint32_t)ECX >= MSR_MC0_CTL - && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { - uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL; + if (addr >= MSR_MC0_CTL + && addr < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { + uint32_t offset = addr - MSR_MC0_CTL; val = env->mce_banks[offset]; break; } @@ -3374,10 +3351,39 @@ void helper_rdmsr(void) val = 0; break; } + return val; +} + +void helper_wrmsr(void) +{ + uint64_t val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); + helper_svm_check_intercept_param(SVM_EXIT_MSR, 1); +#ifdef CONFIG_SERIALICE + if (serialice_active) + serialice_wrmsr(val, (uint32_t)ECX, (uint32_t) EDI); + else + cpu_wrmsr(val, (uint32_t)ECX); +#else + cpu_wrmsr(val, (uint32_t)ECX); +#endif +} + +void helper_rdmsr(void) +{ + uint64_t val; + helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); +#ifdef CONFIG_SERIALICE + if (serialice_active) + val = serialice_rdmsr((uint32_t) ECX, (uint32_t) EDI); + else + val = cpu_rdmsr((uint32_t) ECX); +#else + val = cpu_rdmsr((uint32_t) ECX); +#endif EAX = (uint32_t)(val); EDX = (uint32_t)(val >> 32); } -#endif +#endif /* CONFIG_USER_ONLY */ target_ulong helper_lsl(target_ulong selector1) {

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New patch to review for serialice: 5eea24b SerialICE: Export CPUIDs for filter
by Kyösti Mälkki 19 Aug '12

19 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1458 -gerrit commit 5eea24b21720b9c8ace8bc9bf34ba99d821b4a39 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Aug 18 12:53:31 2012 +0300 SerialICE: Export CPUIDs for filter Required so that filter can access QEMU CPU's CPUID. Change-Id: I859fce6caf778fb32bbbe243b4b2f72ffbe02355 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/target-i386/cpu.h | 1 + qemu-0.15.x/target-i386/op_helper.c | 32 +++++++++++++++++--------------- 2 files changed, 18 insertions(+), 15 deletions(-) diff --git a/qemu-0.15.x/target-i386/cpu.h b/qemu-0.15.x/target-i386/cpu.h index 9819b5f..0a62e18 100644 --- a/qemu-0.15.x/target-i386/cpu.h +++ b/qemu-0.15.x/target-i386/cpu.h @@ -1055,6 +1055,7 @@ void do_smm_enter(CPUState *env1); void svm_check_intercept(CPUState *env1, uint32_t type); +cpuid_regs_t cpu_cpuid(uint32_t in_eax, uint32_t in_ecx); uint32_t cpu_cc_compute_all(CPUState *env1, int op); #endif /* CPU_I386_H */ diff --git a/qemu-0.15.x/target-i386/op_helper.c b/qemu-0.15.x/target-i386/op_helper.c index 81c8075..bbb5ef4 100644 --- a/qemu-0.15.x/target-i386/op_helper.c +++ b/qemu-0.15.x/target-i386/op_helper.c @@ -2010,29 +2010,31 @@ void helper_single_step(void) raise_exception(EXCP01_DB); } -void helper_cpuid(void) +cpuid_regs_t cpu_cpuid(uint32_t in_eax, uint32_t in_ecx) { - uint32_t eax, ebx, ecx, edx; + cpuid_regs_t ret; + cpu_x86_cpuid(env, in_eax, in_ecx, &ret.eax, &ret.ebx, &ret.ecx, &ret.edx); + return ret; +} +void helper_cpuid(void) +{ + cpuid_regs_t ret; helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0); #ifdef CONFIG_SERIALICE - if (serialice_active) { - cpuid_regs_t ret; + if (serialice_active) ret = serialice_cpuid((uint32_t) EAX, (uint32_t) ECX); - EAX = ret.eax; - EBX = ret.ebx; - ECX = ret.ecx; - EDX = ret.edx; - return; - } + else + ret = cpu_cpuid((uint32_t) EAX, (uint32_t) ECX); +#else + cpu_x86_cpuid(env, (uint32_t) EAX, (uint32_t) ECX, &ret.eax, &ret.ebx, &ret.ecx, &ret.edx); #endif - cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); - EAX = eax; - EBX = ebx; - ECX = ecx; - EDX = edx; + EAX = ret.eax; + EBX = ret.ebx; + ECX = ret.ecx; + EDX = ret.edx; } void helper_enter_level(int level, int data32, target_ulong t1)

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New patch to review for serialice: 072f1bb SerialICE: Minor cleanups
by Kyösti Mälkki 19 Aug '12

19 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1457 -gerrit commit 072f1bbbe4e8cc3fdcf7c3a7f68a1ff58935cca1 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Aug 18 16:28:51 2012 +0300 SerialICE: Minor cleanups Drop serial comm headers. Move VNC screen init. Fix unused exit function. Change-Id: Idc9b0d17e5d1bb3b2a88f93775653d9079cb2b46 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/serialice.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/qemu-0.15.x/serialice.c b/qemu-0.15.x/serialice.c index 2408d8b..1e677bf 100644 --- a/qemu-0.15.x/serialice.c +++ b/qemu-0.15.x/serialice.c @@ -32,14 +32,6 @@ #include <stdint.h> #include <unistd.h> #include <string.h> -#ifdef WIN32 -#include <windows.h> -#include <conio.h> -#else -#include <fcntl.h> -#include <termios.h> -#include <sys/ioctl.h> -#endif /* Local includes */ #include "hw/hw.h" @@ -103,6 +95,13 @@ static void serialice_invalidate(void *opaque) screen_invalid = 1; } +static void serialice_screen(void) +{ + ds = graphic_console_init(serialice_refresh, serialice_invalidate, + NULL, NULL, ds); + qemu_console_resize(ds, 320, 240); +} + // ************************************************************************** // high level communication with the SerialICE shell @@ -352,9 +351,7 @@ int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size) static void serialice_init(void) { - ds = graphic_console_init(serialice_refresh, serialice_invalidate, - NULL, NULL, ds); - qemu_console_resize(ds, 320, 240); + serialice_screen(); printf("SerialICE: Open connection to target hardware...\n"); serialice_serial_init(); @@ -371,9 +368,7 @@ static void serialice_init(void) static void serialice_exit(void) { serialice_lua_exit(); - qemu_free(s->command); - qemu_free(s->buffer); - qemu_free(s); + serialice_serial_exit(); } #endif

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New patch to review for serialice: ec67d21 Move SerialICE LUA filter support to separate file
by Kyösti Mälkki 17 Aug '12

17 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1456 -gerrit commit ec67d21540f1567bde5be08990184a80312710d1 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jul 8 21:21:44 2012 +0300 Move SerialICE LUA filter support to separate file Isolate the existing LUA filtering. It does not meet my requirements for the modular filtering scripts, I will try to implement both in the same build side-by-side to maintain compatibility. Change-Id: I1ef1e6c5ef89f403cfa2a4070a174aa97f464a4d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- qemu-0.15.x/Makefile | 2 + qemu-0.15.x/Makefile.target | 2 +- qemu-0.15.x/serialice-lua.c | 494 ++++++++++++++++++++++++++++++++++++++++++++ qemu-0.15.x/serialice.c | 467 ----------------------------------------- qemu-0.15.x/serialice.h | 30 +++ 5 files changed, 527 insertions(+), 468 deletions(-) diff --git a/qemu-0.15.x/Makefile b/qemu-0.15.x/Makefile index 0778994..09cb260 100644 --- a/qemu-0.15.x/Makefile +++ b/qemu-0.15.x/Makefile @@ -122,10 +122,12 @@ version.o: $(SRC_PATH)/version.rc config-host.mak ifdef CONFIG_SERIALICE serialice.o: serialice.c serialice.h serialice-com.o: serialice-com.c serialice.h +serialice-lua.o: serialice-lua.c serialice.h endif serialice.o: QEMU_CFLAGS += $(SERIALICE_CFLAGS) serialice-com.o: QEMU_CFLAGS += $(SERIALICE_CFLAGS) +serialice-lua.o: QEMU_CFLAGS += $(SERIALICE_CFLAGS) version-obj-$(CONFIG_WIN32) += version.o ###################################################################### diff --git a/qemu-0.15.x/Makefile.target b/qemu-0.15.x/Makefile.target index 9ae7a03..445949d 100644 --- a/qemu-0.15.x/Makefile.target +++ b/qemu-0.15.x/Makefile.target @@ -226,7 +226,7 @@ ifdef CONFIG_SERIALICE QEMU_CFLAGS += $(SERIALICE_CFLAGS) LIBS+=-lm endif -obj-$(CONFIG_SERIALICE) += serialice.o serialice-com.o +obj-$(CONFIG_SERIALICE) += serialice.o serialice-com.o serialice-lua.o # Hardware support obj-i386-y += vga.o diff --git a/qemu-0.15.x/serialice-lua.c b/qemu-0.15.x/serialice-lua.c new file mode 100644 index 0000000..417510b --- /dev/null +++ b/qemu-0.15.x/serialice-lua.c @@ -0,0 +1,494 @@ +/* + * Copyright (c) 2009 coresystems GmbH + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/* Indented with: + * gnuindent -npro -kr -i4 -nut -bap -sob -l80 -ss -ncs serialice.* + */ + +/* System includes */ +#include <stdlib.h> +#include <stdio.h> +#include <stdint.h> +#include <unistd.h> +#include <string.h> + +/* LUA includes */ +#include <lua.h> +#include <lauxlib.h> +#include <lualib.h> + +/* Local includes */ +#include "hw/hw.h" +#include "serialice.h" +#include "sysemu.h" + +static lua_State *L; + +extern const char *serialice_mainboard; +static const char *serialice_lua_script = "serialice.lua"; + +// ************************************************************************** +// LUA scripting interface and callbacks + +static int serialice_register_physical(lua_State * luastate) +{ + int n = lua_gettop(luastate); + static uint8_t num = 1; + uint32_t addr, size; + ram_addr_t phys; + char ram_name[16]; + + if (n != 2) { + fprintf(stderr, + "ERROR: Not called as SerialICE_register_physical(<addr> <size>)\n"); + return 0; + } + + addr = lua_tointeger(luastate, 1); + size = lua_tointeger(luastate, 2); + + if (num > 99) { + fprintf(stderr,"To much memory ranges registered\n"); + exit(1); + } + printf("Registering physical memory at 0x%08x (0x%08x bytes)\n", addr, size); + sprintf(ram_name, "serialice_ram%u", num); + phys = qemu_ram_alloc(NULL, ram_name, size); + cpu_register_physical_memory(addr, size, phys); + num++; + return 0; +} + +static int serialice_system_reset(lua_State * luastate) +{ + printf("Rebooting the emulated host CPU\n"); + qemu_system_reset_request(); + return 0; +} + +// ************************************************************************** +// LUA register access + +// some macros from target-i386/exec.h, which we can't include directly +#define env first_cpu +#define EAX (env->regs[R_EAX]) +#define ECX (env->regs[R_ECX]) +#define EDX (env->regs[R_EDX]) +#define EBX (env->regs[R_EBX]) +#define ESP (env->regs[R_ESP]) +#define EBP (env->regs[R_EBP]) +#define ESI (env->regs[R_ESI]) +#define EDI (env->regs[R_EDI]) +#define EIP (env->eip) +#define CS (env->segs[R_CS].base) +static int register_set(lua_State * L) +{ + const char *key = luaL_checkstring(L, 2); + int val = luaL_checkint(L, 3); + int ret = 1; + + if (strcmp(key, "eax") == 0) { + EAX = val; + } else if (strcmp(key, "ecx") == 0) { + ECX = val; + } else if (strcmp(key, "edx") == 0) { + EDX = val; + } else if (strcmp(key, "ebx") == 0) { + EBX = val; + } else if (strcmp(key, "esp") == 0) { + ESP = val; + } else if (strcmp(key, "ebp") == 0) { + EBP = val; + } else if (strcmp(key, "esi") == 0) { + ESI = val; + } else if (strcmp(key, "edi") == 0) { + EDI = val; + } else if (strcmp(key, "eip") == 0) { + EIP = val; + } else if (strcmp(key, "cs") == 0) { + CS = (val << 4); + } else { + lua_pushstring(L, "No such register."); + lua_error(L); + ret = 0; + } + return ret; +} + +static int register_get(lua_State * L) +{ + const char *key = luaL_checkstring(L, 2); + int ret = 1; + if (strcmp(key, "eax") == 0) { + lua_pushinteger(L, EAX); + } else if (strcmp(key, "ecx") == 0) { + lua_pushinteger(L, ECX); + } else if (strcmp(key, "edx") == 0) { + lua_pushinteger(L, EDX); + } else if (strcmp(key, "ebx") == 0) { + lua_pushinteger(L, EBX); + } else if (strcmp(key, "esp") == 0) { + lua_pushinteger(L, ESP); + } else if (strcmp(key, "ebp") == 0) { + lua_pushinteger(L, EBP); + } else if (strcmp(key, "esi") == 0) { + lua_pushinteger(L, ESI); + } else if (strcmp(key, "edi") == 0) { + lua_pushinteger(L, EDI); + } else if (strcmp(key, "eip") == 0) { + lua_pushinteger(L, EIP); + } else if (strcmp(key, "cs") == 0) { + lua_pushinteger(L, (CS >> 4)); + } else { + lua_pushstring(L, "No such register."); + lua_error(L); + ret = 0; + } + return ret; +} + +#undef env + +static int serialice_lua_registers(void) +{ + const struct luaL_Reg registermt[] = { + {"__index", register_get}, + {"__newindex", register_set}, + {NULL, NULL} + }; + + lua_newuserdata(L, sizeof(void *)); + luaL_newmetatable(L, "registermt"); +#if LUA_VERSION_NUM <= 501 + luaL_register(L, NULL, registermt); +#elif LUA_VERSION_NUM >= 502 + luaL_setfuncs(L, registermt, 0); +#endif + lua_setmetatable(L, -2); + lua_setglobal(L, "regs"); + + return 0; +} + +int serialice_lua_init(void) +{ + int status; + + /* Create a LUA context and load LUA libraries */ + L = luaL_newstate(); + luaL_openlibs(L); + + /* Register C function callbacks */ + lua_register(L, "SerialICE_register_physical", serialice_register_physical); + lua_register(L, "SerialICE_system_reset", serialice_system_reset); + + /* Set global variable SerialICE_mainboard */ + lua_pushstring(L, serialice_mainboard); + lua_setglobal(L, "SerialICE_mainboard"); + + /* Enable Register Access */ + serialice_lua_registers(); + + /* Load the script file */ + status = luaL_loadfile(L, serialice_lua_script); + if (status) { + fprintf(stderr, "Couldn't load SerialICE script: %s\n", + lua_tostring(L, -1)); + exit(1); + } + + /* Ask Lua to run our little script */ + status = lua_pcall(L, 0, 1, 0); + if (status) { + fprintf(stderr, "Failed to run script: %s\n", lua_tostring(L, -1)); + exit(1); + } + lua_pop(L, 1); + + return 0; +} + +#if 0 +/* not used yet */ +int serialice_lua_exit(void) +{ + lua_close(L); + return 0; +} +#endif + + +const char *serialice_lua_execute(const char *cmd) +{ + int error; + char *errstring = NULL; + error = luaL_loadbuffer(L, cmd, strlen(cmd), "line") + || lua_pcall(L, 0, 0, 0); + if (error) { + errstring = strdup(lua_tostring(L, -1)); + lua_pop(L, 1); + } + + return errstring; +} + +int serialice_io_read_filter(uint32_t * data, uint16_t port, int size) +{ + int ret, result; + + lua_getglobal(L, "SerialICE_io_read_filter"); + lua_pushinteger(L, port); // port + lua_pushinteger(L, size); // datasize + result = lua_pcall(L, 2, 2, 0); + if (result) { + fprintf(stderr, "Failed to run function SerialICE_io_read_filter: %s\n", + lua_tostring(L, -1)); + exit(1); + } + *data = lua_tointeger(L, -1); + ret = lua_toboolean(L, -2); + lua_pop(L, 2); + + return ret; +} + +int serialice_io_write_filter(uint32_t * data, uint16_t port, int size) +{ + int ret, result; + + lua_getglobal(L, "SerialICE_io_write_filter"); + lua_pushinteger(L, port); // port + lua_pushinteger(L, size); // datasize + lua_pushinteger(L, *data); // data + + result = lua_pcall(L, 3, 2, 0); + if (result) { + fprintf(stderr, + "Failed to run function SerialICE_io_write_filter: %s\n", + lua_tostring(L, -1)); + exit(1); + } + *data = lua_tointeger(L, -1); + ret = lua_toboolean(L, -2); + lua_pop(L, 2); + + return ret; +} + + +int serialice_memory_read_filter(uint32_t addr, uint32_t * data, + int size) +{ + int ret = 0, result; + + lua_getglobal(L, "SerialICE_memory_read_filter"); + lua_pushinteger(L, addr); // addr + lua_pushinteger(L, size); // datasize + result = lua_pcall(L, 2, 3, 0); + if (result) { + fprintf(stderr, + "Failed to run function SerialICE_memory_read_filter: %s\n", + lua_tostring(L, -1)); + exit(1); + } + + *data = lua_tointeger(L, -1); // result + + ret |= lua_toboolean(L, -2) ? READ_FROM_QEMU : 0; // to_qemu + ret |= lua_toboolean(L, -3) ? READ_FROM_SERIALICE : 0; // to_hw + + lua_pop(L, 3); + + return ret; +} + + +int serialice_memory_write_filter(uint32_t addr, int size, + uint32_t * data) +{ + int ret = 0, result; + int write_to_qemu, write_to_serialice; + + lua_getglobal(L, "SerialICE_memory_write_filter"); + lua_pushinteger(L, addr); // address + lua_pushinteger(L, size); // datasize + lua_pushinteger(L, *data); // data + result = lua_pcall(L, 3, 3, 0); + if (result) { + fprintf(stderr, + "Failed to run function SerialICE_memory_write_filter: %s\n", + lua_tostring(L, -1)); + exit(1); + } + *data = lua_tointeger(L, -1); + write_to_qemu = lua_toboolean(L, -2); + write_to_serialice = lua_toboolean(L, -3); + lua_pop(L, 3); + + ret |= write_to_qemu ? WRITE_TO_QEMU : 0; + ret |= write_to_serialice ? WRITE_TO_SERIALICE : 0; + + return ret; +} + + +int serialice_msr_filter(int flags, uint32_t addr, uint32_t * hi, + uint32_t * lo) +{ + int ret, result; + + if (flags & FILTER_WRITE) { + lua_getglobal(L, "SerialICE_msr_write_filter"); + } else { + lua_getglobal(L, "SerialICE_msr_read_filter"); + } + + lua_pushinteger(L, addr); // port + lua_pushinteger(L, *hi); // high + lua_pushinteger(L, *lo); // low + result = lua_pcall(L, 3, 3, 0); + if (result) { + fprintf(stderr, + "Failed to run function SerialICE_msr_%s_filter: %s\n", + (flags & FILTER_WRITE) ? "write" : "read", lua_tostring(L, -1)); + exit(1); + } + ret = lua_toboolean(L, -3); + if (ret) { + *hi = lua_tointeger(L, -1); + *lo = lua_tointeger(L, -2); + } + lua_pop(L, 3); + + return ret; +} + +int serialice_cpuid_filter(uint32_t eax, uint32_t ecx, + cpuid_regs_t * regs) +{ + int ret, result; + + lua_getglobal(L, "SerialICE_cpuid_filter"); + + lua_pushinteger(L, eax); // eax before calling + lua_pushinteger(L, ecx); // ecx before calling + // and the registers after calling cpuid + lua_pushinteger(L, regs->eax); // eax + lua_pushinteger(L, regs->ebx); // ebx + lua_pushinteger(L, regs->ecx); // ecx + lua_pushinteger(L, regs->edx); // edx + result = lua_pcall(L, 6, 5, 0); + if (result) { + fprintf(stderr, + "Failed to run function SerialICE_cpuid_filter: %s\n", + lua_tostring(L, -1)); + exit(1); + } + + ret = lua_toboolean(L, -5); + if (ret) { + regs->eax = lua_tointeger(L, -4); + regs->ebx = lua_tointeger(L, -3); + regs->ecx = lua_tointeger(L, -2); + regs->edx = lua_tointeger(L, -1); + } + lua_pop(L, 5); + + return ret; +} + +/* SerialICE output loggers */ + +void serialice_log(int flags, uint32_t data, uint32_t addr, int size) +{ + int result; + + if ((flags & LOG_WRITE) && (flags & LOG_MEMORY)) { + lua_getglobal(L, "SerialICE_memory_write_log"); + } else if (!(flags & LOG_WRITE) && (flags & LOG_MEMORY)) { + lua_getglobal(L, "SerialICE_memory_read_log"); + } else if ((flags & LOG_WRITE) && !(flags & LOG_MEMORY)) { + lua_getglobal(L, "SerialICE_io_write_log"); + } else { // if (!(flags & LOG_WRITE) && !(flags & LOG_MEMORY)) + lua_getglobal(L, "SerialICE_io_read_log"); + } + + lua_pushinteger(L, addr); // addr/port + lua_pushinteger(L, size); // datasize + lua_pushinteger(L, data); // data + lua_pushboolean(L, ((flags & LOG_TARGET) != 0)); + + result = lua_pcall(L, 4, 0, 0); + if (result) { + fprintf(stderr, "Failed to run function SerialICE_%s_%s_log: %s\n", + (flags & LOG_MEMORY) ? "memory" : "io", + (flags & LOG_WRITE) ? "write" : "read", lua_tostring(L, -1)); + exit(1); + } +} + +void serialice_msr_log(int flags, uint32_t addr, uint32_t hi, + uint32_t lo, int filtered) +{ + int result; + + if (flags & LOG_WRITE) { + lua_getglobal(L, "SerialICE_msr_write_log"); + } else { // if (!(flags & LOG_WRITE)) + lua_getglobal(L, "SerialICE_msr_read_log"); + } + + lua_pushinteger(L, addr); // addr/port + lua_pushinteger(L, hi); // datasize + lua_pushinteger(L, lo); // data + lua_pushboolean(L, filtered); // data + result = lua_pcall(L, 4, 0, 0); + if (result) { + fprintf(stderr, "Failed to run function SerialICE_msr_%s_log: %s\n", + (flags & LOG_WRITE) ? "write" : "read", lua_tostring(L, -1)); + exit(1); + } +} + +void serialice_cpuid_log(uint32_t eax, uint32_t ecx, cpuid_regs_t res, + int filtered) +{ + int result; + + lua_getglobal(L, "SerialICE_cpuid_log"); + + lua_pushinteger(L, eax); // input: eax + lua_pushinteger(L, ecx); // input: ecx + lua_pushinteger(L, res.eax); // output: eax + lua_pushinteger(L, res.ebx); // output: ebx + lua_pushinteger(L, res.ecx); // output: ecx + lua_pushinteger(L, res.edx); // output: edx + lua_pushboolean(L, filtered); // data + result = lua_pcall(L, 7, 0, 0); + if (result) { + fprintf(stderr, "Failed to run function SerialICE_cpuid_log: %s\n", + lua_tostring(L, -1)); + exit(1); + } +} + + diff --git a/qemu-0.15.x/serialice.c b/qemu-0.15.x/serialice.c index 27bacdd..2408d8b 100644 --- a/qemu-0.15.x/serialice.c +++ b/qemu-0.15.x/serialice.c @@ -41,11 +41,6 @@ #include <sys/ioctl.h> #endif -/* LUA includes */ -#include <lua.h> -#include <lauxlib.h> -#include <lualib.h> - /* Local includes */ #include "hw/hw.h" #include "hw/loader.h" @@ -64,11 +59,6 @@ #define BIOS_FILENAME "bios.bin" int serialice_active = 0; -const char *serialice_lua_script = "serialice.lua"; - -extern const char *serialice_mainboard; - -static lua_State *L; static DisplayState *ds; static int screen_invalid = 1; @@ -114,463 +104,6 @@ static void serialice_invalidate(void *opaque) } // ************************************************************************** -// LUA scripting interface and callbacks - -static int serialice_register_physical(lua_State * luastate) -{ - int n = lua_gettop(luastate); - static uint8_t num = 1; - uint32_t addr, size; - ram_addr_t phys; - char ram_name[16]; - - if (n != 2) { - fprintf(stderr, - "ERROR: Not called as SerialICE_register_physical(<addr> <size>)\n"); - return 0; - } - - addr = lua_tointeger(luastate, 1); - size = lua_tointeger(luastate, 2); - - if (num > 99) { - fprintf(stderr,"To much memory ranges registered\n"); - exit(1); - } - printf("Registering physical memory at 0x%08x (0x%08x bytes)\n", addr, size); - sprintf(ram_name, "serialice_ram%u", num); - phys = qemu_ram_alloc(NULL, ram_name, size); - cpu_register_physical_memory(addr, size, phys); - num++; - return 0; -} - -static int serialice_system_reset(lua_State * luastate) -{ - printf("Rebooting the emulated host CPU\n"); - qemu_system_reset_request(); - return 0; -} - -// ************************************************************************** -// LUA register access - -// some macros from target-i386/exec.h, which we can't include directly -#define env first_cpu -#define EAX (env->regs[R_EAX]) -#define ECX (env->regs[R_ECX]) -#define EDX (env->regs[R_EDX]) -#define EBX (env->regs[R_EBX]) -#define ESP (env->regs[R_ESP]) -#define EBP (env->regs[R_EBP]) -#define ESI (env->regs[R_ESI]) -#define EDI (env->regs[R_EDI]) -#define EIP (env->eip) -#define CS (env->segs[R_CS].base) -static int register_set(lua_State * L) -{ - const char *key = luaL_checkstring(L, 2); - int val = luaL_checkint(L, 3); - int ret = 1; - - if (strcmp(key, "eax") == 0) { - EAX = val; - } else if (strcmp(key, "ecx") == 0) { - ECX = val; - } else if (strcmp(key, "edx") == 0) { - EDX = val; - } else if (strcmp(key, "ebx") == 0) { - EBX = val; - } else if (strcmp(key, "esp") == 0) { - ESP = val; - } else if (strcmp(key, "ebp") == 0) { - EBP = val; - } else if (strcmp(key, "esi") == 0) { - ESI = val; - } else if (strcmp(key, "edi") == 0) { - EDI = val; - } else if (strcmp(key, "eip") == 0) { - EIP = val; - } else if (strcmp(key, "cs") == 0) { - CS = (val << 4); - } else { - lua_pushstring(L, "No such register."); - lua_error(L); - ret = 0; - } - return ret; -} - -static int register_get(lua_State * L) -{ - const char *key = luaL_checkstring(L, 2); - int ret = 1; - if (strcmp(key, "eax") == 0) { - lua_pushinteger(L, EAX); - } else if (strcmp(key, "ecx") == 0) { - lua_pushinteger(L, ECX); - } else if (strcmp(key, "edx") == 0) { - lua_pushinteger(L, EDX); - } else if (strcmp(key, "ebx") == 0) { - lua_pushinteger(L, EBX); - } else if (strcmp(key, "esp") == 0) { - lua_pushinteger(L, ESP); - } else if (strcmp(key, "ebp") == 0) { - lua_pushinteger(L, EBP); - } else if (strcmp(key, "esi") == 0) { - lua_pushinteger(L, ESI); - } else if (strcmp(key, "edi") == 0) { - lua_pushinteger(L, EDI); - } else if (strcmp(key, "eip") == 0) { - lua_pushinteger(L, EIP); - } else if (strcmp(key, "cs") == 0) { - lua_pushinteger(L, (CS >> 4)); - } else { - lua_pushstring(L, "No such register."); - lua_error(L); - ret = 0; - } - return ret; -} - -#undef env - -static int serialice_lua_registers(void) -{ - const struct luaL_Reg registermt[] = { - {"__index", register_get}, - {"__newindex", register_set}, - {NULL, NULL} - }; - - lua_newuserdata(L, sizeof(void *)); - luaL_newmetatable(L, "registermt"); -#if LUA_VERSION_NUM <= 501 - luaL_register(L, NULL, registermt); -#elif LUA_VERSION_NUM >= 502 - luaL_setfuncs(L, registermt, 0); -#endif - lua_setmetatable(L, -2); - lua_setglobal(L, "regs"); - - return 0; -} - -static int serialice_lua_init(void) -{ - int status; - - /* Create a LUA context and load LUA libraries */ - L = luaL_newstate(); - luaL_openlibs(L); - - /* Register C function callbacks */ - lua_register(L, "SerialICE_register_physical", serialice_register_physical); - lua_register(L, "SerialICE_system_reset", serialice_system_reset); - - /* Set global variable SerialICE_mainboard */ - lua_pushstring(L, serialice_mainboard); - lua_setglobal(L, "SerialICE_mainboard"); - - /* Enable Register Access */ - serialice_lua_registers(); - - /* Load the script file */ - status = luaL_loadfile(L, serialice_lua_script); - if (status) { - fprintf(stderr, "Couldn't load SerialICE script: %s\n", - lua_tostring(L, -1)); - exit(1); - } - - /* Ask Lua to run our little script */ - status = lua_pcall(L, 0, 1, 0); - if (status) { - fprintf(stderr, "Failed to run script: %s\n", lua_tostring(L, -1)); - exit(1); - } - lua_pop(L, 1); - - return 0; -} - -#if 0 -/* not used yet */ -static int serialice_lua_exit(void) -{ - lua_close(L); - return 0; -} -#endif - -const char *serialice_lua_execute(const char *cmd) -{ - int error; - char *errstring = NULL; - error = luaL_loadbuffer(L, cmd, strlen(cmd), "line") - || lua_pcall(L, 0, 0, 0); - if (error) { - errstring = strdup(lua_tostring(L, -1)); - lua_pop(L, 1); - } - - return errstring; -} - -static int serialice_io_read_filter(uint32_t * data, uint16_t port, int size) -{ - int ret, result; - - lua_getglobal(L, "SerialICE_io_read_filter"); - lua_pushinteger(L, port); // port - lua_pushinteger(L, size); // datasize - result = lua_pcall(L, 2, 2, 0); - if (result) { - fprintf(stderr, "Failed to run function SerialICE_io_read_filter: %s\n", - lua_tostring(L, -1)); - exit(1); - } - *data = lua_tointeger(L, -1); - ret = lua_toboolean(L, -2); - lua_pop(L, 2); - - return ret; -} - -static int serialice_io_write_filter(uint32_t * data, uint16_t port, int size) -{ - int ret, result; - - lua_getglobal(L, "SerialICE_io_write_filter"); - lua_pushinteger(L, port); // port - lua_pushinteger(L, size); // datasize - lua_pushinteger(L, *data); // data - - result = lua_pcall(L, 3, 2, 0); - if (result) { - fprintf(stderr, - "Failed to run function SerialICE_io_write_filter: %s\n", - lua_tostring(L, -1)); - exit(1); - } - *data = lua_tointeger(L, -1); - ret = lua_toboolean(L, -2); - lua_pop(L, 2); - - return ret; -} - -#define READ_FROM_QEMU (1 << 0) -#define READ_FROM_SERIALICE (1 << 1) -static int serialice_memory_read_filter(uint32_t addr, uint32_t * data, - int size) -{ - int ret = 0, result; - - lua_getglobal(L, "SerialICE_memory_read_filter"); - lua_pushinteger(L, addr); // addr - lua_pushinteger(L, size); // datasize - result = lua_pcall(L, 2, 3, 0); - if (result) { - fprintf(stderr, - "Failed to run function SerialICE_memory_read_filter: %s\n", - lua_tostring(L, -1)); - exit(1); - } - - *data = lua_tointeger(L, -1); // result - - ret |= lua_toboolean(L, -2) ? READ_FROM_QEMU : 0; // to_qemu - ret |= lua_toboolean(L, -3) ? READ_FROM_SERIALICE : 0; // to_hw - - lua_pop(L, 3); - - return ret; -} - -#define WRITE_TO_QEMU (1 << 0) -#define WRITE_TO_SERIALICE (1 << 1) - -static int serialice_memory_write_filter(uint32_t addr, int size, - uint32_t * data) -{ - int ret = 0, result; - int write_to_qemu, write_to_serialice; - - lua_getglobal(L, "SerialICE_memory_write_filter"); - lua_pushinteger(L, addr); // address - lua_pushinteger(L, size); // datasize - lua_pushinteger(L, *data); // data - result = lua_pcall(L, 3, 3, 0); - if (result) { - fprintf(stderr, - "Failed to run function SerialICE_memory_write_filter: %s\n", - lua_tostring(L, -1)); - exit(1); - } - *data = lua_tointeger(L, -1); - write_to_qemu = lua_toboolean(L, -2); - write_to_serialice = lua_toboolean(L, -3); - lua_pop(L, 3); - - ret |= write_to_qemu ? WRITE_TO_QEMU : 0; - ret |= write_to_serialice ? WRITE_TO_SERIALICE : 0; - - return ret; -} - -#define FILTER_READ 0 -#define FILTER_WRITE 1 - -static int serialice_msr_filter(int flags, uint32_t addr, uint32_t * hi, - uint32_t * lo) -{ - int ret, result; - - if (flags & FILTER_WRITE) { - lua_getglobal(L, "SerialICE_msr_write_filter"); - } else { - lua_getglobal(L, "SerialICE_msr_read_filter"); - } - - lua_pushinteger(L, addr); // port - lua_pushinteger(L, *hi); // high - lua_pushinteger(L, *lo); // low - result = lua_pcall(L, 3, 3, 0); - if (result) { - fprintf(stderr, - "Failed to run function SerialICE_msr_%s_filter: %s\n", - (flags & FILTER_WRITE) ? "write" : "read", lua_tostring(L, -1)); - exit(1); - } - ret = lua_toboolean(L, -3); - if (ret) { - *hi = lua_tointeger(L, -1); - *lo = lua_tointeger(L, -2); - } - lua_pop(L, 3); - - return ret; -} - -static int serialice_cpuid_filter(uint32_t eax, uint32_t ecx, - cpuid_regs_t * regs) -{ - int ret, result; - - lua_getglobal(L, "SerialICE_cpuid_filter"); - - lua_pushinteger(L, eax); // eax before calling - lua_pushinteger(L, ecx); // ecx before calling - // and the registers after calling cpuid - lua_pushinteger(L, regs->eax); // eax - lua_pushinteger(L, regs->ebx); // ebx - lua_pushinteger(L, regs->ecx); // ecx - lua_pushinteger(L, regs->edx); // edx - result = lua_pcall(L, 6, 5, 0); - if (result) { - fprintf(stderr, - "Failed to run function SerialICE_cpuid_filter: %s\n", - lua_tostring(L, -1)); - exit(1); - } - - ret = lua_toboolean(L, -5); - if (ret) { - regs->eax = lua_tointeger(L, -4); - regs->ebx = lua_tointeger(L, -3); - regs->ecx = lua_tointeger(L, -2); - regs->edx = lua_tointeger(L, -1); - } - lua_pop(L, 5); - - return ret; -} - -/* SerialICE output loggers */ - -#define LOG_IO 0 -#define LOG_MEMORY 1 -#define LOG_READ 0 -#define LOG_WRITE 2 -// these two are separate -#define LOG_QEMU 4 -#define LOG_TARGET 8 - -static void serialice_log(int flags, uint32_t data, uint32_t addr, int size) -{ - int result; - - if ((flags & LOG_WRITE) && (flags & LOG_MEMORY)) { - lua_getglobal(L, "SerialICE_memory_write_log"); - } else if (!(flags & LOG_WRITE) && (flags & LOG_MEMORY)) { - lua_getglobal(L, "SerialICE_memory_read_log"); - } else if ((flags & LOG_WRITE) && !(flags & LOG_MEMORY)) { - lua_getglobal(L, "SerialICE_io_write_log"); - } else { // if (!(flags & LOG_WRITE) && !(flags & LOG_MEMORY)) - lua_getglobal(L, "SerialICE_io_read_log"); - } - - lua_pushinteger(L, addr); // addr/port - lua_pushinteger(L, size); // datasize - lua_pushinteger(L, data); // data - lua_pushboolean(L, ((flags & LOG_TARGET) != 0)); - - result = lua_pcall(L, 4, 0, 0); - if (result) { - fprintf(stderr, "Failed to run function SerialICE_%s_%s_log: %s\n", - (flags & LOG_MEMORY) ? "memory" : "io", - (flags & LOG_WRITE) ? "write" : "read", lua_tostring(L, -1)); - exit(1); - } -} - -static void serialice_msr_log(int flags, uint32_t addr, uint32_t hi, - uint32_t lo, int filtered) -{ - int result; - - if (flags & LOG_WRITE) { - lua_getglobal(L, "SerialICE_msr_write_log"); - } else { // if (!(flags & LOG_WRITE)) - lua_getglobal(L, "SerialICE_msr_read_log"); - } - - lua_pushinteger(L, addr); // addr/port - lua_pushinteger(L, hi); // datasize - lua_pushinteger(L, lo); // data - lua_pushboolean(L, filtered); // data - result = lua_pcall(L, 4, 0, 0); - if (result) { - fprintf(stderr, "Failed to run function SerialICE_msr_%s_log: %s\n", - (flags & LOG_WRITE) ? "write" : "read", lua_tostring(L, -1)); - exit(1); - } -} - -static void serialice_cpuid_log(uint32_t eax, uint32_t ecx, cpuid_regs_t res, - int filtered) -{ - int result; - - lua_getglobal(L, "SerialICE_cpuid_log"); - - lua_pushinteger(L, eax); // input: eax - lua_pushinteger(L, ecx); // input: ecx - lua_pushinteger(L, res.eax); // output: eax - lua_pushinteger(L, res.ebx); // output: ebx - lua_pushinteger(L, res.ecx); // output: ecx - lua_pushinteger(L, res.edx); // output: edx - lua_pushboolean(L, filtered); // data - result = lua_pcall(L, 7, 0, 0); - if (result) { - fprintf(stderr, "Failed to run function SerialICE_cpuid_log: %s\n", - lua_tostring(L, -1)); - exit(1); - } -} - -// ************************************************************************** // high level communication with the SerialICE shell uint8_t serialice_inb(uint16_t port) diff --git a/qemu-0.15.x/serialice.h b/qemu-0.15.x/serialice.h index 20b0e52..27e9eb5 100644 --- a/qemu-0.15.x/serialice.h +++ b/qemu-0.15.x/serialice.h @@ -32,9 +32,27 @@ #error "SerialICE currently only supports x86 and x64 platforms." #endif +#define READ_FROM_QEMU (1 << 0) +#define READ_FROM_SERIALICE (1 << 1) + +#define WRITE_TO_QEMU (1 << 0) +#define WRITE_TO_SERIALICE (1 << 1) + +#define FILTER_READ 0 +#define FILTER_WRITE 1 + +#define LOG_IO 0 +#define LOG_MEMORY 1 +#define LOG_READ 0 +#define LOG_WRITE 2 +// these two are separate +#define LOG_QEMU 4 +#define LOG_TARGET 8 + extern const char *serialice_device; extern int serialice_active; +int serialice_lua_init(void); const char *serialice_lua_execute(const char *cmd); void serialice_serial_init(void); @@ -77,4 +95,16 @@ void serialice_rdmsr_wrapper(uint32_t addr, uint32_t key, uint32_t *hi, uint32_t void serialice_wrmsr_wrapper(uint32_t addr, uint32_t key, uint32_t hi, uint32_t lo); void serialice_cpuid_wrapper(uint32_t eax, uint32_t ecx, cpuid_regs_t * ret); +/* serialice LUA */ +int serialice_io_read_filter(uint32_t * data, uint16_t port, int size); +int serialice_io_write_filter(uint32_t * data, uint16_t port, int size); +int serialice_memory_read_filter(uint32_t addr, uint32_t * data, int size); +int serialice_memory_write_filter(uint32_t addr, int size, uint32_t * data); +int serialice_msr_filter(int flags, uint32_t addr, uint32_t * hi, uint32_t * lo); +int serialice_cpuid_filter(uint32_t eax, uint32_t ecx, cpuid_regs_t * regs); + +void serialice_log(int flags, uint32_t data, uint32_t addr, int size); +void serialice_msr_log(int flags, uint32_t addr, uint32_t hi, uint32_t lo, int filtered); +void serialice_cpuid_log(uint32_t eax, uint32_t ecx, cpuid_regs_t res, int filtered); + #endif

1 0

Patch merged into serialice/master: 9a6b91b Update to Lua 5.2.0
by gerrit＠coreboot.org 17 Aug '12

17 Aug '12

the following patch was just integrated into master: commit 9a6b91b7f08860c3b44ebbd710ac3a8ea28deebb Author: Idwer Vollering <vidwer(a)gmail.com> Date: Thu Aug 16 22:51:43 2012 +0200 Update to Lua 5.2.0 Update SerialICE to be able to use Lua 5.2.0 Drop serialice-qemu-0.11.0.diff while we're at it. lua-5.2.0-shared.diff is (C) 2012 by Kyösti Mälkki. Change-Id: I73ad1c61c4399a552c7fa3844049a98d4ac27470 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Aug 16 23:31:11 2012, giving +1 Reviewed-By: Anton Kochkov <anton.kochkov(a)gmail.com> at Fri Aug 17 10:45:59 2012, giving +2 See http://review.coreboot.org/1100 for details. -gerrit

1 0

Patch set updated for serialice: 9a6b91b Update to Lua 5.2.0
by Idwer Vollering 16 Aug '12

16 Aug '12

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1100 -gerrit commit 9a6b91b7f08860c3b44ebbd710ac3a8ea28deebb Author: Idwer Vollering <vidwer(a)gmail.com> Date: Thu Aug 16 22:51:43 2012 +0200 Update to Lua 5.2.0 Update SerialICE to be able to use Lua 5.2.0 Drop serialice-qemu-0.11.0.diff while we're at it. lua-5.2.0-shared.diff is (C) 2012 by Kyösti Mälkki. Change-Id: I73ad1c61c4399a552c7fa3844049a98d4ac27470 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/patches/lua-5.2.0-intsize.diff | 20 + SerialICE/patches/lua-5.2.0-shared.diff | 42 + SerialICE/patches/lua-5.2.0-x64-fix.diff | 12 + SerialICE/patches/serialice-qemu-0.11.0.diff | 1453 -------------------------- SerialICE/patches/serialice.lua-5.2.diff | 120 +++ 5 files changed, 194 insertions(+), 1453 deletions(-) diff --git a/SerialICE/patches/lua-5.2.0-intsize.diff b/SerialICE/patches/lua-5.2.0-intsize.diff new file mode 100644 index 0000000..e29ffae --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-intsize.diff @@ -0,0 +1,20 @@ +diff -ur lua-5.2.0/src/luaconf.h lua-5.2.0-shared/src/luaconf.h +--- lua-5.2.0/src/luaconf.h 2011-12-06 17:58:36.000000000 +0100 ++++ lua-5.2.0-shared/src/luaconf.h 2012-06-12 22:25:20.179943819 +0200 +@@ -10,6 +10,7 @@ + + #include <limits.h> + #include <stddef.h> ++#include <stdint.h> + + + /* +@@ -444,7 +445,7 @@ + ** CHANGE that if ptrdiff_t is not adequate on your machine. (On most + ** machines, ptrdiff_t gives a good choice between int or long.) + */ +-#define LUA_INTEGER ptrdiff_t ++#define LUA_INTEGER int64_t + + /* + @@ LUA_UNSIGNED is the integral type used by lua_pushunsigned/lua_tounsigned. diff --git a/SerialICE/patches/lua-5.2.0-shared.diff b/SerialICE/patches/lua-5.2.0-shared.diff new file mode 100644 index 0000000..465adf2 --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-shared.diff @@ -0,0 +1,42 @@ +diff -ur lua-5.2.0/Makefile lua-5.2.0-shared/Makefile +--- lua-5.2.0/Makefile 2011-11-16 00:38:12.000000000 +0100 ++++ lua-5.2.0-shared/Makefile 2012-06-12 21:42:25.953250340 +0200 +@@ -41,7 +41,7 @@ + # What to install. + TO_BIN= lua luac + TO_INC= lua.h luaconf.h lualib.h lauxlib.h lua.hpp +-TO_LIB= liblua.a ++TO_LIB= liblua.a liblua.so + TO_MAN= lua.1 luac.1 + + # Lua version and release. +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 21:44:17.476584177 +0200 +@@ -29,6 +29,7 @@ + PLATS= aix ansi bsd freebsd generic linux macosx mingw posix solaris + + LUA_A= liblua.a ++LUA_SO= liblua.so + CORE_O= lapi.o lcode.o lctype.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o \ + lmem.o lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o \ + ltm.o lundump.o lvm.o lzio.o +@@ -43,7 +44,7 @@ + LUAC_O= luac.o + + ALL_O= $(BASE_O) $(LUA_O) $(LUAC_O) +-ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) ++ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) $(LUA_SO) + ALL_A= $(LUA_A) + + # Targets start here. +@@ -59,6 +60,9 @@ + $(AR) $@ $? + $(RANLIB) $@ + ++$(LUA_SO): $(CORE_O) $(LIB_O) ++ $(CC) -o $@ -shared $? ++ + $(LUA_T): $(LUA_O) $(LUA_A) + $(CC) -o $@ $(LDFLAGS) $(LUA_O) $(LUA_A) $(LIBS) + diff --git a/SerialICE/patches/lua-5.2.0-x64-fix.diff b/SerialICE/patches/lua-5.2.0-x64-fix.diff new file mode 100644 index 0000000..d649f7a --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-x64-fix.diff @@ -0,0 +1,12 @@ +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 22:24:16.973276561 +0200 +@@ -103,7 +103,7 @@ + generic: $(ALL) + + linux: +- $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" ++ $(MAKE) $(ALL) SYSCFLAGS="-fPIC -DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" + + macosx: + $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_MACOSX" SYSLIBS="-lreadline" diff --git a/SerialICE/patches/serialice-qemu-0.11.0.diff b/SerialICE/patches/serialice-qemu-0.11.0.diff deleted file mode 100644 index 58268a7..0000000 --- a/SerialICE/patches/serialice-qemu-0.11.0.diff +++ /dev/null @@ -1,1453 +0,0 @@ - -QEMU 0.11.0 SerialICE patch - -Adds SerialICE firmware debugger support to Qemu. - -Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> - - Makefile | 4 - Makefile.target | 7 - build.sh | 5 - configure | 45 ++ - exec-all.h | 4 - hw/pc.c | 13 - qemu-char.c | 4 - qemu-options.hx | 11 - serialice.c | 927 ++++++++++++++++++++++++++++++++++++++++++++++++ - serialice.h | 66 +++ - softmmu_template.h | 28 + - target-i386/op_helper.c | 62 +++ - vl.c | 8 - 13 files changed, 1182 insertions(+), 2 deletions(-) - ---- qemu-0.11.0/serialice.c -+++ qemu-0.11.0/serialice.c -@@ -0,0 +1,927 @@ -+/* -+ * QEMU PC System Emulator -+ * -+ * Copyright (c) 2009 coresystems GmbH -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a copy -+ * of this software and associated documentation files (the "Software"), to deal -+ * in the Software without restriction, including without limitation the rights -+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -+ * copies of the Software, and to permit persons to whom the Software is -+ * furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -+ * THE SOFTWARE. -+ */ -+ -+/* System includes */ -+#include <stdlib.h> -+#include <stdio.h> -+#include <stdint.h> -+#include <unistd.h> -+#include <string.h> -+#ifdef WIN32 -+#include <windows.h> -+#include <conio.h> -+#else -+#include <fcntl.h> -+#include <termios.h> -+#include <sys/ioctl.h> -+#endif -+ -+/* LUA includes */ -+#include <lua.h> -+#include <lauxlib.h> -+#include <lualib.h> -+ -+/* Local includes */ -+#include "hw/hw.h" -+#include "hw/pc.h" -+#include "serialice.h" -+#include "sysemu.h" -+ -+#define SERIALICE_DEBUG 3 -+#define BUFFER_SIZE 1024 -+typedef struct { -+#ifdef WIN32 -+ HANDLE fd; -+#else -+ int fd; -+#endif -+ char *buffer; -+ char *command; -+} SerialICEState; -+ -+static SerialICEState *s; -+ -+int serialice_active = 0; -+const char *serialice_lua_script="serialice.lua"; -+ -+#ifndef WIN32 -+static struct termios options; -+#endif -+ -+static lua_State *L; -+ -+// ************************************************************************** -+// LUA scripting interface and callbacks -+ -+static int serialice_register_physical(lua_State *luastate) -+{ -+ int n = lua_gettop(luastate); -+ uint32_t addr, size; -+ ram_addr_t phys; -+ -+ if (n != 2) { -+ fprintf(stderr, "ERROR: Not called as SerialICE_register_physical(<addr> <size>)\n"); -+ return 0; -+ } -+ -+ addr = lua_tointeger(luastate, 1); -+ size = lua_tointeger(luastate, 2); -+ -+ printf("Registering physical memory at 0x%08x (0x%08x bytes)\n", addr, size); -+ phys = qemu_ram_alloc(size); -+ cpu_register_physical_memory(addr, size, phys); -+ -+ return 0; -+} -+ -+static int serialice_lua_init(void) -+{ -+ int status; -+ -+ /* Create a LUA context and load LUA libraries */ -+ L = luaL_newstate(); -+ luaL_openlibs(L); -+ -+ /* Register C function callbacks */ -+ lua_register(L, "SerialICE_register_physical", serialice_register_physical); -+ -+ /* Load the script file */ -+ status = luaL_loadfile(L, serialice_lua_script); -+ if (status) { -+ fprintf(stderr, "Couldn't load SerialICE script: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ /* Ask Lua to run our little script */ -+ status = lua_pcall(L, 0, 1, 0); -+ if (status) { -+ fprintf(stderr, "Failed to run script: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ lua_pop(L, 1); -+ -+ return 0; -+} -+ -+static int serialice_lua_exit(void) -+{ -+ lua_close(L); -+ return 0; -+} -+ -+static int serialice_io_read_filter(uint32_t *data, uint16_t port, int size) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_read_filter"); -+ lua_pushinteger(L, port); // port -+ lua_pushinteger(L, size); // datasize -+ result = lua_pcall(L, 2, 2, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_io_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ ret = lua_toboolean(L, -2); -+ lua_pop(L, 2); -+ -+ return ret; -+} -+ -+static int serialice_io_write_filter(uint32_t *data, uint16_t port, int size) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_write_filter"); -+ lua_pushinteger(L, port); // port -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, *data); // data -+ -+ result = lua_pcall(L, 3, 2, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_io_write_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ ret = lua_toboolean(L, -2); -+ lua_pop(L, 2); -+ -+ return ret; -+} -+ -+ -+#define READ_FROM_QEMU (1 << 0) -+#define READ_FROM_SERIALICE (1 << 1) -+static int serialice_memory_read_filter(uint32_t addr, uint32_t *data, int size) -+{ -+ int ret = 0, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_read_filter"); -+ lua_pushinteger(L, addr); // addr -+ lua_pushinteger(L, size); // datasize -+ result = lua_pcall(L, 2, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_memory_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ *data = lua_tointeger(L, -1); // result -+ -+ ret |= lua_toboolean(L, -2) ? READ_FROM_QEMU : 0; // to_qemu -+ ret |= lua_toboolean(L, -3) ? READ_FROM_SERIALICE : 0; // to_hw -+ -+ lua_pop(L, 3); -+ -+ return ret; -+} -+ -+#define WRITE_TO_QEMU (1 << 0) -+#define WRITE_TO_SERIALICE (1 << 1) -+ -+static int serialice_memory_write_filter(uint32_t addr, int size, uint32_t *data) -+{ -+ int ret = 0, result; -+ int write_to_qemu, write_to_serialice; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_write_filter"); -+ lua_pushinteger(L, addr); // address -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, *data); // data -+ result = lua_pcall(L, 3, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_memory_write_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ write_to_qemu = lua_toboolean(L, -2); -+ write_to_serialice = lua_toboolean(L, -3); -+ lua_pop(L, 3); -+ -+ ret |= write_to_qemu ? WRITE_TO_QEMU : 0; -+ ret |= write_to_serialice ? WRITE_TO_SERIALICE : 0; -+ -+ return ret; -+} -+ -+#define FILTER_READ 0 -+#define FILTER_WRITE 1 -+ -+static int serialice_msr_filter(int flags, uint32_t addr, uint32_t *hi, uint32_t *lo) -+{ -+ int ret, result; -+ -+ if (flags & FILTER_WRITE) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_write_filter"); -+ else -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_read_filter"); -+ -+ lua_pushinteger(L, addr); // port -+ lua_pushinteger(L, *hi); // high -+ lua_pushinteger(L, *lo); // low -+ result = lua_pcall(L, 3, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ ret = lua_toboolean(L, -3); -+ if (ret) { -+ *hi = lua_tointeger(L, -1); -+ *lo = lua_tointeger(L, -2); -+ } -+ lua_pop(L, 3); -+ -+ return ret; -+} -+ -+static int serialice_cpuid_filter(cpuid_regs_t *regs) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_cpuid_filter"); -+ -+ lua_pushinteger(L, regs->eax); // eax -+ lua_pushinteger(L, regs->ecx); // ecx -+ result = lua_pcall(L, 2, 5, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ ret = lua_toboolean(L, -5); -+ if (ret) { -+ regs->eax = lua_tointeger(L, -1); -+ regs->ebx = lua_tointeger(L, -2); -+ regs->ecx = lua_tointeger(L, -3); -+ regs->edx = lua_tointeger(L, -4); -+ } -+ lua_pop(L, 5); -+ -+ return ret; -+} -+ -+ -+/* SerialICE output loggers */ -+ -+#define LOG_IO 0 -+#define LOG_MEMORY 1 -+#define LOG_READ 0 -+#define LOG_WRITE 2 -+// these two are separate -+#define LOG_QEMU 4 -+#define LOG_TARGET 8 -+ -+static void serialice_log(int flags, uint32_t data, uint32_t addr, int size) -+{ -+ int result; -+ -+ if ((flags & LOG_WRITE) && (flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_write_log"); -+ else if (!(flags & LOG_WRITE) && (flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_read_log"); -+ else if ((flags & LOG_WRITE) && !(flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_write_log"); -+ else // if (!(flags & LOG_WRITE) && !(flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_read_log"); -+ -+ lua_pushinteger(L, addr); // addr/port -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, data); // data -+ lua_pushboolean(L, ((flags & LOG_TARGET) != 0)); -+ -+ result = lua_pcall(L, 4, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_%s_%s_log: %s\n", -+ (flags & LOG_MEMORY)?"memory":"io", -+ (flags & LOG_WRITE)?"write":"read", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+static void serialice_msr_log(int flags, uint32_t addr, uint32_t hi, uint32_t lo, int filtered) -+{ -+ int result; -+ -+ if (flags & LOG_WRITE) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_write_log"); -+ else // if (!(flags & LOG_WRITE)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_read_log"); -+ -+ lua_pushinteger(L, addr); // addr/port -+ lua_pushinteger(L, hi); // datasize -+ lua_pushinteger(L, lo); // data -+ lua_pushboolean(L, filtered); // data -+ result = lua_pcall(L, 4, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_%s_log: %s\n", -+ (flags & LOG_WRITE)?"write":"read", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+static void serialice_cpuid_log(uint32_t eax, uint32_t ecx, cpuid_regs_t res, int filtered) -+{ -+ int result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_cpuid_log"); -+ -+ lua_pushinteger(L, eax); // input: eax -+ lua_pushinteger(L, ecx); // input: ecx -+ lua_pushinteger(L, res.eax); // output: eax -+ lua_pushinteger(L, res.ebx); // output: ebx -+ lua_pushinteger(L, res.ecx); // output: ecx -+ lua_pushinteger(L, res.edx); // output: edx -+ lua_pushboolean(L, filtered); // data -+ result = lua_pcall(L, 7, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_cpuid_log: %s\n", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+ -+// ************************************************************************** -+// low level communication with the SerialICE shell (serial communication) -+ -+static int serialice_read(SerialICEState *state, void *buf, size_t nbyte) -+{ -+ int bytes_read = 0; -+ -+ while (1) { -+#ifdef WIN32 -+ int ret = 0; -+ ReadFile(state->fd, buf, nbyte - bytes_read, &ret, NULL); -+ if (!ret) -+ break; -+#else -+ int ret = read(state->fd, buf, nbyte - bytes_read); -+ -+ if (ret == -1 && errno == EINTR) -+ continue; -+ -+ if (ret == -1) -+ break; -+#endif -+ -+ bytes_read += ret; -+ buf += ret; -+ -+ if (bytes_read >= (int)nbyte) -+ break; -+ } -+ -+ return bytes_read; -+} -+ -+static int serialice_write(SerialICEState *state, const void *buf, size_t nbyte) -+{ -+ char *buffer = (char *) buf; -+ char c; -+ int i; -+ -+ for (i = 0; i < (int)nbyte; i++) { -+#ifdef WIN32 -+ int ret = 0; -+ while (ret == 0) -+ WriteFile(state->fd, buffer + i, 1, &ret, NULL); -+ ret = 0; -+ while (ret == 0) -+ ReadFile(state->fd, &c, 1, &ret, NULL); -+#else -+ while (write(state->fd, buffer + i, 1) != 1) ; -+ while (read(state->fd, &c, 1) != 1) ; -+#endif -+ if (c != buffer[i]) { -+ printf("Readback error! %x/%x\n", c, buffer[i]); -+ } -+ } -+ -+ return nbyte; -+} -+ -+static int serialice_wait_prompt(void) -+{ -+ char buf[3]; -+ int l; -+ -+ l = serialice_read(s, buf, 3); -+ -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ -+ while (buf[0] != '\n' || buf[1] != '>' || buf[2] != ' ') { -+ buf[0] = buf[1]; -+ buf[1] = buf[2]; -+ l = serialice_read(s, buf + 2, 1); -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ } -+ -+ return 0; -+} -+ -+static void serialice_command(const char *command, int reply_len) -+{ -+#if SERIALICE_DEBUG > 5 -+ int i; -+#endif -+ int l; -+ -+ serialice_wait_prompt(); -+ -+ serialice_write(s, command, strlen(command)); -+ -+ memset(s->buffer, 0, reply_len + 1); // clear enough of the buffer -+ -+ l = serialice_read(s, s->buffer, reply_len); -+ -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ -+ // compensate for CR on the wire. Needed on Win32 -+ if (s->buffer[0] == '\r') { -+ memmove(s->buffer, s->buffer+1, reply_len); -+ serialice_read(s, s->buffer+reply_len-1, 1); -+ } -+ -+ if (l != reply_len) { -+ printf("SerialICE: command was not answered sufficiently: " -+ "(%d/%d bytes)\n'%s'\n", l, reply_len, s->buffer); -+ exit(1); -+ } -+ -+#if SERIALICE_DEBUG > 5 -+ for (i=0; i < reply_len; i++) -+ printf("%02x ", s->buffer[i]); -+ printf("\n"); -+#endif -+} -+ -+ -+// ************************************************************************** -+// high level communication with the SerialICE shell -+ -+uint8_t serialice_inb(uint16_t port) -+{ -+ uint8_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data & 0xff; -+ -+ sprintf(s->command, "*ri%04x.b", port); -+ // command read back: "\n00" (3 characters) -+ serialice_command(s->command, 3); -+ ret = (uint8_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 1); -+ -+ return ret; -+} -+ -+uint16_t serialice_inw(uint16_t port) -+{ -+ uint16_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data & 0xffff; -+ -+ sprintf(s->command, "*ri%04x.w", port); -+ // command read back: "\n0000" (5 characters) -+ serialice_command(s->command, 5); -+ ret = (uint16_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 2); -+ -+ return ret; -+} -+ -+uint32_t serialice_inl(uint16_t port) -+{ -+ uint32_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data; -+ -+ sprintf(s->command, "*ri%04x.l", port); -+ // command read back: "\n00000000" (9 characters) -+ serialice_command(s->command, 9); -+ ret = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 4); -+ -+ return ret; -+} -+ -+void serialice_outb(uint8_t data, uint16_t port) -+{ -+ uint32_t filtered_data = (uint32_t)data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 1); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 1)) { -+ return; -+ } -+ -+ data = (uint8_t)filtered_data; -+ sprintf(s->command, "*wi%04x.b=%02x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_outw(uint16_t data, uint16_t port) -+{ -+ uint32_t filtered_data = (uint32_t)data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 2); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 2)) { -+ return; -+ } -+ -+ data = (uint16_t)filtered_data; -+ sprintf(s->command, "*wi%04x.w=%04x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_outl(uint32_t data, uint16_t port) -+{ -+ uint32_t filtered_data = data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 4); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 4)) { -+ return; -+ } -+ -+ data = filtered_data; -+ sprintf(s->command, "*wi%04x.l=%08x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+uint8_t serialice_readb(uint32_t addr) -+{ -+ uint8_t ret; -+ sprintf(s->command, "*rm%08x.b", addr); -+ // command read back: "\n00" (3 characters) -+ serialice_command(s->command, 3); -+ ret = (uint8_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+uint16_t serialice_readw(uint32_t addr) -+{ -+ uint16_t ret; -+ sprintf(s->command, "*rm%08x.w", addr); -+ // command read back: "\n0000" (5 characters) -+ serialice_command(s->command, 5); -+ ret = (uint16_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+uint32_t serialice_readl(uint32_t addr) -+{ -+ uint32_t ret; -+ sprintf(s->command, "*rm%08x.l", addr); -+ // command read back: "\n00000000" (9 characters) -+ serialice_command(s->command, 9); -+ ret = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+void serialice_writeb(uint8_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.b=%02x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_writew(uint16_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.w=%04x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_writel(uint32_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.l=%08x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+uint64_t serialice_rdmsr(uint32_t addr, uint32_t key) -+{ -+ uint32_t hi, lo; -+ uint64_t ret; -+ int filtered; -+ -+ filtered = serialice_msr_filter(FILTER_READ, addr, &hi, &lo); -+ if (!filtered) { -+ sprintf(s->command, "*rc%08x.%08x", addr, key); -+ -+ // command read back: "\n00000000.00000000" (18 characters) -+ serialice_command(s->command, 18); -+ -+ s->buffer[9] = 0; // . -> \0 -+ hi = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ lo = (uint32_t)strtoul(s->buffer + 10, (char **)NULL, 16); -+ } -+ -+ ret = hi; -+ ret <<= 32; -+ ret |= lo; -+ -+ serialice_msr_log(LOG_READ, addr, hi, lo, filtered); -+ -+ return ret; -+} -+ -+void serialice_wrmsr(uint64_t data, uint32_t addr, uint32_t key) -+{ -+ uint32_t hi, lo; -+ int filtered; -+ -+ hi = (data >> 32); -+ lo = (data & 0xffffffff); -+ -+ filtered = serialice_msr_filter(FILTER_WRITE, addr, &hi, &lo); -+ -+ if (!filtered) { -+ sprintf(s->command, "*wc%08x.%08x=%08x.%08x", addr, key, hi, lo); -+ serialice_command(s->command, 0); -+ } -+ -+ serialice_msr_log(LOG_WRITE, addr, hi, lo, filtered); -+} -+ -+cpuid_regs_t serialice_cpuid(uint32_t eax, uint32_t ecx) -+{ -+ cpuid_regs_t ret; -+ int filtered; -+ -+ ret.eax = eax; -+ ret.ebx = 0; // either set by filter or by target -+ ret.ecx = ecx; -+ ret.edx = 0; // either set by filter or by target -+ -+ filtered = serialice_cpuid_filter(&ret); -+ if (!filtered) { -+ sprintf(s->command, "*ci%08x.%08x", eax, ecx); -+ -+ // command read back: "\n000006f2.00000000.00001234.12340324" -+ // (36 characters) -+ serialice_command(s->command, 36); -+ -+ s->buffer[9] = 0; // . -> \0 -+ s->buffer[18] = 0; // . -> \0 -+ s->buffer[27] = 0; // . -> \0 -+ ret.eax = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ ret.ebx = (uint32_t)strtoul(s->buffer + 10, (char **)NULL, 16); -+ ret.ecx = (uint32_t)strtoul(s->buffer + 19, (char **)NULL, 16); -+ ret.edx = (uint32_t)strtoul(s->buffer + 28, (char **)NULL, 16); -+ } -+ -+ serialice_cpuid_log(eax, ecx, ret, filtered); -+ -+ return ret; -+} -+ -+// ************************************************************************** -+// memory load handling -+ -+static uint32_t serialice_load_wrapper(uint32_t addr, unsigned int size) -+{ -+ switch (size) { -+ case 1: return (uint32_t)serialice_readb(addr); -+ case 2: return (uint32_t)serialice_readw(addr); -+ case 4: return (uint32_t)serialice_readl(addr); -+ default: printf("WARNING: unknown read access size %d @%08x\n", size, addr); -+ } -+ return 0; -+} -+ -+/** -+ * This function is called by the softmmu engine to update the status -+ * of a load cycle -+ */ -+void serialice_log_load(int caught, uint32_t addr, uint32_t result, unsigned int data_size) -+{ -+ if (caught) -+ serialice_log(LOG_READ|LOG_MEMORY|LOG_TARGET, result, addr, data_size); -+ else -+ serialice_log(LOG_READ|LOG_MEMORY, result, addr, data_size); -+} -+ -+/* This function can grab Qemu load ops and forward them to the SerialICE -+ * target. -+ * -+ * @return 0: pass on to Qemu; 1: handled locally. -+ */ -+int serialice_handle_load(uint32_t addr, uint32_t *result, unsigned int data_size) -+{ -+ int source; -+ -+ source = serialice_memory_read_filter(addr, result, data_size); -+ -+ if (source & READ_FROM_SERIALICE) { -+ *result = serialice_load_wrapper(addr, data_size); -+ return 1; -+ } -+ -+ if (source & READ_FROM_QEMU) { -+ return 0; -+ } -+ -+ /* No source for load, so the source is the script */ -+ return 1; -+} -+ -+// ************************************************************************** -+// memory store handling -+ -+static void serialice_store_wrapper(uint32_t addr, unsigned int size, uint32_t data) -+{ -+ switch (size) { -+ case 1: serialice_writeb((uint8_t)data, addr); break; -+ case 2: serialice_writew((uint16_t)data, addr); break; -+ case 4: serialice_writel((uint32_t)data, addr); break; -+ default: printf("WARNING: unknown write access size %d @%08x\n", size, addr); -+ } -+} -+ -+static void serialice_log_store(int caught, uint32_t addr, uint32_t val, unsigned int data_size) -+{ -+ if (caught) -+ serialice_log(LOG_WRITE|LOG_MEMORY|LOG_TARGET, val, addr, data_size); -+ else -+ serialice_log(LOG_WRITE|LOG_MEMORY, val, addr, data_size); -+} -+ -+/* This function can grab Qemu store ops and forward them to the SerialICE -+ * target -+ * -+ * @return 0: Qemu exclusive or shared; 1: SerialICE exclusive. -+ */ -+ -+int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size) -+{ -+ int write_to_target, write_to_qemu, ret; -+ uint32_t filtered_data = val; -+ -+ ret = serialice_memory_write_filter(addr, data_size, &filtered_data); -+ -+ write_to_target = ((ret & WRITE_TO_SERIALICE) != 0); -+ write_to_qemu = ((ret & WRITE_TO_QEMU) != 0); -+ -+ serialice_log_store(write_to_target, addr, filtered_data, data_size); -+ -+ if (write_to_target) -+ serialice_store_wrapper(addr, data_size, filtered_data); -+ -+ return (write_to_qemu == 0); -+} -+ -+// ************************************************************************** -+// initialization and exit -+ -+void serialice_init(void) -+{ -+ printf("SerialICE: Open connection to target hardware...\n"); -+ -+ if (serialice_device == NULL) { -+ printf("You need to specify a serial device to use SerialICE.\n"); -+ exit(1); -+ } -+ -+ s = qemu_mallocz(sizeof(SerialICEState)); -+#ifdef WIN32 -+ s->fd = CreateFile(serialice_device, GENERIC_READ | GENERIC_WRITE, -+ 0, NULL, OPEN_EXISTING, 0, NULL); -+ -+ if (s->fd == INVALID_HANDLE_VALUE) { -+ perror("SerialICE: Could not connect to target TTY"); -+ exit(1); -+ } -+ -+ DCB dcb; -+ if (!GetCommState(s->fd, &dcb)) { -+ perror("SerialICE: Could not load config for target TTY"); -+ exit(1); -+ } -+ -+ dcb.BaudRate = CBR_115200; -+ dcb.ByteSize = 8; -+ dcb.Parity = NOPARITY; -+ dcb.StopBits = ONESTOPBIT; -+ -+ if (!SetCommState(s->fd, &dcb)) { -+ perror("SerialICE: Could not store config for target TTY"); -+ exit(1); -+ } -+ -+#else -+ s->fd = open(serialice_device, O_RDWR | O_NOCTTY | O_NONBLOCK); -+ -+ if (s->fd == -1) { -+ perror("SerialICE: Could not connect to target TTY"); -+ exit(1); -+ } -+ -+ if (ioctl(s->fd, TIOCEXCL) == -1) { -+ perror("SerialICE: TTY not exclusively available"); -+ exit(1); -+ } -+ -+ if (fcntl(s->fd, F_SETFL, 0) == -1) { -+ perror("SerialICE: Could not switch to blocking I/O"); -+ exit(1); -+ } -+ -+ if (tcgetattr(s->fd, &options) == -1) { -+ perror("SerialICE: Could not get TTY attributes"); -+ exit(1); -+ } -+ -+ cfsetispeed(&options, B115200); -+ cfsetospeed(&options, B115200); -+ -+ /* set raw input, 1 second timeout */ -+ options.c_cflag |= (CLOCAL | CREAD); -+ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); -+ options.c_oflag &= ~OPOST; -+ options.c_iflag |= IGNCR; -+ options.c_cc[VMIN] = 0; -+ options.c_cc[VTIME] = 100; -+ -+ tcsetattr(s->fd, TCSANOW, &options); -+ -+ tcflush(s->fd, TCIOFLUSH); -+#endif -+ -+ s->buffer = qemu_mallocz(BUFFER_SIZE); -+ s->command = qemu_mallocz(BUFFER_SIZE); -+ -+ printf("SerialICE: Waiting for handshake with target... "); -+ -+ /* Trigger a prompt */ -+ serialice_write(s, "\n", 1); -+ -+ /* ... and wait for it to appear */ -+ if (serialice_wait_prompt() == 0) { -+ printf("target alife!\n"); -+ } else { -+ printf("target not ok!\n" ); -+ exit(1); -+ } -+ -+ /* Each serialice_command() waits for a prompt, so trigger one for the -+ * first command, as we consumed the last one for the handshake -+ */ -+ serialice_write(s, "\n", 1); -+ -+ printf("SerialICE: LUA init...\n"); -+ serialice_lua_init(); -+ -+ /* Let the rest of Qemu know we're alife */ -+ serialice_active = 1; -+} -+ -+void serialice_exit(void) -+{ -+ serialice_lua_exit(); -+ qemu_free(s->command); -+ qemu_free(s->buffer); -+ qemu_free(s); -+} -+ -+device_init(serialice_init) -+// no exit function -+ ---- qemu-0.11.0/serialice.h -+++ qemu-0.11.0/serialice.h -@@ -0,0 +1,66 @@ -+/* -+ * QEMU PC System Emulator -+ * -+ * Copyright (c) 2009 coresystems GmbH -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a copy -+ * of this software and associated documentation files (the "Software"), to deal -+ * in the Software without restriction, including without limitation the rights -+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -+ * copies of the Software, and to permit persons to whom the Software is -+ * furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -+ * THE SOFTWARE. -+ */ -+ -+#ifndef SERIALICE_H -+#define SERIALICE_H -+ -+#include "config-host.h" -+ -+extern const char *serialice_device; -+extern int serialice_active; -+ -+void serialice_init(void); -+void serialice_exit(void); -+ -+uint8_t serialice_inb(uint16_t port); -+uint16_t serialice_inw(uint16_t port); -+uint32_t serialice_inl(uint16_t port); -+ -+void serialice_outb(uint8_t data, uint16_t port); -+void serialice_outw(uint16_t data, uint16_t port); -+void serialice_outl(uint32_t data, uint16_t port); -+ -+uint8_t serialice_readb(uint32_t addr); -+uint16_t serialice_readw(uint32_t addr); -+uint32_t serialice_readl(uint32_t addr); -+ -+void serialice_writeb(uint8_t data, uint32_t addr); -+void serialice_writew(uint16_t data, uint32_t addr); -+void serialice_writel(uint32_t data, uint32_t addr); -+ -+uint64_t serialice_rdmsr(uint32_t addr, uint32_t key); -+void serialice_wrmsr(uint64_t data, uint32_t addr, uint32_t key); -+ -+typedef struct { -+ uint32_t eax, ebx, ecx, edx; -+} cpuid_regs_t; -+ -+ -+cpuid_regs_t serialice_cpuid(uint32_t eax, uint32_t ecx); -+ -+int serialice_handle_load(uint32_t addr, uint32_t *result, unsigned int data_size); -+void serialice_log_load(int caught, uint32_t addr, uint32_t result, unsigned int data_size); -+int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size); -+ -+#endif ---- qemu-0.11.0/build.sh -+++ qemu-0.11.0/build.sh -@@ -0,0 +1,5 @@ -+#!/bin/sh -+./configure --disable-kvm --disable-sdl --enable-serialice \ -+ --target-list="x86_64-softmmu, i386-softmmu" -+ -+make ---- qemu-0.11.0/Makefile.target -+++ qemu-0.11.0/Makefile.target -@@ -488,6 +488,13 @@ - # Generic watchdog support and some watchdog devices - obj-y += wdt_ib700.o wdt_i6300esb.o - -+# Generic SerialICE support -+ifdef CONFIG_SERIALICE -+CPPFLAGS += $(CONFIG_SERIALICE_CFLAGS) -+LIBS += $(CONFIG_SERIALICE_LIBS) -+endif -+obj-$(CONFIG_SERIALICE) += serialice.o -+ - # Hardware support - obj-i386-y = ide.o pckbd.o vga.o $(sound-obj-y) dma.o - obj-i386-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o ---- qemu-0.11.0/vl.c -+++ qemu-0.11.0/vl.c -@@ -221,6 +221,9 @@ - int win2k_install_hack = 0; - int rtc_td_hack = 0; - #endif -+#ifdef CONFIG_SERIALICE -+const char *serialice_device = NULL; -+#endif - int usb_enabled = 0; - int singlestep = 0; - int smp_cpus = 1; -@@ -5108,6 +5111,11 @@ - display_type = DT_CURSES; - break; - #endif -+#ifdef CONFIG_SERIALICE -+ case QEMU_OPTION_serialice: -+ serialice_device = optarg; -+ break; -+#endif - case QEMU_OPTION_portrait: - graphic_rotate = 1; - break; ---- qemu-0.11.0/qemu-char.c -+++ qemu-0.11.0/qemu-char.c -@@ -821,7 +821,7 @@ - #endif - - #if defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ -- || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) -+ || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) || defined(__APPLE__) - - typedef struct { - int fd; -@@ -2262,7 +2262,7 @@ - } else - #endif - #if defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ -- || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) -+ || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) || defined(__APPLE__) - if (strstart(filename, "/dev/", NULL)) { - chr = qemu_chr_open_tty(filename); - } else ---- qemu-0.11.0/softmmu_template.h -+++ qemu-0.11.0/softmmu_template.h -@@ -16,6 +16,9 @@ - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ -+ -+#include "serialice.h" -+ - #define DATA_SIZE (1 << SHIFT) - - #if DATA_SIZE == 8 -@@ -91,6 +94,16 @@ - target_phys_addr_t addend; - void *retaddr; - -+#ifdef CONFIG_SERIALICE -+ uint32_t result; -+ int caught = 0; -+ if (serialice_active && serialice_handle_load((uint32_t)addr, &result, (unsigned int) DATA_SIZE)) { -+ res = (DATA_TYPE)result; -+ caught=1; -+ goto leave_ld; -+ } -+#endif -+ - /* test if there is match for unaligned or IO access */ - /* XXX: could done more in memory macro in a non portable way */ - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); -@@ -134,6 +147,12 @@ - tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); - goto redo; - } -+ -+#ifdef CONFIG_SERIALICE -+leave_ld: -+ if (serialice_active) -+ serialice_log_load(caught, addr, (uint32_t)res, (unsigned int)DATA_SIZE); -+#endif - return res; - } - -@@ -234,6 +253,15 @@ - void *retaddr; - int index; - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active && serialice_handle_store((uint32_t)addr, (uint32_t)val, (unsigned int) DATA_SIZE)) { -+ // For now, we just always keep a backup of _all_ writes in qemu's -+ // memory. At this point we can later decide what to do, if it becomes -+ // necessary. -+ // return; -+ } -+#endif -+ - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - redo: - tlb_addr = env->tlb_table[mmu_idx][index].addr_write; ---- qemu-0.11.0/Makefile -+++ qemu-0.11.0/Makefile -@@ -212,6 +212,10 @@ - - bt-host.o: CFLAGS += $(CONFIG_BLUEZ_CFLAGS) - -+serialice.o: serialice.c serialice.h -+ -+serialice.o: CFLAGS += $(CONFIG_SERIALICE_CFLAGS) -+ - libqemu_common.a: $(obj-y) - - ####################################################################### ---- qemu-0.11.0/qemu-options.hx -+++ qemu-0.11.0/qemu-options.hx -@@ -1661,3 +1661,14 @@ - DEF("old-param", 0, QEMU_OPTION_old_param, - "-old-param old param mode\n") - #endif -+ -+#ifdef CONFIG_SERIALICE -+DEF("serialice", HAS_ARG, QEMU_OPTION_serialice, -+ "-serialice dev Enable SerialICE debugging on serial device 'dev'\n") -+STEXI -+@item -serialice @var{dev} -+Enable SerialICE debugging on serial device @var{dev}. -+ETEXI -+#endif -+ -+ ---- qemu-0.11.0/exec-all.h -+++ qemu-0.11.0/exec-all.h -@@ -21,6 +21,7 @@ - #define _EXEC_ALL_H_ - - #include "qemu-common.h" -+#include "serialice.h" - - /* allow to see translation results - the slowdown should be negligible, so we leave it */ - #define DEBUG_DISAS -@@ -328,6 +329,9 @@ - #if defined(TARGET_SPARC) || defined(TARGET_MIPS) - do_unassigned_access(addr, 0, 1, 0, 4); - #else -+#if defined(CONFIG_SERIALICE) -+ if (!serialice_active) -+#endif - cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); - #endif - } ---- qemu-0.11.0/configure -+++ qemu-0.11.0/configure -@@ -193,6 +193,7 @@ - io_thread="no" - nptl="yes" - mixemu="no" -+serialice="no" - bluez="yes" - kvm="no" - kerneldir="" -@@ -491,6 +492,8 @@ - ;; - --enable-mixemu) mixemu="yes" - ;; -+ --enable-serialice) serialice="yes" -+ ;; - --disable-pthread) pthread="no" - ;; - --disable-aio) aio="no" -@@ -624,6 +627,7 @@ - echo " --audio-card-list=LIST set list of emulated audio cards [$audio_card_list]" - echo " Available cards: $audio_possible_cards" - echo " --enable-mixemu enable mixer emulation" -+echo " --enable-serialice enable SerialICE debugger support" - echo " --disable-xen disable xen backend driver support" - echo " --disable-brlapi disable BrlAPI" - echo " --disable-vnc-tls disable TLS encryption for VNC server" -@@ -1064,6 +1068,40 @@ - done - - ########################################## -+# LUA probe -+ -+if test "$serialice" = "yes" ; then -+ serialice=no -+ cat > $TMPC << EOF -+#include <stdint.h> -+#include <lua.h> -+#include <lauxlib.h> -+#include <stdlib.h> -+#include <stdio.h> -+static lua_State *L; -+int main(void) { L=luaL_newstate(); return 0; } -+EOF -+ -+ LUA_CFLAGS="-I/usr/local/include" -+ LUA_LDFLAGS="-L/usr/local/lib -llua" -+ if $cc $EXTRA_CFLAGS $EXTRA_LDFLAGS $ARCH_CFLAGS $LUA_CFLAGS $LUA_LDFLAGS -o $TMPE $TMPC -llua > /dev/null 2> /dev/null ; then -+ serialice=yes -+ else -+ LUA_CFLAGS=`pkg-config --cflags lua` -+ LUA_LDFLAGS=`pkg-config --libs lua` -+ if $cc $EXTRA_CFLAGS $EXTRA_LDFLAGS $ARCH_CFLAGS $LUA_CFLAGS $LUA_LDFLAGS -o $TMPE $TMPC -llua > /dev/null 2> /dev/null ; then -+ serialice=yes -+ else -+ echo -+ echo "Error LUA not found, can't build with SerialICE support." -+ echo -+ exit 1 -+ fi -+ fi -+fi # test "$serialice" -+ -+ -+########################################## - # BrlAPI probe - - if test -z "$brlapi" ; then -@@ -1426,6 +1464,7 @@ - echo "Audio drivers $audio_drv_list" - echo "Extra audio cards $audio_card_list" - echo "Mixer emulation $mixemu" -+echo "SerialICE support $serialice" - echo "VNC TLS support $vnc_tls" - if test "$vnc_tls" = "yes" ; then - echo " TLS CFLAGS $vnc_tls_cflags" -@@ -1620,6 +1659,12 @@ - echo "CONFIG_MIXEMU=y" >> $config_host_mak - echo "#define CONFIG_MIXEMU 1" >> $config_host_h - fi -+if test "$serialice" = "yes" ; then -+ echo "CONFIG_SERIALICE=y" >> $config_host_mak -+ echo "CONFIG_SERIALICE_CFLAGS=$LUA_CFLAGS" >> $config_host_mak -+ echo "CONFIG_SERIALICE_LIBS=$LUA_LDFLAGS" >> $config_host_mak -+ echo "#define CONFIG_SERIALICE 1" >> $config_host_h -+fi - if test "$vnc_tls" = "yes" ; then - echo "CONFIG_VNC_TLS=y" >> $config_host_mak - echo "CONFIG_VNC_TLS_CFLAGS=$vnc_tls_cflags" >> $config_host_mak ---- qemu-0.11.0/target-i386/op_helper.c -+++ qemu-0.11.0/target-i386/op_helper.c -@@ -23,6 +23,7 @@ - - //#define DEBUG_PCALL - -+#include "serialice.h" - - #ifdef DEBUG_PCALL - # define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) -@@ -558,31 +559,64 @@ - - void helper_outb(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outb(data & 0xff, port); -+ return; -+ } -+#endif - cpu_outb(env, port, data & 0xff); - } - - target_ulong helper_inb(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inb(port); -+ } -+#endif - return cpu_inb(env, port); - } - - void helper_outw(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outw(data & 0xffff, port); -+ return; -+ } -+#endif - cpu_outw(env, port, data & 0xffff); - } - - target_ulong helper_inw(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inw(port); -+ } -+#endif - return cpu_inw(env, port); - } - - void helper_outl(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outl(data & 0xffffffff, port); -+ return; -+ } -+#endif - cpu_outl(env, port, data); - } - - target_ulong helper_inl(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inl(port); -+ } -+#endif - return cpu_inl(env, port); - } - -@@ -1940,6 +1974,18 @@ - - helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ cpuid_regs_t ret; -+ ret = serialice_cpuid((uint32_t)EAX, (uint32_t)ECX); -+ EAX = ret.eax; -+ EBX = ret.ebx; -+ ECX = ret.ecx; -+ EDX = ret.edx; -+ return; -+ } -+#endif -+ - cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); - EAX = eax; - EBX = ebx; -@@ -3030,6 +3076,13 @@ - - val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_wrmsr(val, (uint32_t)ECX, (uint32_t)EDI); -+ return; -+ } -+#endif -+ - switch((uint32_t)ECX) { - case MSR_IA32_SYSENTER_CS: - env->sysenter_cs = val & 0xffff; -@@ -3160,6 +3213,15 @@ - - helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ val = serialice_rdmsr((uint32_t)ECX, (uint32_t)EDI); -+ EAX = (uint32_t)(val); -+ EDX = (uint32_t)(val >> 32); -+ return; -+ } -+#endif -+ - switch((uint32_t)ECX) { - case MSR_IA32_SYSENTER_CS: - val = env->sysenter_cs; ---- qemu-0.11.0/hw/pc.c -+++ qemu-0.11.0/hw/pc.c -@@ -23,6 +23,7 @@ - */ - #include "hw.h" - #include "pc.h" -+#include "serialice.h" - #include "fdc.h" - #include "pci.h" - #include "block.h" -@@ -1152,6 +1153,10 @@ - - /* allocate RAM */ - ram_addr = qemu_ram_alloc(0xa0000); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0, 0xa0000, ram_addr); - - /* Allocate, even though we won't register, so we don't break the -@@ -1160,6 +1165,10 @@ - */ - ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); - ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0x100000, - below_4g_mem_size - 0x100000, - ram_addr); -@@ -1170,6 +1179,10 @@ - hw_error("To much RAM for 32-bit physical address"); - #else - ram_addr = qemu_ram_alloc(above_4g_mem_size); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0x100000000ULL, - above_4g_mem_size, - ram_addr); diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff new file mode 100644 index 0000000..86581a7 --- /dev/null +++ b/SerialICE/patches/serialice.lua-5.2.diff @@ -0,0 +1,120 @@ +diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff +index dd10e50..e69de29 100644 +--- a/SerialICE/patches/serialice.lua-5.2.diff ++++ b/SerialICE/patches/serialice.lua-5.2.diff +@@ -1,13 +0,0 @@ +-diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua +-index 0e7e902..947f6a8 100644 +---- a/SerialICE/scripts/serialice.lua +-+++ b/SerialICE/scripts/serialice.lua +-@@ -26,7 +26,7 @@ io.write("SerialICE: Starting LUA script\n") +- +- -- If you get an error here, install bitlib +- -- (ie. http://luaforge.net/projects/bitlib/) +--require("bit") +-+require("bit32") +- +- function printf(s,...) +- return io.write(s:format(...)) +diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua +index 0e7e902..5af8897 100644 +--- a/SerialICE/scripts/serialice.lua ++++ b/SerialICE/scripts/serialice.lua +@@ -111,10 +111,10 @@ mem_write_log_hooks = new_list() + prepend_to_list(mem_read_log_hooks, function(addr, size, data, target) + if (PCIe_bar ~= 0) and addr >= PCIe_bar and addr <= (PCIe_bar + PCIe_size) then + printf("PCIe %x:%02x.%x R.%02x => %s\n", +- bit.band(0xff,bit.rshift(addr, 20)), +- bit.band(0x1f,bit.rshift(addr, 15)), +- bit.band(0x7,bit.rshift(addr, 12)), +- bit.band(0xfff,addr), ++ bit32.band(0xff,bit32.rshift(addr, 20)), ++ bit32.band(0x1f,bit32.rshift(addr, 15)), ++ bit32.band(0x7,bit32.rshift(addr, 12)), ++ bit32.band(0xfff,addr), + size_data(size, data)) + return true + end +@@ -123,10 +123,10 @@ end) + prepend_to_list(mem_write_log_hooks, function(addr, size, data, target) + if (PCIe_bar ~= 0) and addr >= PCIe_bar and addr <= (PCIe_bar + PCIe_size) then + printf("PCIe %x:%02x.%x R.%02x <= %s\n", +- bit.band(0xff,bit.rshift(addr, 20)), +- bit.band(0x1f,bit.rshift(addr, 15)), +- bit.band(0x7,bit.rshift(addr, 12)), +- bit.band(0xfff,addr), ++ bit32.band(0xff,bit32.rshift(addr, 20)), ++ bit32.band(0x1f,bit32.rshift(addr, 15)), ++ bit32.band(0x7,bit32.rshift(addr, 12)), ++ bit32.band(0xfff,addr), + size_data(size, data)) + return true + end +@@ -145,10 +145,10 @@ prepend_to_list(io_write_log_hooks, function(port, size, data, target) + end + if port >= 0xcfc and port <= 0xcff then + printf("PCI %x:%02x.%x R.%02x <= %s\n", +- bit.band(0xff,bit.rshift(SerialICE_pci_device, 16)), +- bit.band(0x1f,bit.rshift(SerialICE_pci_device, 11)), +- bit.band(0x7,bit.rshift(SerialICE_pci_device, 8)), +- bit.band(0xff,SerialICE_pci_device + (port - 0xcfc)), ++ bit32.band(0xff,bit32.rshift(SerialICE_pci_device, 16)), ++ bit32.band(0x1f,bit32.rshift(SerialICE_pci_device, 11)), ++ bit32.band(0x7,bit32.rshift(SerialICE_pci_device, 8)), ++ bit32.band(0xff,SerialICE_pci_device + (port - 0xcfc)), + size_data(size, data)) + return true + end +@@ -160,10 +160,10 @@ prepend_to_list(io_read_log_hooks, function(port, size, data, target) + end + if port >= 0xcfc and port <= 0xcff then + printf("PCI %x:%02x.%x R.%02x => %s\n", +- bit.band(0xff,bit.rshift(SerialICE_pci_device, 16)), +- bit.band(0x1f,bit.rshift(SerialICE_pci_device, 11)), +- bit.band(0x7,bit.rshift(SerialICE_pci_device, 8)), +- bit.band(0xff,SerialICE_pci_device + (port - 0xcfc)), ++ bit32.band(0xff,bit32.rshift(SerialICE_pci_device, 16)), ++ bit32.band(0x1f,bit32.rshift(SerialICE_pci_device, 11)), ++ bit32.band(0x7,bit32.rshift(SerialICE_pci_device, 8)), ++ bit32.band(0xff,SerialICE_pci_device + (port - 0xcfc)), + size_data(size, data)) + return true + end +@@ -182,14 +182,14 @@ function(addr, hi, lo, filtered) + elseif mt == 6 then memtype = "Write-Back" + else memtype = "Unknown" + end +- printf("CPU: Set MTRR %x base to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xffffff00), memtype) ++ printf("CPU: Set MTRR %x base to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit32.band(lo, 0xffffff00), memtype) + else +- if bit.band(lo, 0x800) == 0x800 then ++ if bit32.band(lo, 0x800) == 0x800 then + valid = "valid" + else + valid = "disabled" + end +- printf("CPU: Set MTRR %x mask to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xfffff000), valid) ++ printf("CPU: Set MTRR %x mask to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit32.band(lo, 0xfffff000), valid) + end + return true + end +@@ -207,7 +207,7 @@ if northbridge == "intel-i945" then + if port == 0xcfc then + -- Catch PCIe base address + if SerialICE_pci_device == pci_bdf(0,0,0,0x48) then +- PCIe_bar = bit.band(0xfc000000,data) % 0x100000000 ++ PCIe_bar = bit32.band(0xfc000000,data) % 0x100000000 + PCIe_size = 64 * 1024 -- hard coded for now. + printf("PCIe BAR set up: 0x%08x\n", PCIe_bar) + return true +@@ -651,8 +651,8 @@ function SerialICE_cpuid_filter(in_eax, in_ecx, eax, ebx, ecx, edx) + -- Set number of cores to 1 on Core Duo and Atom to trick the + -- firmware into not trying to wake up non-BSP nodes. + if in_eax == 1 then +- ebx = bit.band(0xff00ffff, ebx); +- ebx = bit.bor(0x00010000, ebx); ++ ebx = bit32.band(0xff00ffff, ebx); ++ ebx = bit32.bor(0x00010000, ebx); + return true, eax, ebx, ecx, edx + end +

1 0

Patch set updated for serialice: 2b3c7cc Update to Lua 5.2.0
by Idwer Vollering 16 Aug '12

16 Aug '12

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1100 -gerrit commit 2b3c7cc52b3caa3b7a0e67f1685fc900787f6146 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Thu Aug 16 22:51:43 2012 +0200 Update to Lua 5.2.0 Update SerialICE to be able to use Lua 5.2.0 Drop serialice-qemu-0.11.0.diff while we're at it. lua-5.2.0-shared.diff is (C) 2012 by Kyösti Mälkki. Change-Id: I73ad1c61c4399a552c7fa3844049a98d4ac27470 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/patches/lua-5.2.0-intsize.diff | 20 + SerialICE/patches/lua-5.2.0-shared.diff | 42 + SerialICE/patches/lua-5.2.0-x64-fix.diff | 12 + SerialICE/patches/serialice-qemu-0.11.0.diff | 1453 -------------------------- SerialICE/patches/serialice.lua-5.2.diff | 13 + 5 files changed, 87 insertions(+), 1453 deletions(-) diff --git a/SerialICE/patches/lua-5.2.0-intsize.diff b/SerialICE/patches/lua-5.2.0-intsize.diff new file mode 100644 index 0000000..e29ffae --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-intsize.diff @@ -0,0 +1,20 @@ +diff -ur lua-5.2.0/src/luaconf.h lua-5.2.0-shared/src/luaconf.h +--- lua-5.2.0/src/luaconf.h 2011-12-06 17:58:36.000000000 +0100 ++++ lua-5.2.0-shared/src/luaconf.h 2012-06-12 22:25:20.179943819 +0200 +@@ -10,6 +10,7 @@ + + #include <limits.h> + #include <stddef.h> ++#include <stdint.h> + + + /* +@@ -444,7 +445,7 @@ + ** CHANGE that if ptrdiff_t is not adequate on your machine. (On most + ** machines, ptrdiff_t gives a good choice between int or long.) + */ +-#define LUA_INTEGER ptrdiff_t ++#define LUA_INTEGER int64_t + + /* + @@ LUA_UNSIGNED is the integral type used by lua_pushunsigned/lua_tounsigned. diff --git a/SerialICE/patches/lua-5.2.0-shared.diff b/SerialICE/patches/lua-5.2.0-shared.diff new file mode 100644 index 0000000..465adf2 --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-shared.diff @@ -0,0 +1,42 @@ +diff -ur lua-5.2.0/Makefile lua-5.2.0-shared/Makefile +--- lua-5.2.0/Makefile 2011-11-16 00:38:12.000000000 +0100 ++++ lua-5.2.0-shared/Makefile 2012-06-12 21:42:25.953250340 +0200 +@@ -41,7 +41,7 @@ + # What to install. + TO_BIN= lua luac + TO_INC= lua.h luaconf.h lualib.h lauxlib.h lua.hpp +-TO_LIB= liblua.a ++TO_LIB= liblua.a liblua.so + TO_MAN= lua.1 luac.1 + + # Lua version and release. +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 21:44:17.476584177 +0200 +@@ -29,6 +29,7 @@ + PLATS= aix ansi bsd freebsd generic linux macosx mingw posix solaris + + LUA_A= liblua.a ++LUA_SO= liblua.so + CORE_O= lapi.o lcode.o lctype.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o \ + lmem.o lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o \ + ltm.o lundump.o lvm.o lzio.o +@@ -43,7 +44,7 @@ + LUAC_O= luac.o + + ALL_O= $(BASE_O) $(LUA_O) $(LUAC_O) +-ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) ++ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) $(LUA_SO) + ALL_A= $(LUA_A) + + # Targets start here. +@@ -59,6 +60,9 @@ + $(AR) $@ $? + $(RANLIB) $@ + ++$(LUA_SO): $(CORE_O) $(LIB_O) ++ $(CC) -o $@ -shared $? ++ + $(LUA_T): $(LUA_O) $(LUA_A) + $(CC) -o $@ $(LDFLAGS) $(LUA_O) $(LUA_A) $(LIBS) + diff --git a/SerialICE/patches/lua-5.2.0-x64-fix.diff b/SerialICE/patches/lua-5.2.0-x64-fix.diff new file mode 100644 index 0000000..d649f7a --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-x64-fix.diff @@ -0,0 +1,12 @@ +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 22:24:16.973276561 +0200 +@@ -103,7 +103,7 @@ + generic: $(ALL) + + linux: +- $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" ++ $(MAKE) $(ALL) SYSCFLAGS="-fPIC -DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" + + macosx: + $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_MACOSX" SYSLIBS="-lreadline" diff --git a/SerialICE/patches/serialice-qemu-0.11.0.diff b/SerialICE/patches/serialice-qemu-0.11.0.diff deleted file mode 100644 index 58268a7..0000000 --- a/SerialICE/patches/serialice-qemu-0.11.0.diff +++ /dev/null @@ -1,1453 +0,0 @@ - -QEMU 0.11.0 SerialICE patch - -Adds SerialICE firmware debugger support to Qemu. - -Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> - - Makefile | 4 - Makefile.target | 7 - build.sh | 5 - configure | 45 ++ - exec-all.h | 4 - hw/pc.c | 13 - qemu-char.c | 4 - qemu-options.hx | 11 - serialice.c | 927 ++++++++++++++++++++++++++++++++++++++++++++++++ - serialice.h | 66 +++ - softmmu_template.h | 28 + - target-i386/op_helper.c | 62 +++ - vl.c | 8 - 13 files changed, 1182 insertions(+), 2 deletions(-) - ---- qemu-0.11.0/serialice.c -+++ qemu-0.11.0/serialice.c -@@ -0,0 +1,927 @@ -+/* -+ * QEMU PC System Emulator -+ * -+ * Copyright (c) 2009 coresystems GmbH -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a copy -+ * of this software and associated documentation files (the "Software"), to deal -+ * in the Software without restriction, including without limitation the rights -+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -+ * copies of the Software, and to permit persons to whom the Software is -+ * furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -+ * THE SOFTWARE. -+ */ -+ -+/* System includes */ -+#include <stdlib.h> -+#include <stdio.h> -+#include <stdint.h> -+#include <unistd.h> -+#include <string.h> -+#ifdef WIN32 -+#include <windows.h> -+#include <conio.h> -+#else -+#include <fcntl.h> -+#include <termios.h> -+#include <sys/ioctl.h> -+#endif -+ -+/* LUA includes */ -+#include <lua.h> -+#include <lauxlib.h> -+#include <lualib.h> -+ -+/* Local includes */ -+#include "hw/hw.h" -+#include "hw/pc.h" -+#include "serialice.h" -+#include "sysemu.h" -+ -+#define SERIALICE_DEBUG 3 -+#define BUFFER_SIZE 1024 -+typedef struct { -+#ifdef WIN32 -+ HANDLE fd; -+#else -+ int fd; -+#endif -+ char *buffer; -+ char *command; -+} SerialICEState; -+ -+static SerialICEState *s; -+ -+int serialice_active = 0; -+const char *serialice_lua_script="serialice.lua"; -+ -+#ifndef WIN32 -+static struct termios options; -+#endif -+ -+static lua_State *L; -+ -+// ************************************************************************** -+// LUA scripting interface and callbacks -+ -+static int serialice_register_physical(lua_State *luastate) -+{ -+ int n = lua_gettop(luastate); -+ uint32_t addr, size; -+ ram_addr_t phys; -+ -+ if (n != 2) { -+ fprintf(stderr, "ERROR: Not called as SerialICE_register_physical(<addr> <size>)\n"); -+ return 0; -+ } -+ -+ addr = lua_tointeger(luastate, 1); -+ size = lua_tointeger(luastate, 2); -+ -+ printf("Registering physical memory at 0x%08x (0x%08x bytes)\n", addr, size); -+ phys = qemu_ram_alloc(size); -+ cpu_register_physical_memory(addr, size, phys); -+ -+ return 0; -+} -+ -+static int serialice_lua_init(void) -+{ -+ int status; -+ -+ /* Create a LUA context and load LUA libraries */ -+ L = luaL_newstate(); -+ luaL_openlibs(L); -+ -+ /* Register C function callbacks */ -+ lua_register(L, "SerialICE_register_physical", serialice_register_physical); -+ -+ /* Load the script file */ -+ status = luaL_loadfile(L, serialice_lua_script); -+ if (status) { -+ fprintf(stderr, "Couldn't load SerialICE script: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ /* Ask Lua to run our little script */ -+ status = lua_pcall(L, 0, 1, 0); -+ if (status) { -+ fprintf(stderr, "Failed to run script: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ lua_pop(L, 1); -+ -+ return 0; -+} -+ -+static int serialice_lua_exit(void) -+{ -+ lua_close(L); -+ return 0; -+} -+ -+static int serialice_io_read_filter(uint32_t *data, uint16_t port, int size) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_read_filter"); -+ lua_pushinteger(L, port); // port -+ lua_pushinteger(L, size); // datasize -+ result = lua_pcall(L, 2, 2, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_io_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ ret = lua_toboolean(L, -2); -+ lua_pop(L, 2); -+ -+ return ret; -+} -+ -+static int serialice_io_write_filter(uint32_t *data, uint16_t port, int size) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_write_filter"); -+ lua_pushinteger(L, port); // port -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, *data); // data -+ -+ result = lua_pcall(L, 3, 2, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_io_write_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ ret = lua_toboolean(L, -2); -+ lua_pop(L, 2); -+ -+ return ret; -+} -+ -+ -+#define READ_FROM_QEMU (1 << 0) -+#define READ_FROM_SERIALICE (1 << 1) -+static int serialice_memory_read_filter(uint32_t addr, uint32_t *data, int size) -+{ -+ int ret = 0, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_read_filter"); -+ lua_pushinteger(L, addr); // addr -+ lua_pushinteger(L, size); // datasize -+ result = lua_pcall(L, 2, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_memory_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ *data = lua_tointeger(L, -1); // result -+ -+ ret |= lua_toboolean(L, -2) ? READ_FROM_QEMU : 0; // to_qemu -+ ret |= lua_toboolean(L, -3) ? READ_FROM_SERIALICE : 0; // to_hw -+ -+ lua_pop(L, 3); -+ -+ return ret; -+} -+ -+#define WRITE_TO_QEMU (1 << 0) -+#define WRITE_TO_SERIALICE (1 << 1) -+ -+static int serialice_memory_write_filter(uint32_t addr, int size, uint32_t *data) -+{ -+ int ret = 0, result; -+ int write_to_qemu, write_to_serialice; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_write_filter"); -+ lua_pushinteger(L, addr); // address -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, *data); // data -+ result = lua_pcall(L, 3, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_memory_write_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ *data = lua_tointeger(L, -1); -+ write_to_qemu = lua_toboolean(L, -2); -+ write_to_serialice = lua_toboolean(L, -3); -+ lua_pop(L, 3); -+ -+ ret |= write_to_qemu ? WRITE_TO_QEMU : 0; -+ ret |= write_to_serialice ? WRITE_TO_SERIALICE : 0; -+ -+ return ret; -+} -+ -+#define FILTER_READ 0 -+#define FILTER_WRITE 1 -+ -+static int serialice_msr_filter(int flags, uint32_t addr, uint32_t *hi, uint32_t *lo) -+{ -+ int ret, result; -+ -+ if (flags & FILTER_WRITE) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_write_filter"); -+ else -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_read_filter"); -+ -+ lua_pushinteger(L, addr); // port -+ lua_pushinteger(L, *hi); // high -+ lua_pushinteger(L, *lo); // low -+ result = lua_pcall(L, 3, 3, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ ret = lua_toboolean(L, -3); -+ if (ret) { -+ *hi = lua_tointeger(L, -1); -+ *lo = lua_tointeger(L, -2); -+ } -+ lua_pop(L, 3); -+ -+ return ret; -+} -+ -+static int serialice_cpuid_filter(cpuid_regs_t *regs) -+{ -+ int ret, result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_cpuid_filter"); -+ -+ lua_pushinteger(L, regs->eax); // eax -+ lua_pushinteger(L, regs->ecx); // ecx -+ result = lua_pcall(L, 2, 5, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_read_filter: %s\n", lua_tostring(L, -1)); -+ exit(1); -+ } -+ -+ ret = lua_toboolean(L, -5); -+ if (ret) { -+ regs->eax = lua_tointeger(L, -1); -+ regs->ebx = lua_tointeger(L, -2); -+ regs->ecx = lua_tointeger(L, -3); -+ regs->edx = lua_tointeger(L, -4); -+ } -+ lua_pop(L, 5); -+ -+ return ret; -+} -+ -+ -+/* SerialICE output loggers */ -+ -+#define LOG_IO 0 -+#define LOG_MEMORY 1 -+#define LOG_READ 0 -+#define LOG_WRITE 2 -+// these two are separate -+#define LOG_QEMU 4 -+#define LOG_TARGET 8 -+ -+static void serialice_log(int flags, uint32_t data, uint32_t addr, int size) -+{ -+ int result; -+ -+ if ((flags & LOG_WRITE) && (flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_write_log"); -+ else if (!(flags & LOG_WRITE) && (flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_memory_read_log"); -+ else if ((flags & LOG_WRITE) && !(flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_write_log"); -+ else // if (!(flags & LOG_WRITE) && !(flags & LOG_MEMORY)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_io_read_log"); -+ -+ lua_pushinteger(L, addr); // addr/port -+ lua_pushinteger(L, size); // datasize -+ lua_pushinteger(L, data); // data -+ lua_pushboolean(L, ((flags & LOG_TARGET) != 0)); -+ -+ result = lua_pcall(L, 4, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_%s_%s_log: %s\n", -+ (flags & LOG_MEMORY)?"memory":"io", -+ (flags & LOG_WRITE)?"write":"read", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+static void serialice_msr_log(int flags, uint32_t addr, uint32_t hi, uint32_t lo, int filtered) -+{ -+ int result; -+ -+ if (flags & LOG_WRITE) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_write_log"); -+ else // if (!(flags & LOG_WRITE)) -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_msr_read_log"); -+ -+ lua_pushinteger(L, addr); // addr/port -+ lua_pushinteger(L, hi); // datasize -+ lua_pushinteger(L, lo); // data -+ lua_pushboolean(L, filtered); // data -+ result = lua_pcall(L, 4, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_msr_%s_log: %s\n", -+ (flags & LOG_WRITE)?"write":"read", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+static void serialice_cpuid_log(uint32_t eax, uint32_t ecx, cpuid_regs_t res, int filtered) -+{ -+ int result; -+ -+ lua_getfield(L, LUA_GLOBALSINDEX, "SerialICE_cpuid_log"); -+ -+ lua_pushinteger(L, eax); // input: eax -+ lua_pushinteger(L, ecx); // input: ecx -+ lua_pushinteger(L, res.eax); // output: eax -+ lua_pushinteger(L, res.ebx); // output: ebx -+ lua_pushinteger(L, res.ecx); // output: ecx -+ lua_pushinteger(L, res.edx); // output: edx -+ lua_pushboolean(L, filtered); // data -+ result = lua_pcall(L, 7, 0, 0); -+ if (result) { -+ fprintf(stderr, "Failed to run function SerialICE_cpuid_log: %s\n", -+ lua_tostring(L, -1)); -+ exit(1); -+ } -+} -+ -+ -+// ************************************************************************** -+// low level communication with the SerialICE shell (serial communication) -+ -+static int serialice_read(SerialICEState *state, void *buf, size_t nbyte) -+{ -+ int bytes_read = 0; -+ -+ while (1) { -+#ifdef WIN32 -+ int ret = 0; -+ ReadFile(state->fd, buf, nbyte - bytes_read, &ret, NULL); -+ if (!ret) -+ break; -+#else -+ int ret = read(state->fd, buf, nbyte - bytes_read); -+ -+ if (ret == -1 && errno == EINTR) -+ continue; -+ -+ if (ret == -1) -+ break; -+#endif -+ -+ bytes_read += ret; -+ buf += ret; -+ -+ if (bytes_read >= (int)nbyte) -+ break; -+ } -+ -+ return bytes_read; -+} -+ -+static int serialice_write(SerialICEState *state, const void *buf, size_t nbyte) -+{ -+ char *buffer = (char *) buf; -+ char c; -+ int i; -+ -+ for (i = 0; i < (int)nbyte; i++) { -+#ifdef WIN32 -+ int ret = 0; -+ while (ret == 0) -+ WriteFile(state->fd, buffer + i, 1, &ret, NULL); -+ ret = 0; -+ while (ret == 0) -+ ReadFile(state->fd, &c, 1, &ret, NULL); -+#else -+ while (write(state->fd, buffer + i, 1) != 1) ; -+ while (read(state->fd, &c, 1) != 1) ; -+#endif -+ if (c != buffer[i]) { -+ printf("Readback error! %x/%x\n", c, buffer[i]); -+ } -+ } -+ -+ return nbyte; -+} -+ -+static int serialice_wait_prompt(void) -+{ -+ char buf[3]; -+ int l; -+ -+ l = serialice_read(s, buf, 3); -+ -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ -+ while (buf[0] != '\n' || buf[1] != '>' || buf[2] != ' ') { -+ buf[0] = buf[1]; -+ buf[1] = buf[2]; -+ l = serialice_read(s, buf + 2, 1); -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ } -+ -+ return 0; -+} -+ -+static void serialice_command(const char *command, int reply_len) -+{ -+#if SERIALICE_DEBUG > 5 -+ int i; -+#endif -+ int l; -+ -+ serialice_wait_prompt(); -+ -+ serialice_write(s, command, strlen(command)); -+ -+ memset(s->buffer, 0, reply_len + 1); // clear enough of the buffer -+ -+ l = serialice_read(s, s->buffer, reply_len); -+ -+ if (l == -1) { -+ perror("SerialICE: Could not read from target"); -+ exit(1); -+ } -+ -+ // compensate for CR on the wire. Needed on Win32 -+ if (s->buffer[0] == '\r') { -+ memmove(s->buffer, s->buffer+1, reply_len); -+ serialice_read(s, s->buffer+reply_len-1, 1); -+ } -+ -+ if (l != reply_len) { -+ printf("SerialICE: command was not answered sufficiently: " -+ "(%d/%d bytes)\n'%s'\n", l, reply_len, s->buffer); -+ exit(1); -+ } -+ -+#if SERIALICE_DEBUG > 5 -+ for (i=0; i < reply_len; i++) -+ printf("%02x ", s->buffer[i]); -+ printf("\n"); -+#endif -+} -+ -+ -+// ************************************************************************** -+// high level communication with the SerialICE shell -+ -+uint8_t serialice_inb(uint16_t port) -+{ -+ uint8_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data & 0xff; -+ -+ sprintf(s->command, "*ri%04x.b", port); -+ // command read back: "\n00" (3 characters) -+ serialice_command(s->command, 3); -+ ret = (uint8_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 1); -+ -+ return ret; -+} -+ -+uint16_t serialice_inw(uint16_t port) -+{ -+ uint16_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data & 0xffff; -+ -+ sprintf(s->command, "*ri%04x.w", port); -+ // command read back: "\n0000" (5 characters) -+ serialice_command(s->command, 5); -+ ret = (uint16_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 2); -+ -+ return ret; -+} -+ -+uint32_t serialice_inl(uint16_t port) -+{ -+ uint32_t ret; -+ uint32_t data; -+ -+ if (serialice_io_read_filter(&data, port, 1)) -+ return data; -+ -+ sprintf(s->command, "*ri%04x.l", port); -+ // command read back: "\n00000000" (9 characters) -+ serialice_command(s->command, 9); -+ ret = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ -+ serialice_log(LOG_READ|LOG_IO, ret, port, 4); -+ -+ return ret; -+} -+ -+void serialice_outb(uint8_t data, uint16_t port) -+{ -+ uint32_t filtered_data = (uint32_t)data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 1); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 1)) { -+ return; -+ } -+ -+ data = (uint8_t)filtered_data; -+ sprintf(s->command, "*wi%04x.b=%02x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_outw(uint16_t data, uint16_t port) -+{ -+ uint32_t filtered_data = (uint32_t)data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 2); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 2)) { -+ return; -+ } -+ -+ data = (uint16_t)filtered_data; -+ sprintf(s->command, "*wi%04x.w=%04x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_outl(uint32_t data, uint16_t port) -+{ -+ uint32_t filtered_data = data; -+ -+ serialice_log(LOG_WRITE|LOG_IO, data, port, 4); -+ -+ if (serialice_io_write_filter(&filtered_data, port, 4)) { -+ return; -+ } -+ -+ data = filtered_data; -+ sprintf(s->command, "*wi%04x.l=%08x", port, data); -+ serialice_command(s->command, 0); -+} -+ -+uint8_t serialice_readb(uint32_t addr) -+{ -+ uint8_t ret; -+ sprintf(s->command, "*rm%08x.b", addr); -+ // command read back: "\n00" (3 characters) -+ serialice_command(s->command, 3); -+ ret = (uint8_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+uint16_t serialice_readw(uint32_t addr) -+{ -+ uint16_t ret; -+ sprintf(s->command, "*rm%08x.w", addr); -+ // command read back: "\n0000" (5 characters) -+ serialice_command(s->command, 5); -+ ret = (uint16_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+uint32_t serialice_readl(uint32_t addr) -+{ -+ uint32_t ret; -+ sprintf(s->command, "*rm%08x.l", addr); -+ // command read back: "\n00000000" (9 characters) -+ serialice_command(s->command, 9); -+ ret = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ return ret; -+} -+ -+void serialice_writeb(uint8_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.b=%02x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_writew(uint16_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.w=%04x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+void serialice_writel(uint32_t data, uint32_t addr) -+{ -+ sprintf(s->command, "*wm%08x.l=%08x", addr, data); -+ serialice_command(s->command, 0); -+} -+ -+uint64_t serialice_rdmsr(uint32_t addr, uint32_t key) -+{ -+ uint32_t hi, lo; -+ uint64_t ret; -+ int filtered; -+ -+ filtered = serialice_msr_filter(FILTER_READ, addr, &hi, &lo); -+ if (!filtered) { -+ sprintf(s->command, "*rc%08x.%08x", addr, key); -+ -+ // command read back: "\n00000000.00000000" (18 characters) -+ serialice_command(s->command, 18); -+ -+ s->buffer[9] = 0; // . -> \0 -+ hi = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ lo = (uint32_t)strtoul(s->buffer + 10, (char **)NULL, 16); -+ } -+ -+ ret = hi; -+ ret <<= 32; -+ ret |= lo; -+ -+ serialice_msr_log(LOG_READ, addr, hi, lo, filtered); -+ -+ return ret; -+} -+ -+void serialice_wrmsr(uint64_t data, uint32_t addr, uint32_t key) -+{ -+ uint32_t hi, lo; -+ int filtered; -+ -+ hi = (data >> 32); -+ lo = (data & 0xffffffff); -+ -+ filtered = serialice_msr_filter(FILTER_WRITE, addr, &hi, &lo); -+ -+ if (!filtered) { -+ sprintf(s->command, "*wc%08x.%08x=%08x.%08x", addr, key, hi, lo); -+ serialice_command(s->command, 0); -+ } -+ -+ serialice_msr_log(LOG_WRITE, addr, hi, lo, filtered); -+} -+ -+cpuid_regs_t serialice_cpuid(uint32_t eax, uint32_t ecx) -+{ -+ cpuid_regs_t ret; -+ int filtered; -+ -+ ret.eax = eax; -+ ret.ebx = 0; // either set by filter or by target -+ ret.ecx = ecx; -+ ret.edx = 0; // either set by filter or by target -+ -+ filtered = serialice_cpuid_filter(&ret); -+ if (!filtered) { -+ sprintf(s->command, "*ci%08x.%08x", eax, ecx); -+ -+ // command read back: "\n000006f2.00000000.00001234.12340324" -+ // (36 characters) -+ serialice_command(s->command, 36); -+ -+ s->buffer[9] = 0; // . -> \0 -+ s->buffer[18] = 0; // . -> \0 -+ s->buffer[27] = 0; // . -> \0 -+ ret.eax = (uint32_t)strtoul(s->buffer + 1, (char **)NULL, 16); -+ ret.ebx = (uint32_t)strtoul(s->buffer + 10, (char **)NULL, 16); -+ ret.ecx = (uint32_t)strtoul(s->buffer + 19, (char **)NULL, 16); -+ ret.edx = (uint32_t)strtoul(s->buffer + 28, (char **)NULL, 16); -+ } -+ -+ serialice_cpuid_log(eax, ecx, ret, filtered); -+ -+ return ret; -+} -+ -+// ************************************************************************** -+// memory load handling -+ -+static uint32_t serialice_load_wrapper(uint32_t addr, unsigned int size) -+{ -+ switch (size) { -+ case 1: return (uint32_t)serialice_readb(addr); -+ case 2: return (uint32_t)serialice_readw(addr); -+ case 4: return (uint32_t)serialice_readl(addr); -+ default: printf("WARNING: unknown read access size %d @%08x\n", size, addr); -+ } -+ return 0; -+} -+ -+/** -+ * This function is called by the softmmu engine to update the status -+ * of a load cycle -+ */ -+void serialice_log_load(int caught, uint32_t addr, uint32_t result, unsigned int data_size) -+{ -+ if (caught) -+ serialice_log(LOG_READ|LOG_MEMORY|LOG_TARGET, result, addr, data_size); -+ else -+ serialice_log(LOG_READ|LOG_MEMORY, result, addr, data_size); -+} -+ -+/* This function can grab Qemu load ops and forward them to the SerialICE -+ * target. -+ * -+ * @return 0: pass on to Qemu; 1: handled locally. -+ */ -+int serialice_handle_load(uint32_t addr, uint32_t *result, unsigned int data_size) -+{ -+ int source; -+ -+ source = serialice_memory_read_filter(addr, result, data_size); -+ -+ if (source & READ_FROM_SERIALICE) { -+ *result = serialice_load_wrapper(addr, data_size); -+ return 1; -+ } -+ -+ if (source & READ_FROM_QEMU) { -+ return 0; -+ } -+ -+ /* No source for load, so the source is the script */ -+ return 1; -+} -+ -+// ************************************************************************** -+// memory store handling -+ -+static void serialice_store_wrapper(uint32_t addr, unsigned int size, uint32_t data) -+{ -+ switch (size) { -+ case 1: serialice_writeb((uint8_t)data, addr); break; -+ case 2: serialice_writew((uint16_t)data, addr); break; -+ case 4: serialice_writel((uint32_t)data, addr); break; -+ default: printf("WARNING: unknown write access size %d @%08x\n", size, addr); -+ } -+} -+ -+static void serialice_log_store(int caught, uint32_t addr, uint32_t val, unsigned int data_size) -+{ -+ if (caught) -+ serialice_log(LOG_WRITE|LOG_MEMORY|LOG_TARGET, val, addr, data_size); -+ else -+ serialice_log(LOG_WRITE|LOG_MEMORY, val, addr, data_size); -+} -+ -+/* This function can grab Qemu store ops and forward them to the SerialICE -+ * target -+ * -+ * @return 0: Qemu exclusive or shared; 1: SerialICE exclusive. -+ */ -+ -+int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size) -+{ -+ int write_to_target, write_to_qemu, ret; -+ uint32_t filtered_data = val; -+ -+ ret = serialice_memory_write_filter(addr, data_size, &filtered_data); -+ -+ write_to_target = ((ret & WRITE_TO_SERIALICE) != 0); -+ write_to_qemu = ((ret & WRITE_TO_QEMU) != 0); -+ -+ serialice_log_store(write_to_target, addr, filtered_data, data_size); -+ -+ if (write_to_target) -+ serialice_store_wrapper(addr, data_size, filtered_data); -+ -+ return (write_to_qemu == 0); -+} -+ -+// ************************************************************************** -+// initialization and exit -+ -+void serialice_init(void) -+{ -+ printf("SerialICE: Open connection to target hardware...\n"); -+ -+ if (serialice_device == NULL) { -+ printf("You need to specify a serial device to use SerialICE.\n"); -+ exit(1); -+ } -+ -+ s = qemu_mallocz(sizeof(SerialICEState)); -+#ifdef WIN32 -+ s->fd = CreateFile(serialice_device, GENERIC_READ | GENERIC_WRITE, -+ 0, NULL, OPEN_EXISTING, 0, NULL); -+ -+ if (s->fd == INVALID_HANDLE_VALUE) { -+ perror("SerialICE: Could not connect to target TTY"); -+ exit(1); -+ } -+ -+ DCB dcb; -+ if (!GetCommState(s->fd, &dcb)) { -+ perror("SerialICE: Could not load config for target TTY"); -+ exit(1); -+ } -+ -+ dcb.BaudRate = CBR_115200; -+ dcb.ByteSize = 8; -+ dcb.Parity = NOPARITY; -+ dcb.StopBits = ONESTOPBIT; -+ -+ if (!SetCommState(s->fd, &dcb)) { -+ perror("SerialICE: Could not store config for target TTY"); -+ exit(1); -+ } -+ -+#else -+ s->fd = open(serialice_device, O_RDWR | O_NOCTTY | O_NONBLOCK); -+ -+ if (s->fd == -1) { -+ perror("SerialICE: Could not connect to target TTY"); -+ exit(1); -+ } -+ -+ if (ioctl(s->fd, TIOCEXCL) == -1) { -+ perror("SerialICE: TTY not exclusively available"); -+ exit(1); -+ } -+ -+ if (fcntl(s->fd, F_SETFL, 0) == -1) { -+ perror("SerialICE: Could not switch to blocking I/O"); -+ exit(1); -+ } -+ -+ if (tcgetattr(s->fd, &options) == -1) { -+ perror("SerialICE: Could not get TTY attributes"); -+ exit(1); -+ } -+ -+ cfsetispeed(&options, B115200); -+ cfsetospeed(&options, B115200); -+ -+ /* set raw input, 1 second timeout */ -+ options.c_cflag |= (CLOCAL | CREAD); -+ options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); -+ options.c_oflag &= ~OPOST; -+ options.c_iflag |= IGNCR; -+ options.c_cc[VMIN] = 0; -+ options.c_cc[VTIME] = 100; -+ -+ tcsetattr(s->fd, TCSANOW, &options); -+ -+ tcflush(s->fd, TCIOFLUSH); -+#endif -+ -+ s->buffer = qemu_mallocz(BUFFER_SIZE); -+ s->command = qemu_mallocz(BUFFER_SIZE); -+ -+ printf("SerialICE: Waiting for handshake with target... "); -+ -+ /* Trigger a prompt */ -+ serialice_write(s, "\n", 1); -+ -+ /* ... and wait for it to appear */ -+ if (serialice_wait_prompt() == 0) { -+ printf("target alife!\n"); -+ } else { -+ printf("target not ok!\n" ); -+ exit(1); -+ } -+ -+ /* Each serialice_command() waits for a prompt, so trigger one for the -+ * first command, as we consumed the last one for the handshake -+ */ -+ serialice_write(s, "\n", 1); -+ -+ printf("SerialICE: LUA init...\n"); -+ serialice_lua_init(); -+ -+ /* Let the rest of Qemu know we're alife */ -+ serialice_active = 1; -+} -+ -+void serialice_exit(void) -+{ -+ serialice_lua_exit(); -+ qemu_free(s->command); -+ qemu_free(s->buffer); -+ qemu_free(s); -+} -+ -+device_init(serialice_init) -+// no exit function -+ ---- qemu-0.11.0/serialice.h -+++ qemu-0.11.0/serialice.h -@@ -0,0 +1,66 @@ -+/* -+ * QEMU PC System Emulator -+ * -+ * Copyright (c) 2009 coresystems GmbH -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a copy -+ * of this software and associated documentation files (the "Software"), to deal -+ * in the Software without restriction, including without limitation the rights -+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -+ * copies of the Software, and to permit persons to whom the Software is -+ * furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included in -+ * all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -+ * THE SOFTWARE. -+ */ -+ -+#ifndef SERIALICE_H -+#define SERIALICE_H -+ -+#include "config-host.h" -+ -+extern const char *serialice_device; -+extern int serialice_active; -+ -+void serialice_init(void); -+void serialice_exit(void); -+ -+uint8_t serialice_inb(uint16_t port); -+uint16_t serialice_inw(uint16_t port); -+uint32_t serialice_inl(uint16_t port); -+ -+void serialice_outb(uint8_t data, uint16_t port); -+void serialice_outw(uint16_t data, uint16_t port); -+void serialice_outl(uint32_t data, uint16_t port); -+ -+uint8_t serialice_readb(uint32_t addr); -+uint16_t serialice_readw(uint32_t addr); -+uint32_t serialice_readl(uint32_t addr); -+ -+void serialice_writeb(uint8_t data, uint32_t addr); -+void serialice_writew(uint16_t data, uint32_t addr); -+void serialice_writel(uint32_t data, uint32_t addr); -+ -+uint64_t serialice_rdmsr(uint32_t addr, uint32_t key); -+void serialice_wrmsr(uint64_t data, uint32_t addr, uint32_t key); -+ -+typedef struct { -+ uint32_t eax, ebx, ecx, edx; -+} cpuid_regs_t; -+ -+ -+cpuid_regs_t serialice_cpuid(uint32_t eax, uint32_t ecx); -+ -+int serialice_handle_load(uint32_t addr, uint32_t *result, unsigned int data_size); -+void serialice_log_load(int caught, uint32_t addr, uint32_t result, unsigned int data_size); -+int serialice_handle_store(uint32_t addr, uint32_t val, unsigned int data_size); -+ -+#endif ---- qemu-0.11.0/build.sh -+++ qemu-0.11.0/build.sh -@@ -0,0 +1,5 @@ -+#!/bin/sh -+./configure --disable-kvm --disable-sdl --enable-serialice \ -+ --target-list="x86_64-softmmu, i386-softmmu" -+ -+make ---- qemu-0.11.0/Makefile.target -+++ qemu-0.11.0/Makefile.target -@@ -488,6 +488,13 @@ - # Generic watchdog support and some watchdog devices - obj-y += wdt_ib700.o wdt_i6300esb.o - -+# Generic SerialICE support -+ifdef CONFIG_SERIALICE -+CPPFLAGS += $(CONFIG_SERIALICE_CFLAGS) -+LIBS += $(CONFIG_SERIALICE_LIBS) -+endif -+obj-$(CONFIG_SERIALICE) += serialice.o -+ - # Hardware support - obj-i386-y = ide.o pckbd.o vga.o $(sound-obj-y) dma.o - obj-i386-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o ---- qemu-0.11.0/vl.c -+++ qemu-0.11.0/vl.c -@@ -221,6 +221,9 @@ - int win2k_install_hack = 0; - int rtc_td_hack = 0; - #endif -+#ifdef CONFIG_SERIALICE -+const char *serialice_device = NULL; -+#endif - int usb_enabled = 0; - int singlestep = 0; - int smp_cpus = 1; -@@ -5108,6 +5111,11 @@ - display_type = DT_CURSES; - break; - #endif -+#ifdef CONFIG_SERIALICE -+ case QEMU_OPTION_serialice: -+ serialice_device = optarg; -+ break; -+#endif - case QEMU_OPTION_portrait: - graphic_rotate = 1; - break; ---- qemu-0.11.0/qemu-char.c -+++ qemu-0.11.0/qemu-char.c -@@ -821,7 +821,7 @@ - #endif - - #if defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ -- || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) -+ || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) || defined(__APPLE__) - - typedef struct { - int fd; -@@ -2262,7 +2262,7 @@ - } else - #endif - #if defined(__linux__) || defined(__sun__) || defined(__FreeBSD__) \ -- || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) -+ || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) || defined(__APPLE__) - if (strstart(filename, "/dev/", NULL)) { - chr = qemu_chr_open_tty(filename); - } else ---- qemu-0.11.0/softmmu_template.h -+++ qemu-0.11.0/softmmu_template.h -@@ -16,6 +16,9 @@ - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ -+ -+#include "serialice.h" -+ - #define DATA_SIZE (1 << SHIFT) - - #if DATA_SIZE == 8 -@@ -91,6 +94,16 @@ - target_phys_addr_t addend; - void *retaddr; - -+#ifdef CONFIG_SERIALICE -+ uint32_t result; -+ int caught = 0; -+ if (serialice_active && serialice_handle_load((uint32_t)addr, &result, (unsigned int) DATA_SIZE)) { -+ res = (DATA_TYPE)result; -+ caught=1; -+ goto leave_ld; -+ } -+#endif -+ - /* test if there is match for unaligned or IO access */ - /* XXX: could done more in memory macro in a non portable way */ - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); -@@ -134,6 +147,12 @@ - tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); - goto redo; - } -+ -+#ifdef CONFIG_SERIALICE -+leave_ld: -+ if (serialice_active) -+ serialice_log_load(caught, addr, (uint32_t)res, (unsigned int)DATA_SIZE); -+#endif - return res; - } - -@@ -234,6 +253,15 @@ - void *retaddr; - int index; - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active && serialice_handle_store((uint32_t)addr, (uint32_t)val, (unsigned int) DATA_SIZE)) { -+ // For now, we just always keep a backup of _all_ writes in qemu's -+ // memory. At this point we can later decide what to do, if it becomes -+ // necessary. -+ // return; -+ } -+#endif -+ - index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - redo: - tlb_addr = env->tlb_table[mmu_idx][index].addr_write; ---- qemu-0.11.0/Makefile -+++ qemu-0.11.0/Makefile -@@ -212,6 +212,10 @@ - - bt-host.o: CFLAGS += $(CONFIG_BLUEZ_CFLAGS) - -+serialice.o: serialice.c serialice.h -+ -+serialice.o: CFLAGS += $(CONFIG_SERIALICE_CFLAGS) -+ - libqemu_common.a: $(obj-y) - - ####################################################################### ---- qemu-0.11.0/qemu-options.hx -+++ qemu-0.11.0/qemu-options.hx -@@ -1661,3 +1661,14 @@ - DEF("old-param", 0, QEMU_OPTION_old_param, - "-old-param old param mode\n") - #endif -+ -+#ifdef CONFIG_SERIALICE -+DEF("serialice", HAS_ARG, QEMU_OPTION_serialice, -+ "-serialice dev Enable SerialICE debugging on serial device 'dev'\n") -+STEXI -+@item -serialice @var{dev} -+Enable SerialICE debugging on serial device @var{dev}. -+ETEXI -+#endif -+ -+ ---- qemu-0.11.0/exec-all.h -+++ qemu-0.11.0/exec-all.h -@@ -21,6 +21,7 @@ - #define _EXEC_ALL_H_ - - #include "qemu-common.h" -+#include "serialice.h" - - /* allow to see translation results - the slowdown should be negligible, so we leave it */ - #define DEBUG_DISAS -@@ -328,6 +329,9 @@ - #if defined(TARGET_SPARC) || defined(TARGET_MIPS) - do_unassigned_access(addr, 0, 1, 0, 4); - #else -+#if defined(CONFIG_SERIALICE) -+ if (!serialice_active) -+#endif - cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); - #endif - } ---- qemu-0.11.0/configure -+++ qemu-0.11.0/configure -@@ -193,6 +193,7 @@ - io_thread="no" - nptl="yes" - mixemu="no" -+serialice="no" - bluez="yes" - kvm="no" - kerneldir="" -@@ -491,6 +492,8 @@ - ;; - --enable-mixemu) mixemu="yes" - ;; -+ --enable-serialice) serialice="yes" -+ ;; - --disable-pthread) pthread="no" - ;; - --disable-aio) aio="no" -@@ -624,6 +627,7 @@ - echo " --audio-card-list=LIST set list of emulated audio cards [$audio_card_list]" - echo " Available cards: $audio_possible_cards" - echo " --enable-mixemu enable mixer emulation" -+echo " --enable-serialice enable SerialICE debugger support" - echo " --disable-xen disable xen backend driver support" - echo " --disable-brlapi disable BrlAPI" - echo " --disable-vnc-tls disable TLS encryption for VNC server" -@@ -1064,6 +1068,40 @@ - done - - ########################################## -+# LUA probe -+ -+if test "$serialice" = "yes" ; then -+ serialice=no -+ cat > $TMPC << EOF -+#include <stdint.h> -+#include <lua.h> -+#include <lauxlib.h> -+#include <stdlib.h> -+#include <stdio.h> -+static lua_State *L; -+int main(void) { L=luaL_newstate(); return 0; } -+EOF -+ -+ LUA_CFLAGS="-I/usr/local/include" -+ LUA_LDFLAGS="-L/usr/local/lib -llua" -+ if $cc $EXTRA_CFLAGS $EXTRA_LDFLAGS $ARCH_CFLAGS $LUA_CFLAGS $LUA_LDFLAGS -o $TMPE $TMPC -llua > /dev/null 2> /dev/null ; then -+ serialice=yes -+ else -+ LUA_CFLAGS=`pkg-config --cflags lua` -+ LUA_LDFLAGS=`pkg-config --libs lua` -+ if $cc $EXTRA_CFLAGS $EXTRA_LDFLAGS $ARCH_CFLAGS $LUA_CFLAGS $LUA_LDFLAGS -o $TMPE $TMPC -llua > /dev/null 2> /dev/null ; then -+ serialice=yes -+ else -+ echo -+ echo "Error LUA not found, can't build with SerialICE support." -+ echo -+ exit 1 -+ fi -+ fi -+fi # test "$serialice" -+ -+ -+########################################## - # BrlAPI probe - - if test -z "$brlapi" ; then -@@ -1426,6 +1464,7 @@ - echo "Audio drivers $audio_drv_list" - echo "Extra audio cards $audio_card_list" - echo "Mixer emulation $mixemu" -+echo "SerialICE support $serialice" - echo "VNC TLS support $vnc_tls" - if test "$vnc_tls" = "yes" ; then - echo " TLS CFLAGS $vnc_tls_cflags" -@@ -1620,6 +1659,12 @@ - echo "CONFIG_MIXEMU=y" >> $config_host_mak - echo "#define CONFIG_MIXEMU 1" >> $config_host_h - fi -+if test "$serialice" = "yes" ; then -+ echo "CONFIG_SERIALICE=y" >> $config_host_mak -+ echo "CONFIG_SERIALICE_CFLAGS=$LUA_CFLAGS" >> $config_host_mak -+ echo "CONFIG_SERIALICE_LIBS=$LUA_LDFLAGS" >> $config_host_mak -+ echo "#define CONFIG_SERIALICE 1" >> $config_host_h -+fi - if test "$vnc_tls" = "yes" ; then - echo "CONFIG_VNC_TLS=y" >> $config_host_mak - echo "CONFIG_VNC_TLS_CFLAGS=$vnc_tls_cflags" >> $config_host_mak ---- qemu-0.11.0/target-i386/op_helper.c -+++ qemu-0.11.0/target-i386/op_helper.c -@@ -23,6 +23,7 @@ - - //#define DEBUG_PCALL - -+#include "serialice.h" - - #ifdef DEBUG_PCALL - # define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) -@@ -558,31 +559,64 @@ - - void helper_outb(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outb(data & 0xff, port); -+ return; -+ } -+#endif - cpu_outb(env, port, data & 0xff); - } - - target_ulong helper_inb(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inb(port); -+ } -+#endif - return cpu_inb(env, port); - } - - void helper_outw(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outw(data & 0xffff, port); -+ return; -+ } -+#endif - cpu_outw(env, port, data & 0xffff); - } - - target_ulong helper_inw(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inw(port); -+ } -+#endif - return cpu_inw(env, port); - } - - void helper_outl(uint32_t port, uint32_t data) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_outl(data & 0xffffffff, port); -+ return; -+ } -+#endif - cpu_outl(env, port, data); - } - - target_ulong helper_inl(uint32_t port) - { -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ return (target_ulong)serialice_inl(port); -+ } -+#endif - return cpu_inl(env, port); - } - -@@ -1940,6 +1974,18 @@ - - helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ cpuid_regs_t ret; -+ ret = serialice_cpuid((uint32_t)EAX, (uint32_t)ECX); -+ EAX = ret.eax; -+ EBX = ret.ebx; -+ ECX = ret.ecx; -+ EDX = ret.edx; -+ return; -+ } -+#endif -+ - cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); - EAX = eax; - EBX = ebx; -@@ -3030,6 +3076,13 @@ - - val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ serialice_wrmsr(val, (uint32_t)ECX, (uint32_t)EDI); -+ return; -+ } -+#endif -+ - switch((uint32_t)ECX) { - case MSR_IA32_SYSENTER_CS: - env->sysenter_cs = val & 0xffff; -@@ -3160,6 +3213,15 @@ - - helper_svm_check_intercept_param(SVM_EXIT_MSR, 0); - -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) { -+ val = serialice_rdmsr((uint32_t)ECX, (uint32_t)EDI); -+ EAX = (uint32_t)(val); -+ EDX = (uint32_t)(val >> 32); -+ return; -+ } -+#endif -+ - switch((uint32_t)ECX) { - case MSR_IA32_SYSENTER_CS: - val = env->sysenter_cs; ---- qemu-0.11.0/hw/pc.c -+++ qemu-0.11.0/hw/pc.c -@@ -23,6 +23,7 @@ - */ - #include "hw.h" - #include "pc.h" -+#include "serialice.h" - #include "fdc.h" - #include "pci.h" - #include "block.h" -@@ -1152,6 +1153,10 @@ - - /* allocate RAM */ - ram_addr = qemu_ram_alloc(0xa0000); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0, 0xa0000, ram_addr); - - /* Allocate, even though we won't register, so we don't break the -@@ -1160,6 +1165,10 @@ - */ - ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); - ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0x100000, - below_4g_mem_size - 0x100000, - ram_addr); -@@ -1170,6 +1179,10 @@ - hw_error("To much RAM for 32-bit physical address"); - #else - ram_addr = qemu_ram_alloc(above_4g_mem_size); -+#ifdef CONFIG_SERIALICE -+ if (serialice_active) -+ ram_addr |= IO_MEM_UNASSIGNED; -+#endif - cpu_register_physical_memory(0x100000000ULL, - above_4g_mem_size, - ram_addr); diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff new file mode 100644 index 0000000..dd10e50 --- /dev/null +++ b/SerialICE/patches/serialice.lua-5.2.diff @@ -0,0 +1,13 @@ +diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua +index 0e7e902..947f6a8 100644 +--- a/SerialICE/scripts/serialice.lua ++++ b/SerialICE/scripts/serialice.lua +@@ -26,7 +26,7 @@ io.write("SerialICE: Starting LUA script\n") + + -- If you get an error here, install bitlib + -- (ie. http://luaforge.net/projects/bitlib/) +-require("bit") ++require("bit32") + + function printf(s,...) + return io.write(s:format(...))

1 0

Patch set updated for serialice: 00d0dd0 Update to Lua 5.2.0
by Idwer Vollering 16 Aug '12

16 Aug '12

Idwer Vollering (vidwer(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1100 -gerrit commit 00d0dd0434143581d340f34785b6716aba4a38ff Author: Idwer Vollering <vidwer(a)gmail.com> Date: Thu Aug 16 22:51:43 2012 +0200 Update to Lua 5.2.0 Update SerialICE to be able to use Lua 5.2.0 Drop serialice-qemu-0.11.0.diff while we're at it. lua-5.2.0-shared.diff is (C) 2012 by Kyösti Mälkki. Change-Id: I73ad1c61c4399a552c7fa3844049a98d4ac27470 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- SerialICE/patches/lua-5.2.0-intsize.diff | 20 +++++++++++++++ SerialICE/patches/lua-5.2.0-shared.diff | 42 ++++++++++++++++++++++++++++++++ SerialICE/patches/lua-5.2.0-x64-fix.diff | 12 +++++++++ SerialICE/patches/serialice.lua-5.2.diff | 13 ++++++++++ 4 files changed, 87 insertions(+) diff --git a/SerialICE/patches/lua-5.2.0-intsize.diff b/SerialICE/patches/lua-5.2.0-intsize.diff new file mode 100644 index 0000000..e29ffae --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-intsize.diff @@ -0,0 +1,20 @@ +diff -ur lua-5.2.0/src/luaconf.h lua-5.2.0-shared/src/luaconf.h +--- lua-5.2.0/src/luaconf.h 2011-12-06 17:58:36.000000000 +0100 ++++ lua-5.2.0-shared/src/luaconf.h 2012-06-12 22:25:20.179943819 +0200 +@@ -10,6 +10,7 @@ + + #include <limits.h> + #include <stddef.h> ++#include <stdint.h> + + + /* +@@ -444,7 +445,7 @@ + ** CHANGE that if ptrdiff_t is not adequate on your machine. (On most + ** machines, ptrdiff_t gives a good choice between int or long.) + */ +-#define LUA_INTEGER ptrdiff_t ++#define LUA_INTEGER int64_t + + /* + @@ LUA_UNSIGNED is the integral type used by lua_pushunsigned/lua_tounsigned. diff --git a/SerialICE/patches/lua-5.2.0-shared.diff b/SerialICE/patches/lua-5.2.0-shared.diff new file mode 100644 index 0000000..465adf2 --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-shared.diff @@ -0,0 +1,42 @@ +diff -ur lua-5.2.0/Makefile lua-5.2.0-shared/Makefile +--- lua-5.2.0/Makefile 2011-11-16 00:38:12.000000000 +0100 ++++ lua-5.2.0-shared/Makefile 2012-06-12 21:42:25.953250340 +0200 +@@ -41,7 +41,7 @@ + # What to install. + TO_BIN= lua luac + TO_INC= lua.h luaconf.h lualib.h lauxlib.h lua.hpp +-TO_LIB= liblua.a ++TO_LIB= liblua.a liblua.so + TO_MAN= lua.1 luac.1 + + # Lua version and release. +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 21:44:17.476584177 +0200 +@@ -29,6 +29,7 @@ + PLATS= aix ansi bsd freebsd generic linux macosx mingw posix solaris + + LUA_A= liblua.a ++LUA_SO= liblua.so + CORE_O= lapi.o lcode.o lctype.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o \ + lmem.o lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o \ + ltm.o lundump.o lvm.o lzio.o +@@ -43,7 +44,7 @@ + LUAC_O= luac.o + + ALL_O= $(BASE_O) $(LUA_O) $(LUAC_O) +-ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) ++ALL_T= $(LUA_A) $(LUA_T) $(LUAC_T) $(LUA_SO) + ALL_A= $(LUA_A) + + # Targets start here. +@@ -59,6 +60,9 @@ + $(AR) $@ $? + $(RANLIB) $@ + ++$(LUA_SO): $(CORE_O) $(LIB_O) ++ $(CC) -o $@ -shared $? ++ + $(LUA_T): $(LUA_O) $(LUA_A) + $(CC) -o $@ $(LDFLAGS) $(LUA_O) $(LUA_A) $(LIBS) + diff --git a/SerialICE/patches/lua-5.2.0-x64-fix.diff b/SerialICE/patches/lua-5.2.0-x64-fix.diff new file mode 100644 index 0000000..d649f7a --- /dev/null +++ b/SerialICE/patches/lua-5.2.0-x64-fix.diff @@ -0,0 +1,12 @@ +diff -ur lua-5.2.0/src/Makefile lua-5.2.0-shared/src/Makefile +--- lua-5.2.0/src/Makefile 2011-09-19 14:45:14.000000000 +0200 ++++ lua-5.2.0-shared/src/Makefile 2012-06-12 22:24:16.973276561 +0200 +@@ -103,7 +103,7 @@ + generic: $(ALL) + + linux: +- $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" ++ $(MAKE) $(ALL) SYSCFLAGS="-fPIC -DLUA_USE_LINUX" SYSLIBS="-Wl,-E -ldl -lreadline -lncurses" + + macosx: + $(MAKE) $(ALL) SYSCFLAGS="-DLUA_USE_MACOSX" SYSLIBS="-lreadline" diff --git a/SerialICE/patches/serialice.lua-5.2.diff b/SerialICE/patches/serialice.lua-5.2.diff new file mode 100644 index 0000000..dd10e50 --- /dev/null +++ b/SerialICE/patches/serialice.lua-5.2.diff @@ -0,0 +1,13 @@ +diff --git a/SerialICE/scripts/serialice.lua b/SerialICE/scripts/serialice.lua +index 0e7e902..947f6a8 100644 +--- a/SerialICE/scripts/serialice.lua ++++ b/SerialICE/scripts/serialice.lua +@@ -26,7 +26,7 @@ io.write("SerialICE: Starting LUA script\n") + + -- If you get an error here, install bitlib + -- (ie. http://luaforge.net/projects/bitlib/) +-require("bit") ++require("bit32") + + function printf(s,...) + return io.write(s:format(...))

1 0

Patch set updated for serialice: 0c88f79 Modularized SerialICE scripting [NOTFORMERGE]
by Kyösti Mälkki 16 Aug '12

16 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/860 -gerrit commit 0c88f795f620d1d95c814f76805e39e9adb3f319 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jul 8 15:44:07 2012 +0300 Modularized SerialICE scripting [NOTFORMERGE] At the time there is no decision how/if this will take over the single-file serialice.lua script. Until then I've made this available for feedback and maybe even Real Use. Using this _runtime_ requires Qemu 0.15.x with lua interface modified. The one here should be compatible: http://review.coreboot.org/#/c/1017/ Until issues with lua interface to qemu are solved, you can filter old SerialICE log files through the replayer script like this: $ cat log | lua replay.lua The old script/serialice.lua was split into separate files. It expects to find a match for the *mb command response and load a correct .lua file for that particular mainboard. A few sample mainboard files are included here. There is decoding of SMBus traffic for Intel ICH. There is a bit improved filter for PCI configuration registers, even when written in multiple parts. Good for catching BARs. There is some decoding of CMOS nvram and PnP cycles to SuperIO. Some filters for which I did not yet find proper location are in the file leftover.lua, some of these were vendor bios binary specific. Change-Id: Idba1c3dc7e80ebf169ff277ab7918a1564822bfe Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- SerialICE/simba/aopen_dxpl_plus.lua | 143 +++++++++ SerialICE/simba/asrock_775i65g.lua | 11 + SerialICE/simba/asus_p4p800_vm.lua | 83 ++++++ SerialICE/simba/core_io.lua | 305 ++++++++++++++++++++ SerialICE/simba/cpu.lua | 126 ++++++++ SerialICE/simba/e7505.lua | 12 + SerialICE/simba/hooks.lua | 305 ++++++++++++++++++++ SerialICE/simba/i82801dx.lua | 118 ++++++++ SerialICE/simba/intel_d845gbv2.lua | 93 ++++++ SerialICE/simba/intel_smbus.lua | 249 ++++++++++++++++ SerialICE/simba/interface.lua | 161 +++++++++++ SerialICE/simba/leftover.lua | 136 +++++++++ SerialICE/simba/memory.lua | 244 ++++++++++++++++ SerialICE/simba/mmio.lua | 83 ++++++ SerialICE/simba/output.lua | 81 ++++++ SerialICE/simba/pc80.lua | 546 +++++++++++++++++++++++++++++++++++ SerialICE/simba/replay.lua | 171 +++++++++++ SerialICE/simba/serialice.lua | 119 ++++++++ SerialICE/simba/smbus_host.lua | 559 ++++++++++++++++++++++++++++++++++++ SerialICE/simba/superio.lua | 212 ++++++++++++++ SerialICE/simba/via_epia_m_850.lua | 163 +++++++++++ 21 files changed, 3920 insertions(+) diff --git a/SerialICE/simba/aopen_dxpl_plus.lua b/SerialICE/simba/aopen_dxpl_plus.lua new file mode 100644 index 0000000..d199e27 --- /dev/null +++ b/SerialICE/simba/aopen_dxpl_plus.lua @@ -0,0 +1,143 @@ +-- SerialICE +-- +-- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + +dofile("i82801dx.lua") +dofile("e7505.lua") +dofile("mmio.lua") + +-- ********************************************************** +-- + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then + enable_ram() + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xed then + if ( regs.eip == 0x1792 ) then + regs.ecx = 0x01 + end +if false then + -- SIPI delay + if ( regs.eip == 0xb3bc or regs.eip == 0xb3bf ) then + regs.ecx = 0x01 + end + if ( regs.eip == 0xb4ad or regs.eip == 0xb4af ) then + regs.ecx = 0x01 + end +end + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xed or action.addr == 0xcfb then + return true + end + + -- If KBD controller returns status=0xff, clear 0x02. + if action.addr == 0x64 and not action.write and action.size == 1 then + if action.data == 0xff then + -- tag these but give out correct data + fake_action(f, action, action.data) + end + end +end + +filter_mainboard = { + id = -1, + name = "AOpen", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + + +function do_mainboard_setup() + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + --enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x2e, 0x07) + --enable_hook(io_hooks, filter_com1) + enable_hook_i82801dx() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/asrock_775i65g.lua b/SerialICE/simba/asrock_775i65g.lua new file mode 100644 index 0000000..b98b63c --- /dev/null +++ b/SerialICE/simba/asrock_775i65g.lua @@ -0,0 +1,11 @@ + +dofile("i82801dx.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801dx() + + -- Apply mainboard hooks last, so they are the first ones to check + --enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/asus_p4p800_vm.lua b/SerialICE/simba/asus_p4p800_vm.lua new file mode 100644 index 0000000..296a833 --- /dev/null +++ b/SerialICE/simba/asus_p4p800_vm.lua @@ -0,0 +1,83 @@ + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + if ( regs.eip == 0x1634 ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x20) + end + if ( regs.eip == 0x163a ) then + regs.ecx = 0x01 + return fake_action(f, action, 0x30) + end + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "test", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801dx.lua") + +function do_mainboard_setup() + do_default_setup() + + enable_hook_i82801dx() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/core_io.lua b/SerialICE/simba/core_io.lua new file mode 100644 index 0000000..b47b088 --- /dev/null +++ b/SerialICE/simba/core_io.lua @@ -0,0 +1,305 @@ + +function io_undefined(f, action) + action.to_hw = true + action.to_qemu = false + action.undefined = true + return true +end + +function io_post(f, action) + if (action.write) then + printk(f, action, "out%s %04x <= %s\n", size_suffix(action.size), action.addr, size_data(action.size, action.data)) + else + printk(f, action, " in%s %04x => %s\n", size_suffix(action.size), action.addr, size_data(action.size, action.data)) + end + return true +end + +function io_base_post(f, action) + if (action.write) then + printk(f, action, "[%04x] <= %s\n", bit.band(action.addr, (f.size - 1)), size_data(action.size, action.data)) + else + printk(f, action, "[%04x] => %s\n", bit.band(action.addr, (f.size - 1)), size_data(action.size, action.data)) + end + return true +end + +filter_io_fallback = { + id = -1, + name = "IO", + pre = io_undefined, + post = io_post, + base = 0x0, + size = 0x10000, +} + + +-- ********************************************************** +-- +-- PCI IO config access + + +pci_cfg_hooks = new_list() + +function add_pci_cfg_hook(dev, reg, size, func) + value = { + bdf = bit.bor(dev.pci_dev, reg), + dev = dev, + reg = reg, + size = size, + func = func + } + prepend_to_list(pci_cfg_hooks, value) +end + + + +function hook_pci_cfg8(dev, reg, hook) + add_pci_cfg_hook(dev, reg, 1, hook) +end + +function hook_pci_cfg16(dev, reg, hook) + add_pci_cfg_hook(dev, reg, 2, hook) +end + +function hook_pci_cfg32(dev, reg, hook) + add_pci_cfg_hook(dev, reg, 4, hook) +end + + + +function io_bar_hook(dev, reg, data) + local bar = dev.bar[reg] + if bar then + bar.base = bit.band(data, bit.bnot(bar.size-1)) + generic_io_bar(bar) + end +end + +function mem_bar_hook(dev, reg, data) + local bar = dev.bar[reg] + if bar then + bar.base = bit.band(data, bit.bnot(bar.size-1)) + generic_mmio_bar(bar) + end +end + +function add_bar(dev, reg, name, size) + if not dev.bar then + dev.bar = {} + end + if not dev.bar[reg] then + dev.bar[reg] = {} + end + dev.bar[reg].f = nil + dev.bar[reg].name = name + dev.bar[reg].base = 0x0 + dev.bar[reg].size = size +end + +function add_io_bar(dev, reg, name, size) + add_bar(dev, reg, name, size) + hook_pci_cfg16(dev, reg, io_bar_hook) +end + +function add_mem_bar(dev, reg, name, size) + add_bar(dev, reg, name, size) + hook_pci_cfg32(dev, reg, mem_bar_hook) +end + + +function is_pci_cfg_hooked(bdf) + local l = pci_cfg_hooks.list + while l do + if bdf == bit.band(l.value.bdf, bit.bnot(0x03)) then + return true + end + l = l.next + end + return false +end + +function call_pci_cfg_hook(bdf, size, data) + local l = pci_cfg_hooks.list + while l do + if l.value.bdf == bdf and l.value.size == size then + l.value.func(l.value.dev, l.value.reg, data) + end + l = l.next + end + return false +end + +function pci_bdf(bus, dev, func, reg) + return 0x80000000 + bus*65536 + dev*2048 + func*256 + reg +end + +-- Catch partial PCI configuration register writes. +-- This synthesizes 32/16 bit wide access from separate +-- 16/8 bit accesses for pci_cfg_hooks. + +bv = {} + +function is_pci_io_cfg(bdf) + local f = filter_pci_io_cfg + return f.reg.bdfr == bdf +end + +function pci_cfg_0cf8_reset(f, data) + f.reg.bdfr = bit.band(data,bit.bnot(0x3)) + if bit.band(0x80000000, f.reg.bdfr) ~= 0 then + f.reg.reset = true + new_parent_action() + end + if not (f.reg.bdfr_hook == f.reg.bdfr) then + f.reg.bdfr_hook = 0 + if (is_pci_cfg_hooked(f.reg.bdfr)) then + f.reg.bdfr_hook = f.reg.bdfr + end + for i = 0, 3, 1 do bv[i] = false end + end +end + +function pci_cfg_0cfc_access(f, addr, size, data) + + if not f.reg.reset and ((f.reg.prev_addr ~= addr) or (f.reg.prev_size ~= size)) then + new_parent_action() + end + f.reg.reset = false + f.reg.prev_addr = addr + f.reg.prev_size = size + + if f.reg.bdfr_hook == 0 then + return + end + + local av = {} + + for i = 0, 3, 1 do av[i] = false end + + ll = 8 * (addr%4) + if (size == 1) then + av[addr%4] = true + bv[addr%4] = true + amask = bit.lshift(0xff, ll) + omask = bit.lshift(data, ll) + f.reg.data = bit.band(f.reg.data, bit.bnot(amask)) + f.reg.data = bit.bor(f.reg.data, omask) + elseif (size == 2) then + av[addr%4] = true + bv[addr%4] = true + av[addr%4+1] = true + bv[addr%4+1] = true + amask = bit.lshift(0xffff, ll) + omask = bit.lshift(data, ll) + f.reg.data = bit.band(f.reg.data, bit.bnot(amask)) + f.reg.data = bit.bor(f.reg.data, omask) + elseif (size == 4) then + f.reg.data = data + for i = 0, 3, 1 do av[i] = true end + for i = 0, 3, 1 do bv[i] = true end + end + + for i = 0, 3, 1 do + if (bv[i] and av[i]) then + call_pci_cfg_hook(f.reg.bdfr + i, 1, + bit.band(0xff, bit.rshift(f.reg.data, i*8))) + end + end + if ((bv[0] and bv[1]) and (av[0] or av[1])) then + call_pci_cfg_hook(f.reg.bdfr + 0x00, 2, + bit.band(0xffff, bit.rshift(f.reg.data, 0))) + end + if (bv[2] and bv[3] and (av[2] or av[3])) then + call_pci_cfg_hook(f.reg.bdfr + 0x02, 2, + bit.band(0xffff, bit.rshift(f.reg.data, 16))) + end + if (bv[0] and bv[1] and bv[2] and bv[3]) then + call_pci_cfg_hook(f.reg.bdfr, 4, f.reg.data) + end +end + +function pci_io_cfg_pre(f, action) + if action.addr == 0xcf8 and action.size == 4 then + if action.write then + pci_cfg_0cf8_reset(f, action.data) + end + return handle_action(f, action) + end + if action.addr >= 0xcfc and action.addr <= 0xcff then + if action.write then + pci_cfg_0cfc_access(f, action.addr, action.size, action.data) + end + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function pci_io_cfg_post(f, action) + if action.addr == 0xcf8 and action.size == 4 then + return true + end + if action.addr >= 0xcfc and action.addr <= 0xcff then + if (action.write) then + dir_str = "<=" + else + dir_str = "=>" + end + printk(f, action, "%x:%02x.%x [%02x] %s %s\n", + bit.band(0xff,bit.rshift(f.reg.bdfr, 16)), + bit.band(0x1f,bit.rshift(f.reg.bdfr, 11)), + bit.band(0x7,bit.rshift(f.reg.bdfr, 8)), + bit.band(0xff,f.reg.bdfr + (action.addr - 0xcfc)), + dir_str, size_data(action.size, action.data)) + return true + end + return false +end + +filter_pci_io_cfg = { + id = -1, + name = "PCI", + pre = pci_io_cfg_pre, + post = pci_io_cfg_post, + hide = hide_pci_io_cfg, + base = 0xcf8, + size = 0x08, + reg = { bdfr = 0, bdfr_hook = 0, data = 0, + reset = true, prev_addr = 0, prev_size = 0 } +} + +-- ********************************************************** +-- +-- PCIe MM config access + +function pci_mm_cfg_post(f, action) + + if (action.write) then + dir_str = "<=" + else + dir_str = "=>" + end + printk(f, action, "%x:%02x.%x [%02x] %s %s\n", + bit.band(0xff,bit.rshift(action.addr, 20)), + bit.band(0x1f,bit.rshift(action.addr, 15)), + bit.band(0x7,bit.rshift(action.addr, 12)), + bit.band(0xfff,action.addr), + dir_str, size_data(action.size, action.data)) + return true +end + +filter_pci_mm_cfg = { + id = -1, + name = "PCIe", + pre = mem_target_only, + post = pci_mm_cfg_post, + hide = hide_pci_mm_cfg, + base = 0x0, + size = 0x0, +} + +function pcie_mm_cfg_bar(base, size) + filter_pci_mm_cfg.base = base + filter_pci_mm_cfg.size = size + enable_hook(mem_hooks, filter_pci_mm_cfg) +end diff --git a/SerialICE/simba/cpu.lua b/SerialICE/simba/cpu.lua new file mode 100644 index 0000000..d162f62 --- /dev/null +++ b/SerialICE/simba/cpu.lua @@ -0,0 +1,126 @@ + +function var_mtrr_post(f, action) + + local addr = action.rin.ecx + local hi = action.rin.edx + local lo = action.rin.eax + + if addr % 2 == 0 then + mt = lo % 0x100 + if mt == 0 then memtype = "Uncacheable" + elseif mt == 1 then memtype = "Write-Combine" + elseif mt == 4 then memtype = "Write-Through" + elseif mt == 5 then memtype = "Write-Protect" + elseif mt == 6 then memtype = "Write-Back" + else memtype = "Unknown" + end + printk(f, action, "Set MTRR %x base to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xffffff00), memtype) + else + if bit.band(lo, 0x800) == 0x800 then + valid = "valid" + else + valid = "disabled" + end + printk(f, action, "Set MTRR %x mask to %08x.%08x (%s)\n", (addr - 0x200) / 2, hi, bit.band(lo, 0xfffff000), valid) + end +end + +function cpumsr_pre(f, action) + return handle_action(f, action) +end + +function cpumsr_post(f, action) + if action.write then + printk(f, action, "[%08x] <= %08x.%08x\n", + action.rin.ecx, action.rin.edx, action.rin.eax) + if action.addr >= 0x200 and action.addr < 0x210 then + var_mtrr_post(f, action) + end + else + printk(f, action, "[%08x] => %08x.%08x\n", + action.rin.ecx, action.rout.edx, action.rout.eax) + end + return true +end + + +function cpuid_pre(f, action) + return handle_action(f, action) +end + +function cpuid_post(f, action) + printk(f, action, "eax: %08x; ecx: %08x => %08x.%08x.%08x.%08x\n", + action.rin.eax, action.rin.ecx, + action.rout.eax, action.rout.ebx, action.rout.ecx, action.rout.edx) + return true +end + + + +filter_cpumsr_fallback = { + id = -1, + name = "CPU MSR", + pre = cpumsr_pre, + post = cpumsr_post, +} +filter_cpuid_fallback = { + id = -1, + name = "CPUID", + pre = cpuid_pre, + post = cpuid_post, +} + + + +function multicore_pre(f, action) + return skip_filter(f, action) +end + +function multicore_post(f, action) + local rout = action.rout + local rin = action.rin + -- Set number of cores to 1 on Core Duo and Atom to trick the + -- firmware into not trying to wake up non-BSP nodes. + if not action.write and rin.eax == 0x01 then + rout.ebx = bit.band(0xff00ffff, rout.ebx); + rout.ebx = bit.bor(0x00010000, rout.ebx); + fake_action(f, action, 0) + end + return skip_filter(f, action) +end + +filter_multiprocessor = { + id = -1, + name = "Multiprocessor Count", + pre = multicore_pre, + post = multicore_post, +} + +-- Intel CPU microcode update +function intel_microcode_pre(f, action) + if action.rin.ecx == 0x79 then + --action.dropped = true + --action.rout.edx = 0 + --action.rout.eax = 0xffff0000 + return drop_action(f, action) + end + return skip_filter(f, action) +end + +-- Intel CPU microcode revision check +-- Fakes microcode revision of my 0x6f6 Core 2 Duo Mobile +function intel_microcode_post(f, action) + if action.rin.ecx == 0x8b then + action.rout.edx = 0xc7 + action.rout.eax = 0 + return fake_action(f, action, 0) + end + return skip_filter(f, action) +end + +filter_intel_microcode = { + id = -1, + name = "Microcode Update", + pre = intel_microcode_pre, + post = intel_microcode_post, +} diff --git a/SerialICE/simba/e7505.lua b/SerialICE/simba/e7505.lua new file mode 100644 index 0000000..70d96ea --- /dev/null +++ b/SerialICE/simba/e7505.lua @@ -0,0 +1,12 @@ + + +dev_e7505_mch = { + pci_dev = pci_bdf(0x0,0x0,0x0,0x0), + name = "MCH", + bar = {} +} + +add_mem_bar(dev_e7505_mch, 0x14, "RCOMP", 0x1000) + + + diff --git a/SerialICE/simba/hooks.lua b/SerialICE/simba/hooks.lua new file mode 100644 index 0000000..b20ae8a --- /dev/null +++ b/SerialICE/simba/hooks.lua @@ -0,0 +1,305 @@ + + +function new_list() + return { list = nil } +end + +function prepend_to_list(list, value) + list.list = { next = list.list, value = value } +end + +function walk_list(list, ...) + if list == nil or list.list == nil then + return false + end + local l = list.list + while l do + if l.value(...) then + return true + end + l = l.next + end + return false +end + + + +next_filter_id = 1 +next_action_id = 1 +current_parent_id = 0 + +function action_id() + local n = next_action_id + next_action_id = next_action_id + 1 + return n +end + +function new_parent_action() + current_parent_id = action_id() +end + + +io_hooks = new_list() +mem_hooks = new_list() + +cpumsr_hooks = new_list() +cpuid_hooks = new_list() + + +function enable_hook(list, filter) + if not filter then + printks(froot, "Enable_hook called with filter==nil\n") + return + end + + local l = list.list + local found = false + while l and not found do + found = (l.hook == filter) + l = l.next + end + if not found then + if (filter.id < 0) then + filter.id = next_filter_id + next_filter_id = next_filter_id + 1 + end + list.list = { next = list.list, hook = filter } + end + if (list == io_hooks) then + printks(fresource, "[%04x] IO [%04x-%04x] = %s\n", + filter.id, filter.base, filter.base + filter.size - 1, filter.name) + elseif (list == mem_hooks) then + printks(fresource, "[%04x] MEM [%08x-%08x] = %s\n", + filter.id, filter.base, filter.base + filter.size - 1, filter.name) + else + printks(fresource, "[%04x] %s\n", filter.id, filter.name) + end + filter.enable = true +end + +function disable_hook(list, filter) + if not filter then + return + end + local l = list.list + local found = false + while l and not found do + found = (l.hook == filter) + l = l.next + end + if found then + printks(froot, "id=%04x disabled\n", filter.id) + filter.enable = false + else + printks(filter, "disabled\n", filter.id) + filter.enable = false + end +end + + + + + + +prev_filter = nil + +function walk_pre_hooks(list, action) + if list == nil or list.list == nil then + return false + end + local logged = false + local l = list.list + local f = nil + + if list == io_hooks or list == mem_hooks then + + while l and not logged do + f = l.hook + if action.addr >= f.base and action.addr < f.base + f.size then + if f.enable and f.pre then + logged = f.pre(f, action) + end + end + l = l.next + end + + else + + while l and not logged do + f = l.hook + if f.enable and f.pre then + logged = f.pre(f, action) + end + l = l.next + end + + end + + if prev_filter ~= f and not action.ignore then + prev_filter = f + new_parent_action() + end + if action.dropped then + action.to_hw = false + action.to_qemu = false + end +end + +function walk_post_hooks(list, action) + if list == nil or list.list == nil then + return false + end + local logged = false + local l = list.list + local f = nil + + if list == io_hooks or list == mem_hooks then + + while l and not logged do + f = l.hook + if action.addr >= f.base and action.addr < f.base + f.size then + if f.enable and f.post then + if f.post(f, action) then + action.f = f + logged = f.hide and not log_everything + end + end + end + l = l.next + end + + else + + while l and not logged do + f = l.hook + if f.enable and f.post then + logged = f.post(f, action) + end + l = l.next + end + + end + + +end + +function generic_io_bar(bar) + if not bar.f then + f = {} + f.id = -1 + f.pre = handle_action + f.post = io_base_post + f.hide = true + f.name = bar.name + f.size = bar.size + bar.f = f + end + bar.f.base = bit.band(bar.base, bit.bnot(bar.size-1)) + if bar.f.base ~= 0 then + enable_hook(io_hooks, bar.f) + else + disable_hook(io_hooks, bar.f) + end +end + +function generic_mmio_bar(bar) + if not bar.f then + f = {} + f.id = -1 + f.pre = handle_action + f.post = mem_base_post + f.hide = true + f.name = bar.name + f.size = bar.size + bar.f = f + end + bar.f.base = bit.band(bar.base, bit.bnot(bar.size-1)) + if bar.f.base ~= 0 then + enable_hook(mem_hooks, bar.f) + else + disable_hook(mem_hooks, bar.f) + end +end + +PRE_HOOK = 1 +POST_HOOK = 2 + +function handle_action(f, action) + action.to_hw = true + return true +end + +function drop_action(f, action, data) + if action.stage == POST_HOOK then + printk(f, action, "ERROR: Cannot drop action in a post-hook.\n") + return true + end + action.dropped = true + action.data = data + return true +end + +function ignore_action(f, action) + action.ignore = true +end + +function fake_action(f, action, data) + if action.stage == POST_HOOK and action.write then + printk(f, action, "ERROR: Cannot fake write in a post-hook.\n") + return true + end + action.faked = true + action.data = data + return true +end + + +function skip_filter(f, action) + return false +end + +function pre_action(action, dir_wr, addr, size, data) + action.stage = PRE_HOOK + -- CS:IP logging + action.cs = regs.cs + action.eip = regs.eip + + -- no filter, not filtered + action.f = nil + action.ignore = false + action.undefined = false + action.faked = false + action.dropped = false + action.to_hw = false + action.to_qemu = false + + action.write = dir_wr + action.addr = addr + action.size = size + if action.write then + action.data = data + else + action.data = 0 + end +end + +function post_action(action, data) + action.stage = POST_HOOK + action.parent_id = current_parent_id + action.my_id = action_id() + + if not action.write then + if not action.faked and not action.dropped then + action.data = data + end + end +end + +function load_regs(regs, eax, ebx, ecx, edx) + regs.eax = eax + regs.ebx = ebx + regs.ecx = ecx + regs.edx = edx +end + + diff --git a/SerialICE/simba/i82801dx.lua b/SerialICE/simba/i82801dx.lua new file mode 100644 index 0000000..39b35f0 --- /dev/null +++ b/SerialICE/simba/i82801dx.lua @@ -0,0 +1,118 @@ +-- ********************************************************** +-- +-- LPC decode ranges + +function lpc_decode_write(f, action) + -- LPC decode registers + if action.write and is_pci_io_cfg(pci_bdf(0x0,0x1f,0x0,0xe4)) then + if action.addr == 0xcfc and action.size == 4 or action.addr == 0xcfe then + return drop_action(f, action, action.data) + end + end +end + +filter_lpc_lock = { + id = -1, + name = "LPC", + pre = lpc_decode_write, + base = 0xcfc, + size = 0x4 +} + + +-- ********************************************************** +-- +-- SMBus controller handling + + +dofile("intel_smbus.lua") + +function smbus_bar_hook(dev, reg, base) + intel_smbus_setup(base, 0x20) +end + +dev_sb_lpc = { + pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), + name = "Smbus", + bar = {}, +} + +function enable_smbus_host_bar() + hook_pci_cfg16(dev_sb_lpc, 0x20, smbus_bar_hook) +end + + +-- ********************************************************** +-- + +dev_power = { + pci_dev = pci_bdf(0x0,0x1f,0x0,0x0), + name = "SYS", + bar = {}, + acpi = { f = nil }, + tco = { f = nil }, +} + +function pm_io_bar(dev, reg, base) + dev.acpi.name = "ACPI" + dev.acpi.base = base + dev.acpi.size = 0x60 + generic_io_bar(dev.acpi) + + dev.tco.name = "TCO" + dev.tco.base = base + 0x60 + dev.tco.size = 0x20 + generic_io_bar(dev.tco) +end + +function enable_power_bars() + --add_io_bar(dev_power, 0x40, "PM", 0x80) + hook_pci_cfg16(dev_power, 0x40, pm_io_bar) + add_io_bar(dev_power, 0x58, "GPIO", 0x40) +end + +function enable_lpc_bars() + add_io_bar(dev_power, 0xe4, "LPC1", 0x80) + add_io_bar(dev_power, 0xec, "LPC2", 0x10) +end + +-- ********************************************************** +-- +-- AC '97 controller handling + + +dev_audio = { + pci_dev = pci_bdf(0x0,0x1f,0x5,0x0), + name = "Audio", + bar = {} +} + +function enable_audio_bars() + add_io_bar(dev_audio, 0x10, "NAMBAR", 0x100) + add_io_bar(dev_audio, 0x14, "NABMBAR", 0x40) + add_mem_bar(dev_audio, 0x18, "MMBAR", 0x200) + add_mem_bar(dev_audio, 0x1C, "MBBAR", 0x100) +end + +dev_modem = { + pci_dev = pci_bdf(0x0,0x1f,0x6,0x0), + name = "Audio", + bar = {} +} + +function enable_modem_bars() + add_io_bar(dev_audio, 0x10, "MMBAR", 0x100) + add_io_bar(dev_audio, 0x14, "MBAR", 0x80) +end + + +function enable_hook_i82801dx() + enable_hook(io_hooks, filter_lpc_lock) + enable_smbus_host_bar() + enable_power_bars() + enable_lpc_bars() + enable_audio_bars() +end + + + diff --git a/SerialICE/simba/intel_d845gbv2.lua b/SerialICE/simba/intel_d845gbv2.lua new file mode 100644 index 0000000..2cb1a90 --- /dev/null +++ b/SerialICE/simba/intel_d845gbv2.lua @@ -0,0 +1,93 @@ + + +function mainboard_io_read(f, action) + -- Some timer loop + if ( action.addr == 0x61 ) then + end + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0xd5 and not ram_enabled() then + -- enable_ram() + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xe1 then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then + return true + end + if action.addr == 0x80 and not action.write then + return true + end +end + +filter_mainboard = { + id = -1, + name = "GEBV2", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + +dofile("i82801dx.lua") + +function do_mainboard_setup() + new_car_region(0xfef00000, 0x800) + + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x2e, 0x07) + --enable_hook(io_hooks, filter_com1) + enable_hook_i82801dx() + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end diff --git a/SerialICE/simba/intel_smbus.lua b/SerialICE/simba/intel_smbus.lua new file mode 100644 index 0000000..7aff5f2 --- /dev/null +++ b/SerialICE/simba/intel_smbus.lua @@ -0,0 +1,249 @@ + + +dofile("smbus_host.lua") + +-- ******************************************** +-- Intel 82801 SMBus Host controller + +I801_SMB_HSTSTS = 0 +I801_SMB_HSTCNT = 2 +I801_SMB_HSTCMD = 3 +I801_SMB_HSTADD = 4 +I801_SMB_HSTDAT0 = 5 +I801_SMB_HSTDAT1 = 6 +I801_SMB_BLKDAT = 7 +I801_SMB_PEC = 8 +I801_SMB_AUXSTS = 12 +I801_SMB_AUXCTL = 13 + +I801_QUICK = 0x00 +I801_BYTE = 0x04 +I801_BYTE_DATA = 0x08 +I801_WORD_DATA = 0x0C +I801_PROC_CALL = 0x10 +I801_BLOCK_DATA = 0x14 +I801_I2C_BLOCK_DATA = 0x18 +I801_BLOCK_PROCESS = 0x1C +I801_BLOCK_LAST = 0x34 -- 0x14 | 0x20 +I801_I2C_BLOCK_LAST = 0x38 -- 0x18 | 0x20 +I801_START = 0x40 +I801_PEC_EN = 0x80 + + +local function intel_smbus_get_protocol(f) + local proto = bit.band(f.reg.control, 0x1c) + + if proto == I801_QUICK then + return SMBUS_QUICK + + elseif proto == I801_BYTE then + return SMBUS_BYTE + + elseif proto == I801_BYTE_DATA then + return SMBUS_BYTE_DATA + + elseif proto == I801_WORD_DATA then + return SMBUS_WORD_DATA + + elseif proto == I801_PROC_CALL then + return SMBUS_PROC_CALL + + elseif proto == I801_BLOCK_DATA then + return SMBUS_BLOCK_DATA + + elseif proto == I801_I2C_BLOCK_DATA then + return SMBUS_I2C_BLOCK_DATA + + elseif proto == I801_BLOCK_PROCESS then + return SMBUS_BLOCK_PROCESS + + else + printk(f, action, "Unknown protocol\n") + return SMBUS_NOOP + end +end + +local function intel_smbus_host_status(f, action) + if not action.write then + if smbus.passive(f) then + f.reg.status = action.data; + end + + if smbus.state(f, HOST_IDLE) then + if not smbus.passive(f) then + f.reg.status = 0x0 + end + if bit.band(f.reg.status, 0x40) ~= 0 then + printk(f, action, "Host may be busy, ignoring.\n") + end + smbus.get_resource(f) + + elseif smbus.state(f, HOST_ACTIVE) then + f.reg.busy_count = 3 + + elseif smbus.state(f, HOST_STARTED) then + if not smbus.passive(f) then + f.reg.status = bit.band(f.reg.status, 0xFE) + if f.reg.busy_count > 0 then + f.reg.busy_count = f.reg.busy_count - 1 + f.reg.status = bit.bor(f.reg.status, 0x01) + end + if bit.band(f.reg.status, 0x02) == 0 then + smbus_transaction(host) + end + end + + local irq = bit.band(f.reg.status, 0x02) ~= 0 + local failures = bit.band(f.reg.status, 0x1c) ~= 0 + local host_busy = bit.band(f.reg.status, 0x01) ~= 0 + + if irq and not host_busy then + smbus.done(f) + end + if failures then + smbus.timeout(f) + end + end + + if not smbus.passive(f) then + action.data = f.reg.status; + f.reg.status = bit.bor(f.reg.status, 0x40) + end + else + + if not smbus.passive(f) then + f.reg.status = bit.band(f.reg.status, bit.bnot(action.data)) + end + + local ack_irq = bit.band(action.data, 0x02) ~= 0 + local release_host = bit.band(action.data, 0x40) ~= 0 + local failures = bit.band(action.data, 0x1c) ~= 0 + if release_host then + smbus.put_resource(f) + end + if failures then + smbus.timeout_ack(f) + end + if ack_irq then + smbus.ack(f) + end + end + +end + + +local function intel_smbus_host_control(f, action) + + if not action.write then + f.reg.block_ptr=0; + if not smbus.passive(f) then + action.data = bit.band(f.reg.control, bit.bnot(0x40)) + end + + else + + f.reg.control = action.data; + if bit.band(f.reg.control, 0x80) ~= 0 then + printk(f, action, "No PEC simulation\n") + end + + local abort = bit.band(f.reg.control, 0x02) ~= 0 + local start = bit.band(f.reg.control, 0x40) ~= 0 + if abort then + smbus.abort(f) + end + if start then + f.reg.block_ptr=0; + smbus.update_register(f, action, SMB_REG_PROTO) + smbus.start(f, intel_smbus_get_protocol(f)) + end + end +end + + + +local function intel_smbus_block_data(f, action) + if f.reg.block_ptr < MAX_BLOCK_SRAM then + smbus.block_data(f, action, f.reg.block_ptr) + end + f.reg.block_ptr = f.reg.block_ptr + 1 + smbus.update_register(f, action, SMB_REG_BLOCK) +end + +local function intel_smbus_host_access(f, action) + local reg = bit.band(action.addr, (f.size-1)) + + -- Store this to display CS:IP etc. + f.host.action = action + + if reg == I801_SMB_HSTSTS then + intel_smbus_host_status(f, action); + + elseif reg == I801_SMB_HSTCNT then + intel_smbus_host_control(f, action); + + elseif reg == I801_SMB_HSTCMD then + smbus.update_register(f, action, SMB_REG_CMD) + + elseif reg == I801_SMB_HSTADD then + smbus.update_register(f, action, SMB_REG_SLAVE) + + elseif reg == I801_SMB_HSTDAT0 then + smbus.update_register(f, action, SMB_REG_DATA0) + + elseif reg == I801_SMB_HSTDAT1 then + smbus.update_register(f, action, SMB_REG_DATA1) + + elseif reg == I801_SMB_BLKDAT then + intel_smbus_block_data(f, action); + + elseif reg == I801_SMB_AUXCTL then + if data_write then + f.reg.aux_ctl = action.data; + else + action.data = f.reg.aux_ctl; + end + + else + printk(f, action, "Unknown register 0x%02x\n", reg); + end +end + + +function intel_smbus_host_pre(f, action) + if action.write then + intel_smbus_host_access(f, action) + end + return handle_action(f, action) +end + +function intel_smbus_host_post(f, action) + if not action.write then + intel_smbus_host_access(f, action) + end + return true +end + + +local intel_smbus_host = { + id = -1, + name = "i801-smbus", + pre = intel_smbus_host_pre, + post = intel_smbus_host_post, + hide = hide_smbus_io, + base = 0x0, + size = 0x0, +} + +function intel_smbus_setup(base, size) + local f = intel_smbus_host + f.base = bit.band(base, bit.bnot(size-1)) + f.size = size + if not f.reg then + f.reg = { control = 0, status = 0, busy_count = 0, block_ptr = 0, aux_ctl = 0 } + end + smbus.init(f) + + enable_hook(io_hooks, f) +end + diff --git a/SerialICE/simba/interface.lua b/SerialICE/simba/interface.lua new file mode 100644 index 0000000..48ff8de --- /dev/null +++ b/SerialICE/simba/interface.lua @@ -0,0 +1,161 @@ + +-- IO, MMIO, RAM and ROM access +io_action = {} +mem_action = {} + +IO_READ = false +IO_WRITE = true +MEM_READ = false +MEM_WRITE = true + +-- CPUID and CPU MSR +MSR_READ = false +MSR_WRITE = true +CPUID = false + +cpu_action = {} +cpu_action.rin = {} +cpu_action.rout = {} + + + +-- SerialICE_io_read_filter is the filter function for IO reads. +-- +-- Parameters: +-- addr IO port to be read +-- size Size of the IO read +-- Return values: +-- to_hw True if the read should be directed to the target +-- to_qemu True if the read should be directed to Qemu + +function SerialICE_io_read_filter(addr, size) + pre_action(io_action, IO_READ, addr, size, 0) + walk_pre_hooks(io_hooks, io_action) + return io_action.to_hw, io_action.to_qemu +end + +-- Parameters: +-- data Data from hw or Qemu +-- Return values: +-- result Data to give back to Qemu + +function SerialICE_io_read_log(data) + post_action(io_action, data) + walk_post_hooks(io_hooks, io_action) + return io_action.data +end + +-- SerialICE_io_write_filter is the filter function for IO writes. +-- +-- Parameters: +-- addr IO port to be written to +-- size Size of the IO write +-- data Data to be written to +-- Return values: +-- to_hw True if the write should be directed to the target +-- to_qemu True if the write should be directed to Qemu +-- data Data to be written (possible changed in filter) + +function SerialICE_io_write_filter(addr, size, data) + pre_action(io_action, IO_WRITE, addr, size, data) + walk_pre_hooks(io_hooks, io_action) + return io_action.to_hw, io_action.to_qemu, io_action.data +end + +function SerialICE_io_write_log() + post_action(io_action) + walk_post_hooks(io_hooks, io_action) +end + + + + +-- SerialICE_memory_read_filter is the filter function for memory reads +-- +-- Parameters: +-- addr memory address to be read +-- size Size of the memory read +-- Return values: +-- to_hw True if the read should be directed to the target +-- to_qemu True if the read should be directed to Qemu + +function SerialICE_memory_read_filter(addr, size) + pre_action(mem_action, MEM_READ, addr, size, 0) + walk_pre_hooks(mem_hooks, mem_action) + return mem_action.to_hw, mem_action.to_qemu +end + +function SerialICE_memory_read_log(data) + post_action(mem_action, data) + walk_post_hooks(mem_hooks, mem_action) + return mem_action.data +end + + +-- SerialICE_memory_write_filter is the filter function for memory writes +-- +-- Parameters: +-- addr memory address to write to +-- size Size of the memory write +-- data Data to be written +-- Return values: +-- to_hw True if the write should be directed to the target +-- to_qemu True if the write should be directed to Qemu +-- result Data to be written (may be changed in filter) + +function SerialICE_memory_write_filter(addr, size, data) + pre_action(mem_action, MEM_WRITE, addr, size, data) + walk_pre_hooks(mem_hooks, mem_action) + return mem_action.to_hw, mem_action.to_qemu, mem_action.data +end + +function SerialICE_memory_write_log() + post_action(mem_action, 0) + walk_post_hooks(mem_hooks, mem_action) +end + +function SerialICE_msr_read_filter(addr) + pre_action(cpu_action, MSR_READ, 0, 0, 0) + load_regs(cpu_action.rin, 0, 0, addr, 0) + + walk_pre_hooks(cpumsr_hooks, cpu_action) + return cpu_action.to_hw, cpu_action.to_qemu +end + +function SerialICE_msr_read_log(hi, lo) + local rout = cpu_action.rout + post_action(cpu_action, 0) + load_regs(cpu_action.rout, lo, 0, 0, hi) + walk_post_hooks(cpumsr_hooks, cpu_action) + return rout.edx, rout.eax +end + +function SerialICE_msr_write_filter(addr, hi, lo) + local rin = cpu_action.rin + pre_action(cpu_action, MSR_WRITE, 0, 0, 0) + load_regs(cpu_action.rin, lo, 0, addr, hi) + walk_pre_hooks(cpumsr_hooks, cpu_action) + return cpu_action.to_hw, cpu_action.to_qemu, rin.edx, rin.eax +end + +function SerialICE_msr_write_log() + post_action(cpu_action, 0) + load_regs(cpu_action.rout, 0, 0, 0, 0) + walk_post_hooks(cpumsr_hooks, cpu_action) +end + +function SerialICE_cpuid_filter(eax, ecx) + pre_action(cpu_action, CPUID, 0, 0, 0) + load_regs(cpu_action.rin, eax, 0, ecx, 0) + walk_pre_hooks(cpuid_hooks, cpu_action) + return cpu_action.to_hw, cpu_action.to_qemu +end + +function SerialICE_cpuid_log(eax, ebx, ecx, edx) + local rout = cpu_action.rout + post_action(cpu_action, 0) + load_regs(cpu_action.rout, eax, ebx, ecx, edx) + walk_post_hooks(cpuid_hooks, cpu_action) + return rout.eax, rout.ebx, rout.ecx, rout.edx +end + diff --git a/SerialICE/simba/leftover.lua b/SerialICE/simba/leftover.lua new file mode 100644 index 0000000..05e516e --- /dev/null +++ b/SerialICE/simba/leftover.lua @@ -0,0 +1,136 @@ + + + -- ********************************************************** + -- + -- Dell 1850 BMC filter + + if action.addr == 0xe8 then + -- lua lacks a switch statement + if data == 0x44656c6c then printf("BMC: Dell\n") + elseif data == 0x50726f74 then printf("BMC: Prot\n") + elseif data == 0x496e6974 then + printf("BMC: Init (filtered)\n") + return true, data + else + printf("BMC: unknown %08x\n", data) + end + return false, data + end + + -- ********************************************************** + -- + -- Phoenix BIOS reconfigures 0:1f.0 reg 0x80/0x82. + -- This effectively wipes out our communication channel + -- so we mut not allow it. + + if action.addr == 0xcfc then + if is_pci_io_cfg(0x8000f880) then + printf("LPC (filtered)\n") + return true, data + end + + return false, data + end + + + -- ********************************************************** + -- + -- Intel 82945 (reference BIOS) RAM switch + -- + + -- The RAM initialization code for the i945 used by AMI and + -- Phoenix uses the same POST codes. We use this to determine + -- when RAM init is done on that chipset. + + + if action.addr == 0x80 and action.data == 0xff37 and ram_is_initialized == false then + ram_is_initialized = true + -- Register low RAM 0x00000000 - 0x000dffff + SerialICE_register_physical(0x00000000, 0xa0000) + -- SMI/VGA memory should go to the target... + SerialICE_register_physical(0x000c0000, 0x20000) + printf("\nLow RAM accesses are now directed to Qemu.\n") + + return false, data + end + + + -- ********************************************************** + -- + -- unknown io_write delay hooks + -- + + if ( action.addr == 0xed and action.data == 0x40 ) then + if ( regs.eip == 0x3ed and regs.ecx == 0x00000290 ) then + printf("Skipping IO delay...\n") + -- f100:03ed + regs.ecx = 0x05 + end + end + + if ( action.addr == 0xed and action.data == 0x83 ) + then + if ( regs.eip == 0x1bb and regs.ecx == 0x0000fff0 ) then + printf("Skipping IO delay...\n") + -- e002:01bb + regs.ecx = 0x10 + regs.ebx = 0x01 + end + end + + -- ********************************************************** + -- high memory write + + if action.addr == 0x00100000 then + if regs.cs == 0xe002 and regs.eip == 0x07fb then + -- skip high memory wipe + regs.ecx = 0x10 + end + if regs.cs == 0xe002 and regs.eip == 0x076c and regs.edi == 0x3f then + -- skip high memory test + regs.edi=1; + end + end + + + -- ********************************************************** + -- + -- io_read hooks, unknown vendor + + -- if action.addr == 0x42 then + -- printf("WARNING: Hijacking timer action.addr 0x42\n") + -- data = 0x80 + -- caught = true + -- end + + -- + -- + + if ( action.addr == 0x60 and data_size == 1 ) then + if ( regs.eip == 0xbd6d and regs.eax == 0x8aa and regs.ecx == 0x00fffff0 ) then + -- f000:bd6d + printf("Skipping keyboard timeout...\n") + regs.eax = 0x01aa + regs.ecx = 0x0010 + end + end + + + +-- ********************************************************** +-- +-- Vendor specific Cache-As-Ram regions + +printks(froot, "Registering physical memory areas for Cache-As-Ram:\n") + +-- Register Phoenix BIOS Cache as RAM area as normal RAM +-- 0xffd80000 - 0xffdfffff +new_car_region(0xffd80000, 0x80000) + +-- Register AMI BIOS Cache as RAM area as normal RAM +-- 0xffbc0000 - 0xffbfffff +new_car_region(0xffbc0000, 0x40000) + +-- current Phoenix BIOS +new_car_region(0xde000, 0x2000) + diff --git a/SerialICE/simba/memory.lua b/SerialICE/simba/memory.lua new file mode 100644 index 0000000..550df75 --- /dev/null +++ b/SerialICE/simba/memory.lua @@ -0,0 +1,244 @@ +-- ********************************************************** +-- + +function mem_undefined(f, action) + if (action.write) then + action.to_hw = true + action.to_qemu = false + else + action.to_hw = false + action.to_qemu = true + end + action.undefined = true + return true +end + +function mem_post(f, action) + if (action.write) then + printk(f, action, "write%s %08x <= %s", size_suffix(action.size), action.addr, size_data(action.size, action.data)) + else + printk(f, action, " read%s %08x => %s", size_suffix(action.size), action.addr, size_data(action.size, action.data)) + end + if action.to_hw then + printf(" *") + end + printf("\n") + return true +end + +function mem_base_post(f, action) + if (action.write) then + printk(f, action, "[%08x] <= %s\n", bit.band(action.addr, (f.size - 1)), size_data(action.size, action.data)) + else + printk(f, action, "[%08x] => %s\n", bit.band(action.addr, (f.size - 1)), size_data(action.size, action.data)) + end + return true +end + + +filter_mem_fallback = { + id = -1, + name = "MEM", + pre = mem_undefined, + post = mem_post, + base = 0x0, + size = 0x100000000 +} + +-- ********************************************************** +-- ROM access + +function mem_qemu_rom_pre(f, action) + action.to_hw = false + action.to_qemu = true + -- Reads from ROM space do not count for filter change. + if not action.write then + ignore_action(f, action) + end + return true +end + +function mem_rom_post(f, action) + if not action.write then + return true + end + -- Writes to ROM space fall-thru to the fallback filter, + -- so they get logged there. + return false +end + +filter_rom_low = { + id = -1, + name = "ROM_LO", + pre = mem_qemu_rom_pre, + post = mem_rom_post, + hide = hide_rom_access, + base = 0xE0000, + size = 0x20000 +} +filter_rom_high = { + id = -1, + name = "ROM_HI", + pre = mem_qemu_rom_pre, + post = mem_rom_post, + hide = hide_rom_access, + base = rom_base, + size = rom_size, +} + +-- ********************************************************** +-- CAR access + +function car_qemu_only(f, action) + action.to_hw = false + action.to_qemu = true + return true +end + +function car_post(f, action) + return true +end + +function new_car_region(start, size) + f = {} + f.id = -1 + f.name = "CAR" + f.base = start + f.size = size + f.pre = car_qemu_only + f.post = car_post + f.hide = true + enable_hook(mem_hooks, f) + SerialICE_register_physical(start, size) +end + + +-- ********************************************************** +-- RAM access. + +-- In the beginning, during RAM initialization, it is essential that +-- all DRAM accesses are handled by the target, or RAM will not work +-- correctly. After RAM initialization, RAM access has no "special" +-- meaning anymore, so we can just use Qemu's memory (and thus get +-- an incredible speed-up) + +-- Not catching the end of RAM init is not problematic, except +-- that it makes decompression of the BIOS core to RAM incredibly +-- slow as the decompressor inner loop has to be fetched +-- permanently from the target (several reads/writes per +-- decompressed byte). + +ram_is_initialized = false + +-- This is handled by SerialICE but *NOT* exclusively. +-- Writes end up in Qemu memory, too +function mem_ram_low(f, action) + if ram_is_initialized then + -- RAM init is done. Send all RAM accesses + -- to Qemu. Using the target as storage would + -- only slow execution down. + action.to_hw = false + action.to_qemu = true + else + -- RAM init has not been marked done yet. + -- so send reads to the target only. + action.to_hw = true + action.to_qemu = action.write + end + return true +end + +-- SMI/VGA writes go to target and qemu +-- SMI/VGA reads come from target +function mem_smi_vga(f, action) + if action.write then + action.to_hw = true + action.to_qemu = true + else + action.to_hw = true + action.to_qemu = false + end + return true +end + + +function mem_post_pre_ram_only(f, action) + return ram_is_initialized +end + +filter_ram_low = { + id = -1, + name = "MEM", + pre = mem_ram_low, + post = mem_post_pre_ram_only, + hide = true, + base = 0x0, + size = 0xa0000 +} + +filter_smi_vga = { + id = -1, + name = "SMI_VGA", + pre = mem_smi_vga, + post = mem_post, + hide = true, + base = 0x000a0000, + size = 0x00010000, +} + +filter_ram_low_2 = { + id = -1, + name = "MEM", + pre = mem_ram_low, + post = mem_post_pre_ram_only, + hide = true, + base = 0xc0000, + size = 0x20000 +} + + +function mem_target_only(f, action) + action.to_hw = true + action.to_qemu = false + return true +end + +-- 3.25GB RAM. This is handled by SerialICE. +-- FIXME: use TOLM here + +-- We refrain from backing up this memory in Qemu because Qemu would +-- need lots of ram on the host and firmware usually does not intensively +-- use high memory anyways. +filter_ram_high = { + id = -1, + name = "MEM", + pre = mem_target_only, + post = mem_post_pre_ram_only, + hide = true, + base = 0x100000, + size = 0xd0000000 - 0x100000 +} + + +function ram_enabled() + return ram_is_initialized +end + +function enable_ram() + + enable_hook(mem_hooks, filter_ram_low) + enable_hook(mem_hooks, filter_smi_vga) + enable_hook(mem_hooks, filter_ram_low_2) + enable_hook(mem_hooks, filter_ram_high) + + -- Register low RAM 0x00000000 - 0x000dffff + SerialICE_register_physical(0x00000000, 0xa0000) + -- SMI/VGA memory should go to the target... + SerialICE_register_physical(0x000c0000, 0x20000) + --printf("Low RAM accesses are now directed to Qemu.\n") + ram_is_initialized = true +end + + + + diff --git a/SerialICE/simba/mmio.lua b/SerialICE/simba/mmio.lua new file mode 100644 index 0000000..85b86f2 --- /dev/null +++ b/SerialICE/simba/mmio.lua @@ -0,0 +1,83 @@ + +-- ********************************************************** +-- +-- Vendor independent X86 memory mapped IO + +-- Local APIC +-- We should avoid that someone wakes up cores +-- on the target system that go wild. +function mem_lapic(f, action) + if bit.band(action.addr, f.size-1) == 0x300 then + -- replace Start-Up IPI with Init IPI + if action.write and bit.band(action.data, 0xf0f00) == 0xc0600 then + return fake_action(f, action, 0xc0500) + end + end + return handle_action(f, action) +end + +filter_lapic = { + id = -1, + name = "LAPIC", + pre = mem_lapic, + post = mem_base_post, + hide = true, + base = 0xfee00000, + size = 0x00010000, +} + +-- IOAPIC +filter_ioapic = { + id = -1, + name = "IOAPIC", + pre = mem_target_only, + post = mem_base_post, + hide = true, + base = 0xfec00000, + size = 0x00010000, +} + + +-- ********************************************************** +-- Intel 82945 PCIe BAR + +function i945_pcie_bar(dev, reg, base) + -- size is hard coded 64k for now. + pcie_mm_cfg_bar(bit.band(0xfc000000, base) % 0x100000000, 64 * 1024) +end + +dev_i945 = { + pci_dev = pci_bdf(0,0,0,0), + name = "i945", + bar = {}, +} + +function enable_pcie_mm_cfg() + add_mem_bar(dev_i945, 0x48, i945_pcie_bar) +end + +-- ********************************************************** +-- +-- Intel chipset BARs are exclusively handled by the +-- SerialICE target + +filter_intel_bars = { + id = -1, + name = "IntelBAR", + pre = mem_target_only, + post = mem_base_post, + base = 0xfed10000, + size = 0x00010000, +} + +-- ICH7 TPM +-- Phoenix "Secure" Core bails out if we don't pass the read on ;-) +filter_ich7_tpm = { + id = -1, + name = "ICH7 TPM", + pre = mem_target_only, + post = mem_base_post, + base = 0xfed40000, + size = 0x00005000, +} + diff --git a/SerialICE/simba/output.lua b/SerialICE/simba/output.lua new file mode 100644 index 0000000..c3bf4e4 --- /dev/null +++ b/SerialICE/simba/output.lua @@ -0,0 +1,81 @@ + + +froot = { + id = 0, + name = "SerialICE", +} + +fresource = { + id = -1, + name = "Resource", +} + +-- ------------------------------------------------------------------- +-- logging functions + +function printf(s,...) + return io.write(s:format(...)) +end + +function printk(f, action, fmt, ...) + if ip_logging then + printf("[%04x:%04x] ", action.cs, action.eip) + end + + if ip_logging then + printf("%04x.%04x ", action.parent_id, action.my_id) + end + + local str = " " + if action.dropped or action.faked then + str = "!" + end + if action.undefined then + str = "#" + end + + if action.f then + printf("%s %s,%s: ", str, f.name, action.f.name) + printf(fmt, ...) + else + printf("%s %s: ", str, f.name) + printf(fmt, ...) + end +end + +function printks(f, fmt, ...) + if ip_logging then + printf("[%04x:%04x] ", 0, 0) + end + + if ip_logging then + printf("%04x.%04x ", 0, 0) + end + printf(" %s: ", f.name) + printf(fmt, ...) +end + +function trim (s) + return (string.gsub(s, "^%s*(.-)%s*$", "%1")) +end + +function size_suffix(size) + if size == 1 then return "b" + elseif size == 2 then return "w" + elseif size == 4 then return "l" + elseif size == 8 then return "ll" + else return string.format("invalid size: %d", size) + end +end + +function size_data(size, data) + if size == 1 then return string.format("%02x", data) + elseif size == 2 then return string.format("%04x", data) + elseif size == 4 then return string.format("%08x", data) + elseif size == 8 then return string.format("%16x", data) + else return string.format("Error: size=%x", size) + end +end + + + diff --git a/SerialICE/simba/pc80.lua b/SerialICE/simba/pc80.lua new file mode 100644 index 0000000..f259628 --- /dev/null +++ b/SerialICE/simba/pc80.lua @@ -0,0 +1,546 @@ +-- ********************************************************** +-- +-- Debug POST port at IO 0x80 + +function debugport_post(f, action) + if action.write then + printk(f, action, "*** %02x ***\n", action.data) + return true + end + return false +end + +filter_debugport = { + id = -1, + name = "POST", + pre = handle_action, + post = debugport_post, + hide = true, + base = 0x80, + size = 0x1 +} + + +-- ********************************************************** +-- +-- i8259 PIC + +function i8259_pre(f, action) + local master = (bit.rshift(0x05, action.addr) == 0x1) + local slave = (bit.rshift(0x05, action.addr) == 0x5) + local reg = bit.band(0x03, action.addr) + if reg == 0 or reg == 1 then + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8259_post(f,action) + local reg = bit.band(0x03, action.addr) + if reg == 0 or reg == 1 then + return true + end + return false +end + +function i8259_edge_pre(f, action) + return handle_action(f, action) +end + +function i8259_edge_post(f,action) + return true +end + +filter_i8259_master = { + id = -1, + name = "i8259 A", + pre = i8259_pre, + post = i8259_post, + hide = hide_i8259_io, + base = 0x20, + size = 0x20 +} + +filter_i8259_slave = { + id = -1, + name = "i8259 B", + pre = i8259_pre, + post = i8259_post, + hide = hide_i8259_io, + base = 0xa0, + size = 0x20 +} + +filter_i8259_edge = { + id = -1, + name = "i8259 C", + pre = i8259_edge_pre, + post = i8259_edge_post, + hide = hide_i8259_io, + base = 0x4d0, + size = 0x2 +} + +-- ********************************************************** +-- +-- i8237 DMA + +function i8237_pre(f, action) + if action.addr == 0x80 then + return skip_filter(f, action) + end + return handle_action(f, action) +end + +function i8237_post(f, action) + if action.addr == 0x80 then + return false + end + return true +end + + +filter_i8237_a = { + id = -1, + name = "i8237 A", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0x00, + size = 0x20 +} +filter_i8237_b = { + id = -1, + name = "i8237 B", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0x80, + size = 0x20 +} +filter_i8237_c = { + id = -1, + name = "i8237 C", + pre = i8237_pre, + post = i8237_post, + hide = hide_i8237_io, + base = 0xc0, + size = 0x20 +} + + +-- ********************************************************** +-- +-- i8254 IRQ0 and Speaker + +function i8254_pre(f, action) + + -- nothing to do on reads + if not action.write then + return handle_action(f, action) + end + + local reg = bit.band(0x03, action.addr) + if reg >= 0x0 and reg < 0x03 then + local counter_n = 0 + local counter_p = 0 + if f.counter[reg].lsb then + f.counter[reg].lsb = f.counter[reg].after_lsb + counter_n = action.data + counter_p = bit.band(0xff00, f.counter[reg].init) + else + counter_n = bit.lshift(action.data, 8) + counter_p = bit.band(0x00ff, f.counter[reg].init) + end + f.counter[reg].init = bit.bor(counter_n, counter_p) + elseif reg == 0x03 then + local reg2 = bit.rshift(action.data, 6) + local rwsel = bit.band(0x3, bit.rshift(action.data, 4)) + if reg2 == 0x3 then + if bit.band(0x10, action.data) == 0 then + f.counter[0].readback = (bit.band(0x2, action.data) ~= 0) + f.counter[1].readback = (bit.band(0x4, action.data) ~= 0) + f.counter[2].readback = (bit.band(0x8, action.data) ~= 0) + end + if bit.band(0x20, action.data) == 0 then + f.counter[0].latch = (bit.band(0x2, action.data) ~= 0) + f.counter[1].latch = (bit.band(0x4, action.data) ~= 0) + f.counter[2].latch = (bit.band(0x8, action.data) ~= 0) + end + elseif rwsel == 0x0 then + f.counter[reg2].latch = true + else + f.counter[reg2].mode = bit.band(0xf, action.data) + if rwsel == 0x1 then + f.counter[reg2].lsb = true + f.counter[reg2].after_lsb = true + elseif rwsel == 0x2 then + f.counter[reg2].lsb = false + f.counter[reg2].after_lsb = false + elseif rwsel == 03 then + f.counter[reg2].lsb = true + f.counter[reg2].after_lsb = false + end + end + end + return handle_action(f, action) +end + +function i8254_post(f, action) + local reg = bit.band(0x03, action.addr) + if reg >= 0x0 and reg < 0x03 then + if action.write then + local mode = bit.band(0x0f, f.counter[reg].mode); + local modestr = "Mode" .. mode + if mode == 0x4 then + modestr = "Square Wave" + elseif mode == 0x6 then + modestr = "Rate Generator" + end + if bit.band(0x01, mode) ~= 0 then + modestr = modestr .. " (BCD)" + end + + local period = 838 * f.counter[reg].init + if reg == 0 then + if period == 0 then + printk(f, action, "IRQ0 disabled\n") + else + printk(f, action, "IRQ0 (%s): %d ns\n", modestr, period) + end + elseif reg == 1 then + if period == 0 then + printk(f, action, "Refresh disabled\n") + else + printk(f, action, "Refresh (%s): %d ns\n", modestr, period) + end + elseif reg == 2 then + if period ~= 0 then + local spktone = 1193000 / f.counter[reg].init + printk(f, action, "Speaker Tone (%s): %d kHz\n", modestr, spktone) + end + end + else + if f.counter[reg].readback then + f.counter[reg].readback = false + f.counter[reg].status = action.data + printk(f, action, "[%d] status = %02x\n", reg, f.counter[reg].status) + end + if f.counter[reg].latch then + f.counter[reg].latch = false + f.counter[reg].current = action.data + printk(f, action, "[%d] current = %d\n", reg, f.counter[reg].current) + end + end + elseif reg == 0x03 then + end + return true +end + +i8254_counters = {} +i8254_counters[0x0] = { init=0, current=0, latch, readback, status=0 } +i8254_counters[0x1] = { init=0, current=0, latch, readback, status=0 } +i8254_counters[0x2] = { init=0, current=0, latch, readback, status=0 } + +filter_i8254_a = { + id = -1, + name = "i8254 A", + pre = i8254_pre, + post = i8254_post, + base = 0x40, + hide = hide_i8254_io, + size = 4, + counter = i8254_counters, +} +filter_i8254_b = { + id = -1, + name = "i8254 B", + pre = i8254_pre, + post = i8254_post, + base = 0x50, + hide = hide_i8254_io, + size = 4, + counter = i8254_counters, +} + + +-- ********************************************************** +-- +-- i8042 KBD, A20, Reset(?) + +function i8042_write(f, action) + if action.addr == 0x60 then + f.reg.data = action.data + f.reg.sts = bit.band(f.reg.sts, 0xf7) + if (f.reg.cmd == 0xd1) then + f.reg.A20 = (bit.band(0x02, action.data) == 0x02) + end + return handle_action(f, action) + end + if action.addr == 0x64 then + f.reg.cmd = action.data + f.reg.sts = bit.bor(f.reg.sts, 0x0a) + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8042_read(f, action) + if action.addr == 0x60 then + f.reg.sts = bit.band(f.reg.sts, 0xfe) + return handle_action(f, action) + end + if action.addr == 0x64 then + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function i8042_pre(f, action) + if (action.write) then + return i8042_write(f, action) + else + return i8042_read(f, action) + end +end + +function i8042_post(f, action) + if action.addr == 0x60 then + if action.write and f.reg.cmd == 0xd1 then + if f.reg.A20 then + printk(f, action, "A20 enabled\n") + else + printk(f, action, "A20 disabled\n") + end + end + return true + end + if action.addr == 0x64 then + return true + end + return false +end + +filter_i8042 = { + id = -1, + name = "i8042", + pre = i8042_pre, + post = i8042_post, + hide = hide_i8042_io, + base = 0x60, + size = 0x5, + reg = { data = 0, sts = 0, cmd = 0, A20 = 0 } +} + + +-- ********************************************************** +-- +-- CMOS nvram + + +function nvram_bank(addr) + if bit.band(0xfe, addr) == 0x70 then + return 1 + elseif bit.band(0xfe, addr) == 0x72 then + return 2 + elseif bit.band(0xfe, addr) == 0x74 then + return 2 + else + return 0 + end +end + +function nvram_write(f, action) + local val = action.data + local rtc = false + local is_index = (bit.band(0x01, action.addr) == 0x0) + local bank = nvram_bank(action.addr) + + if bank == 1 then + if is_index then + f.reg.p70 = bit.band(0x7f, val) + if f.reg.p70 < 0x0E then + rtc = true + end + else + f.nvram_data[f.reg.p70] = val + f.nvram_set[f.reg.p70] = true + if f.reg.p70 < 0x0E then + rtc = true + end + end + elseif bank == 2 then + if is_index then + f.reg.p72 = bit.band(0x7f, val) + else + local index = 0x80 + f.reg.p72 + f.nvram_data[index] = val + f.nvram_set[index] = true + end + end + if cache_nvram and not rtc then + return fake_action(f, action, val) + else + return handle_action(f, action) + end +end + +function nvram_read(f, action) + local val = 0 + local rtc = false + local is_index = (bit.band(0x01, action.addr) == 0x0) + local bank = nvram_bank(action.addr) + + if bank == 1 then + if is_index then + -- NMI returned as 0 + val = f.reg.p70 + if f.reg.p70 < 0x0E then + rtc = true + end + else + if f.reg.p70 < 0x0E then + rtc = true + elseif f.nvram_set[f.reg.p70] then + val = f.nvram_data[f.reg.p70] + end + end + else -- bank + if is_index then + -- NMI returned as 0 + val = f.reg.p72 + else + local index = 0x80 + f.reg.p72 + if f.nvram_set[index] then + val = f.nvram_data[index] + end + end + end + if cache_nvram and not rtc then + return fake_action(f, action, val) + else + return handle_action(f, action) + end +end + +function nvram_pre(f, action) + if (action.write) then + return nvram_write(f, action) + else + return nvram_read(f, action) + end +end + +function nvram_post(f, action) + if bit.band(0x01, action.addr) == 0x0 then + return true + end + + local bank = nvram_bank(action.addr) + if (action.write) then + if bank == 1 then + printk(f, action, "[%02x] <= %02x\n", f.reg.p70, action.data) + elseif bank == 2 then + printk(f, action, "[%02x] <= %02x\n", 0x80 + f.reg.p72, action.data) + end + else + if bank == 1 then + printk(f, action, "[%02x] => %02x\n", f.reg.p70, action.data) + elseif bank == 2 then + printk(f, action, "[%02x] => %02x\n", 0x80 + f.reg.p72, action.data) + end + end + return true +end + +filter_nvram = { + id = -1, + name = "NVram", + pre = nvram_pre, + post = nvram_post, + base = 0x70, + size = 8, + hide = hide_nvram_io, + reg = { p70 = 0, p72 = 0 }, + nvram_data = {}, + nvram_set = {}, +} + + +-- ********************************************************** +-- +-- Reset at 0xcf9 + +function sys_rst_pre(f, action) + if action.size == 1 then + if action.write and bit.band(action.data, 0x04) == 0x04 then + SerialICE_system_reset() + end + return handle_action(f, action) + end + return skip_filter(f, action) +end + +function sys_rst_post(f, action) + if action.size == 1 then + if action.write then + printk(f, action, "Control = %02x\n", action.data) + return true + end + end + return false +end + +filter_reset = { + id = -1, + name = "Reset", + pre = sys_rst_pre, + post = sys_rst_post, + hide = false, + base = 0xcf9, + size = 1 +} + +-- ********************************************************** +-- +-- VGA io + +function vga_io_pre(f, action) + return skip_filter(f, action) +end + +function vga_io_post(f, action) + return true +end + +filter_vga_io = { + id = -1, + name = "VGA", + pre = vga_io_pre, + post = vga_io_post, + hide = false, + base = 0x3c0, + size = 0x20, +} + + +-- ********************************************************** +-- +-- Enable all PC80 stuff + +function enable_hook_pc80() + enable_hook(io_hooks, filter_i8237_a) + enable_hook(io_hooks, filter_i8237_b) + enable_hook(io_hooks, filter_i8237_c) + enable_hook(io_hooks, filter_i8259_master) + enable_hook(io_hooks, filter_i8259_slave) + enable_hook(io_hooks, filter_i8259_edge) + enable_hook(io_hooks, filter_i8042) + enable_hook(io_hooks, filter_i8254_a) + enable_hook(io_hooks, filter_i8254_b) + enable_hook(io_hooks, filter_reset) + enable_hook(io_hooks, filter_nvram) + enable_hook(io_hooks, filter_vga_io) + enable_hook(io_hooks, filter_debugport) +end + diff --git a/SerialICE/simba/replay.lua b/SerialICE/simba/replay.lua new file mode 100644 index 0000000..a168d7e --- /dev/null +++ b/SerialICE/simba/replay.lua @@ -0,0 +1,171 @@ + + +function SerialICE_register_physical() +end + +function SerialICE_system_reset() +end + +SerialICE_mainboard = "undetected" + +regs = { eax, ebc, ecx, edx, cs=0, eip=0, ds, es, ss, gs, fs, } +ids = { parent, this, } + +function replay_io(dir_wr, addr, size, data) + pre_action(io_action, dir_wr, addr, size, data) + walk_pre_hooks(io_hooks, io_action) + io_action.data = data + post_action(io_action, data) + walk_post_hooks(io_hooks, io_action) +end + +function replay_mem(dir_wr, addr, size, data) + pre_action(mem_action, dir_wr, addr, size, data) + walk_pre_hooks(mem_hooks, mem_action) + mem_action.data = data + post_action(mem_action, data) + walk_post_hooks(mem_hooks, mem_action) +end + +function replay_unknown(str) + local dummy = {} + pre_action(dummy, false, 0, 0, 0) + post_action(dummy, 0) + io.write(string.format("[%04x:%04x] %04x.%04x %s\n", + regs.cs, regs.eip, ids.parent, ids.this, str)) +end + +function parse_io(line) + local io_op = "IO:?%s+%a+%s+(%x+)%s+(<?=>?)%s+(%x+)" + local found, addr, dir, data + found, _, addr, dir, data = string.find(line, io_op) + if not found then + return false + end + local naddr = tonumber(addr, 16) + local ndata = tonumber(data, 16) + local nsize = string.len(data)/2 + if string.find("<=", dir) then + replay_io(true, naddr, nsize, ndata) + else + replay_io(false, naddr, nsize, ndata) + end + return true +end + +function parse_mem(line) + local mem_op = "MEM:?%s+%a+%s+(%x+)%s+(<?=>?)%s+(%x+)" + local found, addr, dir, data + found, _, addr, dir, data = string.find(line, mem_op) + if not found then + return false + end + local naddr = tonumber(addr, 16) + local ndata = tonumber(data, 16) + local nsize = string.len(data)/2 + if string.find("<=", dir) then + replay_mem(true, naddr, nsize, ndata) + else + replay_mem(false, naddr, nsize, ndata) + end + return true +end + +-- Old script already parsed PCI config, synthesize those IOs back. +function parse_pci(line) + local found, bus, dev, fn, reg, dir, data + local pci_cfg = "PCI:?%s+(%x):(%x+).(%x+)%s+R.(%x+)%s+(<?=>?)%s+(%x+)" + found, _, bus, dev, fn, reg, dir, data = string.find(line, pci_cfg) + if not found then + local pci_cfg_empty = "PCI:?%s+(%x):(%x+).(%x+)%s+R.(%x+)" + if string.find(line, pci_cfg_empty) then + return true + end + return false + end + + local nreg = bit.band(0xfc, tonumber(reg,16)) + local noff = bit.band(0x03, tonumber(reg,16)) + local ndata = tonumber(data,16) + local nsize = string.len(data)/2 + + replay_io(true, 0xcf8, 4, pci_bdf(tonumber(bus,16), tonumber(dev,16), tonumber(fn,16), nreg)) + if string.find("<=", dir) then + replay_io(true, 0xcfc + noff, nsize, ndata) + else + replay_io(false, 0xcfc + noff, nsize, ndata) + end + return true +end + +function parse_headers() + while true do + local found = false + line = io.read("*line") + if not found then + local board + found, _, board = string.find(line, "SerialICE: Mainboard...:%s+(.+)") + if found then + SerialICE_mainboard = board + end + end +-- io.write(line) +-- io.write("\n") + if string.find(line, "LUA script initialized.") then + return + end + end +end + +function parse_file() + while true do + local iplog = false + local found = false + local line, str, cs, eip, a, b + + line = io.read("*line") + if not line then + return + end + + regs.cs = 0 + regs.eip = 0 + ids.parent = 0 + ids.this = 0 + iplog, _, cs, eip, a, b, str = string.find(line, "%[(%x+):(%x+)%]%s+(%x+)[%.:](%x+)...(.*)") + if iplog then + regs.cs = tonumber(cs, 16) + regs.eip = tonumber(eip, 16) + ids.parent = tonumber(a, 16) + ids.this = tonumber(b, 16) + end + + if not iplog then + str = line + end + + if not found then + found = parse_io(str) + end + if not found then + found = parse_pci(str) + end + if not found then + found = parse_mem(str) + end + + if not found then + replay_unknown(str) + end + end +end + +parse_headers() + +dofile("serialice.lua") + +parse_file() + + + + diff --git a/SerialICE/simba/serialice.lua b/SerialICE/simba/serialice.lua new file mode 100644 index 0000000..e958a1f --- /dev/null +++ b/SerialICE/simba/serialice.lua @@ -0,0 +1,119 @@ +-- SerialICE +-- +-- Copyright (c) 2009 coresystems GmbH +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + +io.write("SerialICE: Starting LUA script\n") + +-- If you get an error here, install bitlib +-- (ie. http://luaforge.net/projects/bitlib/) +require("bit") + + +-- Set to "false" to show undecoded IO accesses +-- for the specified class +hide_pci_io_cfg = true +hide_pci_mm_cfg = true +hide_superio_cfg = true +hide_nvram_io = true +hide_smbus_io = true +hide_mainboard_io = true +hide_i8254_io = true +hide_i8042_io = false +hide_i8237_io = true +hide_i8259_io = true + +-- Set to "true" to log every memory and IO access +log_everything = false + + + +-- Use lua table for NVram +-- RTC registers 0x0-0xd go to HW +cache_nvram = false + +-- SMSC 0x07, Winbond 0x06 ? +DEFAULT_SUPERIO_LDN_REGISTER = 0x07 + +-- Set to "false" to log access to ROM regions + +hide_rom_access = true + +-- Set to "true" to log CS:IP for each access + +ip_logging = true + + +rom_size = 4 * 1024 * 1024 +rom_base = 0x100000000 - rom_size + + +-- -------------------------------------------------------------------- +-- This initialization is executed right after target communication +-- has been established + +dofile("interface.lua") +dofile("output.lua") +dofile("hooks.lua") +dofile("core_io.lua") +dofile("memory.lua") +dofile("cpu.lua") +dofile("superio.lua") +dofile("pc80.lua") +dofile("mmio.lua") + +function do_minimal_setup() + enable_hook(io_hooks, filter_io_fallback) + enable_hook(mem_hooks, filter_mem_fallback) + enable_hook(cpumsr_hooks, filter_cpumsr_fallback) + enable_hook(cpuid_hooks, filter_cpuid_fallback) + enable_hook(mem_hooks, filter_rom_low) + enable_hook(mem_hooks, filter_rom_high) +end + +function do_default_setup() + enable_ram() + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook_pc80() + enable_hook_superio(0x2e, DEFAULT_SUPERIO_LDN_REGISTER) + enable_hook_superio(0x4e, DEFAULT_SUPERIO_LDN_REGISTER) + enable_hook(io_hooks, filter_com1) +end + +mainboard_file = string.format("%s.lua", string.lower(string.gsub(SerialICE_mainboard, "[ -]", "_"))) +local mainboard_lua = loadfile(mainboard_file) +if (mainboard_lua) then + mainboard_lua() + printks(froot, "Mainboard script %s initialized.\n", mainboard_file) + do_minimal_setup() + do_mainboard_setup() +else + printks(froot, "Mainboard script %s not found.\n", mainboard_file) + do_minimal_setup() + do_default_setup() +end + +printks(froot, "LUA script initialized.\n") + +return true + diff --git a/SerialICE/simba/smbus_host.lua b/SerialICE/simba/smbus_host.lua new file mode 100644 index 0000000..90ab9ea --- /dev/null +++ b/SerialICE/simba/smbus_host.lua @@ -0,0 +1,559 @@ + + +local debug_smbus = false +smbus = {} + +smbus.host = { + state = { current = 0, jump_to = 0 }, + proto = 0, + start_proto = 0, + + passive = true, + signals = 0, + + slave = 0, + cmd = 0, + data0 = 0, + data1 = 0, + data0_valid = false, + data1_valid = false, + wr_data0 = 0, + wr_data1 = 0, + block_register = 0, + + block = {}, + max_index = 0, +} + +MAX_BLOCK_SRAM = 32 + +if true then + for i = 0, MAX_BLOCK_SRAM-1, 1 do + smbus.host.block[i] = { hw = 0, tmp = 0, hw_valid = false, tmp_valid = false } + end +end + +-- ******************* + +SIG_INUSE = 0 +SIG_RELEASE = 1 +SIG_START = 2 +SIG_ABORT = 3 +SIG_DONE = 4 +SIG_ACK = 5 +SIG_TIMEOUT = 6 +SIG_TIMEOUT_ACK = 7 +SIG_DATA_WRITE = 8 + +local function signal_reset(f) + f.host.signals = 0 +end + +local function signal_set(f, flag) + local mask = bit.lshift(1, flag) + f.host.signals = bit.bor(f.host.signals, mask) +end + +local function signal_clr(f, flag) + local mask = bit.bnot(bit.lshift(1, flag)) + f.host.signals = bit.band(f.host.signals, mask) + +end + +local function signal_in(f, flag) + local mask = bit.lshift(1, flag) + return bit.band(f.host.signals, mask) ~= 0 +end + +-- ******************* + +-- SMBus Protocol Message Types +SMBUS_NOOP = 0 +SMBUS_QUICK = 1 +SMBUS_BYTE = 2 +SMBUS_BYTE_DATA = 3 +SMBUS_WORD_DATA = 4 +SMBUS_PROC_CALL = 5 +SMBUS_BLOCK_DATA = 6 +SMBUS_I2C_BLOCK_DATA = 7 +SMBUS_BLOCK_PROCESS = 8 + +local proto_name = {} +proto_name[SMBUS_NOOP] = "(no-op)" +proto_name[SMBUS_QUICK] = "quick" +proto_name[SMBUS_BYTE] = "byte" +proto_name[SMBUS_BYTE_DATA] = "byte_data" +proto_name[SMBUS_WORD_DATA] = "word_data" +proto_name[SMBUS_PROC_CALL] = "proc_call" +proto_name[SMBUS_BLOCK_DATA] = "block" +proto_name[SMBUS_I2C_BLOCK_DATA] = "i2c_block" +proto_name[SMBUS_BLOCK_PROCESS] = "block_process" + +-- SMBus Host +SMB_REG_CMD = 1 +SMB_REG_SLAVE = 2 +SMB_REG_DATA0 = 3 +SMB_REG_DATA1 = 4 +SMB_REG_BLOCK = 5 +SMB_REG_PROTO = 6 + + +local function dump_block(f, length) + local block = "" + local max_length = math.min(length, MAX_BLOCK_SRAM) + + for i=0, max_length-1, 1 do + if f.host.block[i].hw_valid then + block = block .. string.format(" %02x", f.host.block[i].hw) + else + block = block .. " xx" + end + end + return block +end + + +-- FIXME: Probably wrong for process calls and hw-dependent. +local function host_proto(f, proto) + return f.host.proto == proto +end + +local function host_reading(f) + return bit.band(f.host.slave, 0x01) == 0x01 +end + + + +local function dump_transaction(f, action) + + local data0, data1, length, dir + local invalid_data = "xx" + local iodir = {} + iodir[0] = "<=" + iodir[1] = "=>" + + if host_reading(f) then + dir = iodir[1] + data0 = invalid_data + length = f.host.max_index + if f.host.data0_valid then + length = f.host.data0 + data0 = string.format("%02x", f.host.data0) + end + data1 = invalid_data + if f.host.data1_valid then + data1 = string.format("%02x", f.host.data1) + end + else + dir = iodir[0] + length = f.host.wr_data0 + data0 = string.format("%02x", f.host.wr_data0) + data1 = string.format("%02x", f.host.wr_data1) + end + + + local dump = string.format("%02x %s ", f.host.slave / 2, proto_name[f.host.proto]) + + if host_proto(f, SMBUS_QUICK) then + + elseif host_proto(f, SMBUS_BYTE) then + dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) + + elseif host_proto(f, SMBUS_BYTE_DATA) then + dump = dump .. string.format("%02x %s %s", f.host.cmd, dir, data0) + + elseif host_proto(f, SMBUS_WORD_DATA) then + dump = dump .. string.format("%02x %s %s%s", f.host.cmd, dir, data0, data1) + + elseif host_proto(f, SMBUS_PROC_CALL) then + dump = dump .. string.format("%02x %02x %02x %s %s %s", f.host.cmd, + f.host.wr_data0, f.host.wr_data1, iodir[1], data0, data1) + + elseif host_proto(f, SMBUS_BLOCK_DATA) then + dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, dir) + dump = dump .. dump_block(f, length) .. "" + + elseif host_proto(f, SMBUS_I2C_BLOCK_DATA) then + dump = dump .. string.format("%02x %02x %02x len=%02d %s", + f.host.cmd, f.host.data0, f.host.data1, f.host.max_index, dir) + dump = dump .. dump_block(f, length) .. "" + + elseif host_proto(f, SMBUS_BLOCK_PROCESS) then + dump = dump .. string.format("%02x len=%02d %s", f.host.cmd, length, iodir[1]) + dump = dump .. dump_block(f, length) .. "" + else + dump = dump .. "Cannot parse command" + end + + if signal_in(f, SIG_TIMEOUT) then + action.undefined = true + dump = dump .. " (TIMEOUT) " + end + + printk(f, action, "%s\n", dump) +end + + +-- ******************* + +HOST_NOOP = 0 +HOST_IDLE = 1 +HOST_ACTIVE = 2 +HOST_STARTED = 3 +HOST_WAIT = 4 +HOST_COMPLETE = 5 +HOST_FAIL = 6 + +local ctrl_state = {} +ctrl_state[HOST_NOOP] = "noop" +ctrl_state[HOST_IDLE] = "idle" +ctrl_state[HOST_ACTIVE] = "active" +ctrl_state[HOST_STARTED] = "started" +ctrl_state[HOST_WAIT] = "wait" +ctrl_state[HOST_COMPLETE] = "complete" +ctrl_state[HOST_FAIL] = "failed" + +function dprintk(...) + if debug_smbus then + printk(...) + end +end + +local function host_jump(f, state) + f.host.state.jump_to = state +end + +local function host_change_state(f, prev_state, new_state) + + if new_state == HOST_NOOP then + --printk(f, f.host.action, "state switch to HOST_NOOP\n") + new_state = HOST_IDLE + end + + dprintk(f, f.host.action, "%s -> %s\n", + ctrl_state[prev_state], ctrl_state[new_state]) + + -- Jumping to current is no jump. + f.host.state.current = new_state + f.host.state.jump_to = new_state + + if smbus.state(f, HOST_IDLE) then + signal_reset(f) + + elseif smbus.state(f, HOST_ACTIVE) then + signal_reset(f) + signal_set(f, SIG_INUSE) + + elseif smbus.state(f, HOST_STARTED) then + local i + f.host.proto = f.host.start_proto + f.host.wr_data0 = f.host.data0 + f.host.wr_data1 = f.host.data1 + + -- Invalidation used with reads + f.host.data0_valid = false + f.host.data1_valid = false + + for i = 0, MAX_BLOCK_SRAM-1, 1 do + f.host.max_index = 0 + -- On block writes, previously read data in buffer is also valid. + if f.host.block[i].tmp_valid then + f.host.block[i].hw = f.host.block[i].tmp + f.host.block[i].tmp_valid = false + f.host.block[i].hw_valid = true + end + -- On block reads, no data in buffer is yet valid. + if host_reading(f) and host_proto(f, SMBUS_BLOCK_DATA) then + f.host.block[i].hw_valid = false; + end + end + + elseif smbus.state(f, HOST_COMPLETE) then + dump_transaction(f, f.host.action) + if signal_in(f, SIG_RELEASE) then + host_jump(f, HOST_IDLE) + else + host_jump(f, HOST_ACTIVE) + end + +-- elseif smbus.state(f, HOST_FAIL) then +-- dump_transaction(f, f.host.action) +-- host_jump(f, HOST_ACTIVE) + end + +end + +local function host_switch(f, new_state) + local prev_state = f.host.state.current + while prev_state ~= new_state do + host_change_state(f, prev_state, new_state) + prev_state = f.host.state.current + new_state = f.host.state.jump_to + end +end + +local function host_read_completed(f) + + if not host_reading(f) then + return true + end + + local complete = false + + if host_proto(f, SMBUS_QUICK) then + complete = true + + elseif host_proto(f, SMBUS_BYTE) then + complete = f.host.data0_valid + + elseif host_proto(f, SMBUS_BYTE_DATA) then + complete = f.host.data0_valid + + elseif host_proto(f, SMBUS_WORD_DATA) then + complete = f.host.data0_valid and f.host.data1_valid + + elseif host_proto(f, SMBUS_BLOCK_DATA) then + complete = f.host.data0_valid and f.host.max_index >= f.host.data0 + + elseif host_proto(f, SMBUS_PROC_CALL) or host_proto(f, SMBUS_I2C_BLOCK_DATA) + or host_proto(f, SMBUS_BLOCK_PROCESS) then + printk(f, f.host.action, "Unimplemented completion (proto %d)\n", f.host.proto) + end + return complete +end + + +-- Syncronize state machine according to input signals. +local function host_sync(f) + +-- if release and not smbus.state(f, HOST_ACTIVE) then +-- printk(f, f.host.action, "Premature reset of bit INUSE_STS\n") +-- end + if signal_in(f, SIG_ABORT) then + -- FIXME Killing on-going transaction. + host_switch(f, HOST_COMPLETE) + end + + if smbus.state(f, HOST_IDLE) then + if signal_in(f, SIG_INUSE) then + host_switch(f, HOST_ACTIVE) + end + if signal_in(f, SIG_START) then + host_switch(f, HOST_STARTED) + end + + elseif smbus.state(f, HOST_ACTIVE) then + if signal_in(f, SIG_START) then + host_switch(f, HOST_STARTED) + end + + elseif smbus.state(f, HOST_STARTED) then + if signal_in(f, SIG_TIMEOUT) then + host_switch(f, HOST_FAIL) + elseif signal_in(f, SIG_DONE) then + host_switch(f, HOST_WAIT) + end + + elseif smbus.state(f, HOST_WAIT) then + if signal_in(f, SIG_START) then + -- Restarting previous transaction. + host_switch(f, HOST_COMPLETE) + host_switch(f, HOST_STARTED) + elseif signal_in(f, SIG_ACK) and not host_reading(f) then + -- Complete after sw ack. + host_switch(f, HOST_COMPLETE) + elseif signal_in(f, SIG_DATA_WRITE) or host_read_completed(f) then + -- Complete after all data read or new data written + -- remain active + signal_clr(f, SIG_RELEASE) + host_switch(f, HOST_COMPLETE) + end + elseif smbus.state(f, HOST_FAIL) then + if signal_in(f, SIG_TIMEOUT_ACK) then + host_switch(f, HOST_COMPLETE) + end + end + + if signal_in(f, SIG_START) and not smbus.state(f, HOST_STARTED) then + printk(f, f.host.action, "Starting from illegal state\n"); + end + + signal_clr(f, SIG_DONE) + signal_clr(f, SIG_START) + signal_clr(f, SIG_DATA_WRITE) +end + + + +-- ******************************* + +-- Mutual exclusion. +function smbus.get_resource(f) + signal_set(f, SIG_INUSE) + host_sync(f) +end + +function smbus.put_resource(f) + signal_set(f, SIG_RELEASE) + host_sync(f) +end + +-- status +function smbus.state(f, state) + return f.host.state.current == state +end + +function smbus.passive(f) + return f.host.passive +end + +-- control +function smbus.start(f, proto) + signal_set(f, SIG_START) + f.host.start_proto = proto + host_sync(f) +end + +function smbus.timeout(f) + signal_set(f, SIG_TIMEOUT) + host_sync(f) +end + +function smbus.timeout_ack(f) + signal_set(f, SIG_TIMEOUT_ACK) + host_sync(f) +end + +function smbus.done(f) + signal_set(f, SIG_DONE) + host_sync(f) +end + +function smbus.ack(f) + signal_set(f, SIG_ACK) + host_sync(f) +end + +function smbus.abort(f) + signal_set(f, SIG_ABORT) + host_sync(f) +end + +-- A data read may complete and close an active transaction. +function smbus.data_read(f, action) + if not action.write then + signal_clr(f, SIG_DATA_WRITE) + host_sync(f) + end +end + +-- A data write will close active transaction. +function smbus.data_write(f, action) + if action.write then + signal_set(f, SIG_DATA_WRITE) + host_sync(f) + end +end + + + +function smbus.update_register(f, action, smb_reg) + + local data_write = action.write or smbus.passive(f) + + -- A write to data registers completes previous transaction. + smbus.data_write(f, action) + + if smb_reg == SMB_REG_SLAVE then + if data_write then + f.host.slave = action.data + else + action.data = f.host.slave + end + + elseif smb_reg == SMB_REG_CMD then + if data_write then + f.host.cmd = action.data + else + action.data = f.host.cmd + end + + elseif smb_reg == SMB_REG_DATA0 then + if data_write then + f.host.data0 = action.data + else + action.data = f.host.data0 + end + f.host.data0_valid = true + + elseif smb_reg == SMB_REG_DATA1 then + if data_write then + f.host.data1 = action.data + else + action.data = f.host.data1 + end + f.host.data1_valid = true + + elseif smb_reg == SMB_REG_BLOCK then + if data_write then + f.host.block_register = action.data + else + action.data = f.host.block_register + end + -- Nothing here, smbus.host_block_data updates datas. + -- This exist to check completion below for blocks. + elseif smb_reg == SMB_REG_PROTO then + -- Nothing here. Protocol updates when signalling start. + else + printk(f, f.host.action, "Undefined host register\n") + end + + -- New read data may complete a waiting transaction. + smbus.data_read(f, action) +end + +function smbus.block_data(f, action, index) + + if smbus.passive(f) then + if not action.write then + f.host.block[index].hw = action.data + f.host.block[index].hw_valid = true + end + f.host.block[index].tmp = action.data + f.host.block[index].tmp_valid = true + else + if action.write then + f.host.block[index].tmp = action.data + f.host.block[index].tmp_valid = true + else + action.data = 0xff + if f.host.block[index].tmp_valid then + action.data = f.host.block[index].tmp + elseif f.host.block[index].hw_valid then + action.data = f.host.block[index].hw + end + end + end + + -- Detect for block read completion via maximum indexed item. + if not action.write then + f.host.max_index = math.max(f.host.max_index, index+1) + end +end + +local init_action = { + name = "init", + cs = 0, + eip = 0, + my_id = 0, + parent_id = 0, +} +function smbus.init(f) + if not f.host then + f.host = smbus.host + f.host.action = init_action + end + host_switch(f, HOST_IDLE) +end + + diff --git a/SerialICE/simba/superio.lua b/SerialICE/simba/superio.lua new file mode 100644 index 0000000..5e19a94 --- /dev/null +++ b/SerialICE/simba/superio.lua @@ -0,0 +1,212 @@ + + +function pnp_switch_ldn(f, data) + if not f.ldn[data] then + f.ldn[data] = { data = {}, set = {} } + end + f.pnp.active_ldn = data +end + +function pnp_select_cfg(f, data) + f.pnp.reg = data +end + +function pnp_store_cfg(f, data) + local ldn = f.pnp.active_ldn + local reg = f.pnp.reg + f.ldn[ldn].data[reg] = data; + f.ldn[ldn].set[reg] = true; +end + + +-- ********************************************************** +-- +-- SuperIO device handling + +function superio_pnpdev(f) + return string.format("%s %02x:%02x", f.name, f.base, f.pnp.active_ldn) +end + +function superio_enable_io(f, iobase) + local ldn = f.pnp.active_ldn + if not f.bar[ldn] then + f.bar[ldn] = {} + end + f.bar[ldn].name = superio_pnpdev(f) + f.bar[ldn].base = iobase + local size = 0 + if ldn == 0xa then + size = 0x80 + f.bar[ldn].name = "SIO_GPIO" + elseif ldn == 0x9 then + size = 0x1 + end + if ldn == 0x4 then + size = 0x20 + f.bar[ldn].name = "SIO_POWER" + elseif ldn == 0x7 then + size = 0x20 + f.bar[ldn].name = "SIO_GPIO" + end + f.bar[ldn].size = size + generic_io_bar(f.bar[ldn]) +end + +function superio_dev_post(f, action) + printk(f, action, "%02x:%02x CFG ", f.base, f.pnp.active_ldn) +end + +function superio_read_post(f, data) + printf("[%02x] => %02x\n", f.pnp.reg, data) +end +function superio_write_post(f, data) + printf("[%02x] <= %02x\n", f.pnp.reg, data) +end + + +function superio_pre(f, action) + if not action.write then + return handle_action(f, action) + end + + if action.addr == f.base then + pnp_select_cfg(f, action.data) + return handle_action(f, action) + end + + if action.addr == f.base + 0x01 then + -- Also creates new LDN instance, if necessary. + if f.pnp.reg == f.pnp.ldn_register then + pnp_switch_ldn(f, action.data) + end + + pnp_store_cfg(f, action.data) + + -- Don't allow that our SIO power gets disabled. + if f.pnp.reg == 0x02 then + return drop_action(f, action, 0) + end + + -- Don't mess with oscillator setup. + if f.pnp.reg == 0x24 then + return drop_action(f, action, 0) + end + return handle_action(f, action) + end + + -- should not reach here + return skip_filter(f, action) +end + +function superio_post(f, action) + + -- Do not log change of register or LDN. + if action.addr == f.base or f.pnp.reg == f.pnp.ldn_register then + return true + end + + if not action.write then + superio_dev_post(f, action) + superio_read_post(f, action.data) + return true + end + + local ldn = f.ldn[f.pnp.active_ldn] + + -- Log base address once both bytes are set. + if f.pnp.reg == 0x30 or f.pnp.reg == 0x60 or f.pnp.reg == 0x61 then + + + if ldn.set[0x30] and ldn.data[0x30] ~= 0x0 then + if ldn.set[0x60] and ldn.set[0x61] then + local iobase = bit.bor(bit.lshift(ldn.data[0x60], 8), ldn.data[0x61]) + superio_enable_io(f, iobase) + elseif f.pnp.reg == 0x30 then + superio_dev_post(f, action) + printf("enabled\n") + end + end + + + if f.pnp.reg == 0x30 and ldn.set[0x30]==true and ldn.data[0x30]==0x0 then + superio_dev_post(f, action) + printf("disabled\n") + end + return true + end + + if f.pnp.reg == 0x70 then + superio_dev_post(f, action) + printf("irq = %d\n", ldn.data[0x70]) + return true + end + if f.pnp.reg == 0x72 then + superio_dev_post(f, action) + printf("irq2 = %d\n", ldn.data[0x72]) + return true + end + + superio_dev_post(f, action) + superio_write_post(f, action.data) + return true +end + + +filter_superio_2e = { + id = -1, + name = "PnP", + pre = superio_pre, + post = superio_post, + base = 0x2e, + size = 0x02, + hide = hide_superio_cfg, + pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, + ldn = {}, + bar = {}, +} +filter_superio_4e = { + id = -1, + name = "PnP", + pre = superio_pre, + post = superio_post, + base = 0x4e, + size = 0x02, + hide = hide_superio_cfg, + pnp = { reg = 0, active_ldn = -1, ldn_register = 0 }, + ldn = {}, + bar = {}, +} + +function enable_hook_superio(base, ldn_register) + if base == 0x2e then + filter_superio_2e.pnp.ldn_register = ldn_register + pnp_switch_ldn(filter_superio_2e, 0) + enable_hook(io_hooks, filter_superio_2e) + elseif base == 0x4e then + filter_superio_4e.pnp.ldn_register = ldn_register + pnp_switch_ldn(filter_superio_4e, 0) + enable_hook(io_hooks, filter_superio_4e) + end +end + +-- ********************************************************** +-- +-- Serial Port handling + +function com_pre(f, action) + if (action.write) then + return drop_action(f, action, action.data) + else + return drop_action(f, action, 0xff) + end +end + +filter_com1 = { + id = -1, + name = "COM1", + pre = com_pre, + post = io_post, + base = 0x3f8, + size = 8, + hide = false, +} diff --git a/SerialICE/simba/via_epia_m_850.lua b/SerialICE/simba/via_epia_m_850.lua new file mode 100644 index 0000000..393e051 --- /dev/null +++ b/SerialICE/simba/via_epia_m_850.lua @@ -0,0 +1,163 @@ +-- SerialICE +-- +-- Copyright (c) 2012 Kyösti Mälkki <kyosti.malkki(a)gmail.com> +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +-- THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- + + +-- ********************************************************** +-- + +function mainboard_io_read(f, action) + + -- IO slowdown + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + -- IO slowdown + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + if action.addr == 0xcfb then + ignore_action(f, action) + return drop_action(f, action, 0) + end + + return skip_filter(f, action) +end + + +function mainboard_io_write(f, action) + + -- Catch RAM controller ready. + if action.addr == 0x80 and action.data == 0x2c and not ram_enabled() then + enable_ram() + end + +-- if action.addr == 0xcfb then +-- ignore_action(f, action) +-- return drop_action(f, action, 0) +-- end + + if action.addr == 0xeb then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + if action.addr == 0xed then + ignore_action(f, action) + return drop_action(f, action, action.data) + end + + return skip_filter(f, action) +end + +function mainboard_io_pre(f, action) + if action.write then + return mainboard_io_write(f, action) + else + return mainboard_io_read(f, action) + end +end + +function mainboard_io_post(f, action) + if action.addr == 0xeb or action.addr == 0xed then + return true + end + + -- If KBD controller returns status=0xff, clear 0x02. + if action.addr == 0x64 and not action.write and action.size == 1 then + if action.data == 0xff then + -- tag these but give out correct data + fake_action(f, action, action.data) + end + end +end + +filter_mainboard = { + id = -1, + name = "VIA", + pre = mainboard_io_pre, + post = mainboard_io_post, + hide = hide_mainboard_io, + base = 0x0, + size = 0x10000 +} + + + +-- MOVE THIS TO CHIPSET FILE + +dofile("intel_smbus.lua") + +function smbus_bar_hook(dev, reg, base) + intel_smbus_setup(base, 0x20) +end + +dev_sb_lpc = { + pci_dev = pci_bdf(0x0,0x1f,0x3,0x0), + name = "Smbus", + bar = {}, +} + +dev_power = { + pci_dev = pci_bdf(0x0,0x11,0x0,0x0), + name = "SYS", + bar = {}, + acpi = { f = nil }, + tco = { f = nil }, +} + +function pm_io_bar(dev, reg, base) + dev.acpi.name = "ACPI" + dev.acpi.base = base + dev.acpi.size = 0x60 + generic_io_bar(dev.acpi) +end + + + +-- **************** + +function do_mainboard_setup() + enable_hook(io_hooks, filter_pci_io_cfg) + enable_hook(mem_hooks, filter_lapic) + enable_hook(mem_hooks, filter_ioapic) + + enable_hook(cpumsr_hooks, filter_intel_microcode) + enable_hook(cpuid_hooks, filter_multiprocessor) + + -- I have a hook to detect RAM initialisation from + -- a POST code I can skip this here + --enable_ram() + + enable_hook_pc80() + enable_hook_superio(0x4e, 0x07) + + hook_pci_cfg16(dev_power, 0x88, pm_io_bar) + hook_pci_cfg16(dev_power, 0xd0, smbus_bar_hook) + + -- Apply mainboard hooks last, so they are the first ones to check + enable_hook(io_hooks, filter_mainboard) +end

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SerialICE August 2012