Hi,
one feature that goes with a device model is to add indentification
capability to the SerialICE shell.
I added two commands:
*mb prints the mainboard name in a 32byte free text string.
*vi prints version information. (To determine whether the Shell part and
the Qemu part fit together)
So each board defines
const char boardname[33]="Kontron 986LCD-M ";
How would people prefer to have it? A null terminated string rather than
a fixed size string? Spaces?
Stefan
Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de>
Index: serialice.c
===================================================================
--- serialice.c (revision 66)
+++ serialice.c (working copy)
@@ -186,13 +186,24 @@
sio_put32(reg32);
}
+static void serialice_mainboard(void)
+{
+ /* must be defined in mainboard/<boardname>.c */
+ sio_putstring(boardname);
+}
+
+static void serialice_version(void)
+{
+ sio_putstring("\nSerialICE v" VERSION " (" __DATE__ ")\n");
+}
+
int main(void)
{
chipset_init();
sio_init();
- sio_putstring("\nSerialICE v" VERSION " (" __DATE__ ")\n");
+ serialice_version();
while(1) {
u16 c;
@@ -227,6 +238,11 @@
case (('c' << 8)|'i'): // Read CPUID *ci
serialice_cpuinfo();
break;
+ case (('m' << 8)|'b'): // Read mainboard type *mb
+ serialice_mainboard();
+ break;
+ case (('v' << 8)|'i'): // Read version info *vi
+ serialice_mainboard();
default:
sio_putstring("ERROR\n");
break;
Index: mainboard/asus_p2b.c
===================================================================
--- mainboard/asus_p2b.c (revision 66)
+++ mainboard/asus_p2b.c (working copy)
@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is a chipset init file for the ASUS P2B mainboard.
- */
+/* This is a chipset init file for the ASUS P2B mainboard. */
+const char boardname[33]="ASUS P2B ";
+
#define PNP_PORT 0x3f0
static void superio_init(void)
Index: mainboard/dell_s1850.c
===================================================================
--- mainboard/dell_s1850.c (revision 66)
+++ mainboard/dell_s1850.c (working copy)
@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is an example chipset init file for the Dell S1850
- */
+/* This is a chipset init file for the Dell S1850 */
+const char boardname[33]="DELL S1850 ";
+
/* Hardware specific functions */
static void mainboard_set_ich5(void)
{
Index: mainboard/thomson_ip1000.c
===================================================================
--- mainboard/thomson_ip1000.c (revision 66)
+++ mainboard/thomson_ip1000.c (working copy)
@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is an example chipset init file for the THOMSON IP1000 mainboard
- */
+/* This is a chipset init file for the THOMSON IP1000 mainboard */
+const char boardname[33]="THOMSON IP1000 ";
+
/* Hardware specific functions */
#define PMBASE 0x400
Index: mainboard/asus_m2v-mx_se.c
===================================================================
--- mainboard/asus_m2v-mx_se.c (revision 66)
+++ mainboard/asus_m2v-mx_se.c (working copy)
@@ -18,6 +18,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+const char boardname[33]="ASUS M2V-MX SE ";
+
#define SUPERIO_CONFIG_PORT 0x2e
static void superio_init(void)
Index: mainboard/rca_rm4100.c
===================================================================
--- mainboard/rca_rm4100.c (revision 66)
+++ mainboard/rca_rm4100.c (working copy)
@@ -17,9 +17,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is an example chipset init file for the RCA RM4100 mainboard
- */
+/* This is a chipset init file for the RCA RM4100 mainboard */
+
+const char boardname[33]="RCA RM4100 ";
/* Hardware specific functions */
Index: mainboard/intel_d945gclf.c
===================================================================
--- mainboard/intel_d945gclf.c (revision 66)
+++ mainboard/intel_d945gclf.c (working copy)
@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is an example chipset init file for the Kontron 986LCD-M mainboard
- */
+/* This is a chipset init file for the Intel D945GCLF mainboard */
+const char boardname[33]="Intel D945GCLF ";
+
/* Hardware specific functions */
#define RCBA 0xfed1c000
Index: mainboard/kontron_986lcd-m.c
===================================================================
--- mainboard/kontron_986lcd-m.c (revision 66)
+++ mainboard/kontron_986lcd-m.c (working copy)
@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * This is an example chipset init file for the Kontron 986LCD-M mainboard
- */
+/* This is a chipset init file for the Kontron 986LCD-M mainboard */
+const char boardname[33]="Kontron 986LCD-M ";
+
/* Hardware specific functions */
#define RCBA 0xfed1c000
Index: mainboard/msi_ms6178.c
===================================================================
--- mainboard/msi_ms6178.c (revision 66)
+++ mainboard/msi_ms6178.c (working copy)
@@ -18,6 +18,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+const char boardname[33]="MSI MS6178 ";
+
#define PMBASE 0x40
#define COM_DEC 0xe0
#define LPC_EN 0xe6
Hi,
Since we seem to have additional filter rules for every board, BIOS,
SuperIO and chipset we support, I gave it a shot and prototyped a small
"object oriented device model" for our filters. So each filter could run
through all registered components for a board and run the filters suited
for that hardware (and only those).
We could add a command to the serialice shell that dumps the board name,
so SerialICE/Qemu knows which components to use and how to configure them...
My prototype example is attached to this mail... comments? Ideas?
If you think this could be useful I'll try to integrate this before
SerialICE 2.0 :-)
Best regards,
Stefan
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info(a)coresystems.de • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
Dear x86/x64 hardware and low-level software developers and enthusiasts!
coresystems GmbH is glad to release SerialICE 1.5:
SerialICE (http://www.serialice.com) is a BIOS/Firmware debugging tool.
It allows you to run and observe BIOS images (such as coreboot®:
http://www.coreboot.org/) written for real hardware in Qemu
(http://www.qemu.org) for debugging purposes. Thanks to Qemu's
compelling feature set, it's also possible to debug this BIOS code with
GNU GDB.
Among the new features of SerialICE version 1.5:
- Rework memory and IO filters to provide more control
- Improved PCI, PCIe and memory access logging
- Windows (MINGW and Cygwin) support
- New mainboard supported: ASUS P2B
- SerialICE connection now survives target resets
- CPUID now honors ECX values
- RDMSR/WRMSR now honor EDI unlock keys
- Add LUA patch to correctly operate on 32bit hosts
- Drop SerialICE specific machine type in Qemu
SerialICE consists of three parts:
- a serial console "rom shell" compiled with romcc, with minimal footprint.
- a patch to Qemu 0.11.0, which adds a new "SerialICE" machine.
- a LUA script that contains filters, loggers and other SerialICE
specific configuration and adaption.
SerialICE can be downloaded from http://www.serialice.com/.
With "qemu -serialice /dev/ttyS0 -L path-to-your-bios.bin-dir -hda /dev/zero"
you can run an arbitrary BIOS binary written for your target hardware
in Qemu, thus logging all IO and memory accesses. Those operations will
additionally be transmitted to the target system's shell and are executed
there, while their results are submitted back to Qemu.
Operations sent to the target:
- memory reads/writes (some of them)
- IO reads/writes
- MSR reads/writes
- CPUID calls (the bios code path might rely on this)
Note: The code is still quite experimental and only supports a few
number of mainboard out of the box, but it was already useful in some
debugging scenarios we had and was able to reveil information that would
normally only be available with a hardware debugger of the price of a
new car. Don't expect SerialICE to completely replace a ICE/JTAG/ITP
device, but it might just work for your case, as it did for us.
The ROM code needs minimal board/chipset specific setup in order to
establish serial communication with Qemu. See mainboard/* for a few
examples. This release contains setup code for 7 mainboards.
Also, some hardware accesses have to be caught in the LUA code
(scripts/serialice.lua) in order to prevent the system from locking up
(ie. when the BIOS is disabling the serial console).
Special thanks go to Patrick Georgi and Mark Marshall for their bug fixes and contributions to
this release.
See http://www.serialice.com/ for more information.
Comments and patches are of course very welcome!
Best regards,
Stefan Reinauer
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info(a)coresystems.de • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866