[openfirmware] r1393 - cpu/x86/pc/olpc/via

Author: wmb
Date: 2009-10-06 05:18:14 +0200 (Tue, 06 Oct 2009)
New Revision: 1393

Modified:
   cpu/x86/pc/olpc/via/demodram.fth
   cpu/x86/pc/olpc/via/startgfxinit.fth
   cpu/x86/pc/olpc/via/starthostctl.fth
Log:
Via 32-bit memory width - final register value fixups as stipulated by Via.

Modified: cpu/x86/pc/olpc/via/demodram.fth
===================================================================
--- cpu/x86/pc/olpc/via/demodram.fth	2009-10-02 22:10:09 UTC (rev 1392)
+++ cpu/x86/pc/olpc/via/demodram.fth	2009-10-06 03:18:14 UTC (rev 1393)
@@ -389,17 +389,15 @@
    4b ff rank-base3 mreg \ Rank base 3
    end-table

-   acpi-io-base 48 + port-rl  h# 1000.0000 # ax and  0<>  if  \ Memory ID1 bit
+   acpi-io-base 48 + port-rl  h# 1000.0000 # ax and  0<>  if  \ Memory ID1 bit - set for 32bit memory width
       0 3 devfunc
       6c 20 20 mreg    \ Enable 32-bit memory width mode - channel A
       d4 30 10 mreg    \ ODT off for low 32 bits
       end-table
-
-      0388 config-rb  ax bx mov  1 # bx shr  0385 config-setup  bx ax mov  al dx out  \ Copy Low Top from RO reg 88 to reg 85
-   else
-      0388 config-rb  ax bx mov  0385 config-setup  bx ax mov  al dx out  \ Copy Low Top from RO reg 88 to reg 85
    then

+   0388 config-rb  ax bx mov  0385 config-setup  bx ax mov  al dx out  \ Copy Low Top from RO reg 88 to reg 85
+
    h# 15 port80

0 [if]  \ Very simple memtest

Modified: cpu/x86/pc/olpc/via/startgfxinit.fth
===================================================================
--- cpu/x86/pc/olpc/via/startgfxinit.fth	2009-10-02 22:10:09 UTC (rev 1392)
+++ cpu/x86/pc/olpc/via/startgfxinit.fth	2009-10-06 03:18:14 UTC (rev 1393)
@@ -59,7 +59,12 @@
    6f 3c4 port-wb  00 3c5 port-wb  \ Base address [47:37] of SL in System Memory
 [then]
 [ifdef] xo-board
-   385 config-rb   \ AX: totalsize/16M
+   385 config-rb  ax bx mov \ BX: totalsize/16M
+   acpi-io-base 48 + port-rl  h# 1000.0000 # ax and  0<>  if  \ Memory ID1 bit - set for 32bit memory width
+      1 # bx shr            \ Divide size by 2 for 32-bit DRAM width
+   then
+   bx ax mov                \ AX: totalsize/16M_adjusted
+
    d# 24 # ax shl  \ AX: totalsize
    /fbmem # ax sub \ AX: totalsize-fbmemsize = fbbase
    d# 21 # ax shr  \ AX: fbbase/2M

Modified: cpu/x86/pc/olpc/via/starthostctl.fth
===================================================================
--- cpu/x86/pc/olpc/via/starthostctl.fth	2009-10-02 22:10:09 UTC (rev 1392)
+++ cpu/x86/pc/olpc/via/starthostctl.fth	2009-10-06 03:18:14 UTC (rev 1393)
@@ -67,7 +67,7 @@
 [then]
    end-table

-   acpi-io-base 48 + port-rl  h# 1000.0000 # ax and  0<>  if  \ Memory ID1 bit
+   acpi-io-base 48 + port-rl  h# 1000.0000 # ax and  0<>  if  \ Memory ID1 bit - set for 32bit memory width
       0 2 devfunc
       55 02 02 mreg  \ Host controller to DRAM read cycle control II - 1 means 2T slower