Mitch Bradley wrote:
> The NK.bin file makes sense in light of the .bin format description and tool that I posted in my last message.
>
> The first few segment records:
>
> a) (offset 0x0f) Insert a branch instruction (0xea0003fe) at location 0x80100000
>
> b) (offset 0x1f) Insert a CECE + pointer block at location 0x80100040. The pointer value is 0x81c61460. It is a pointer to a "romhdr" structure as described at http://msdn.microsoft.com/en-us/library/aa908726.aspx
>
> c) (offset 0x33) Insert a TOC pointer at location 0x80100048. TOC is "Table of Contents", which is a data structure that WinCE uses when it is starting up. It helps WinCE find various parts of itself. The TOC pointer value is 0x01b61460.
>
> d) (offset 0x43) Copy the kernel image (of size 0x0004292c) to location 0x80101000. The data in that section is clearly a bunch of ARM instructions. ARM opcodes have a very high probability of having an "e" in the high nibble (which means the instruction is not conditional).
>
> The rest of the file is almost certainly a bunch of sections for copying various DLLs into memory.
>
> "XIP" just means that the code has been prelinked and the addresses have been resolved to the absolute address at which the code is expected to execute, so relocation information is unnecessary and not present.
>
> Here is what you should do:
>
> 1) Try the makecebin.fth program. Use it to wrap an OFW image file - or any other file for that matter - into a .bin format file. Then see if BLDR will try to load that file. If BLDR will load it, then we have solved the file format problem and it is then a matter of modifying OFW to work on your board in that environment.
>
> 2) If BLDR will not load it, we then need to work out what needs to be added. The first thing to try would be to add an ECEC section. It might be sufficient to have the ECEC section refer to a dummy address. I doubt that the bootloader actually follows the ECEC pointer, because that would require sophisticated parsing of the .bin section information to find data that is much later in the file. Instead, what I think happens is that the bootloader just uses the section information to place stuff in memory, and then the WinCE kernel/BSP code follows the pointer. But it is possible that the bootloader might do a quick check to see if an ECEC section exists. We shouldn't worry about this step (2) until we are sure that it is necessary.
Thanks Mitch, I'll investigate. I'll be back, but possibly not
immediately due to other commitments.
--
Mark Morgan Lloyd
markMLl .AT. telemetry.co .DOT. uk
[Opinions above are the author's, not those of his employers or colleagues]
Author: wmb
Date: Tue May 31 01:23:49 2011
New Revision: 2234
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2234
Log:
OLPC XO-1.75 - fixed microphone test. It turns out that the ALC5631 codec doesn't like to have its ADC powered up before BCLK is present.
Modified:
cpu/arm/olpc/1.75/alc5631.fth
cpu/arm/olpc/1.75/sound.fth
Modified: cpu/arm/olpc/1.75/alc5631.fth
==============================================================================
--- cpu/arm/olpc/1.75/alc5631.fth Fri May 27 04:16:25 2011 (r2233)
+++ cpu/arm/olpc/1.75/alc5631.fth Tue May 31 01:23:49 2011 (r2234)
@@ -1,17 +1,36 @@
\ See license at end of file
purpose: Driver for Realtek ALC5631Q audio CODEC chip
+: adc-on ( -- ) h# 0c00 h# 3a codec-set ;
+: adc-off ( -- ) h# 0c00 h# 3a codec-clr ;
+: dac-on ( -- ) h# 0300 h# 3a codec-set ;
+: dac-off ( -- ) h# 0300 h# 3a codec-clr ;
+
: codec-on ( -- )
- h# 8001 h# 34 codec! \ Slave mode, 16 bits, left justified
- b# 1001.1111.1110.0000 h# 3a codec! \ All on
- b# 1111.1100.0011.1100 h# 3b codec! \ All on except PLL
+ 0 0 codec! \ Reset
+
b# 1010.0000.0001.1101 h# 3c codec! \ All on except AX and MONO
+ d# 110 ms
+ b# 1110.0000.0001.1101 h# 3c codec! \ Fast VREF control
+ d# 100 ms
+
+ h# 8021 h# 34 codec! \ Slave mode, 16 bits, left justified, left channel on LRCLK high
+
+ h# 1010 h# 38 codec! \ Divisors; the values in this register don't seem to make much
+ \ difference unless you set the divisors to very high values.
+
+ \ The ADC and DAC will be turned on as needed by adc-on and dac-on, after
+ \ the BCLK clock from the SoC is on. If you turn on the ADC when BCLK is
+ \ not clocking, the ADC often doesn't output any data.
+ b# 1001.0000.1110.0000 h# 3a codec! \ All on except ADC and DAC
+ b# 1111.1100.0011.1100 h# 3b codec! \ All on except PLL
b# 1111.1100.0000.0000 h# 3e codec! \ AXI and MONO IN off
+
\ h# 8c00 h# 40 codec! \ Speaker Amp Auto Ratio GAIN, use HPFs
- h# 8000 h# 40 codec! \ Speaker Amp Auto Ratio GAIN, no HPFs
+ h# 4e00 h# 40 codec! \ Speaker Amp Ratio GAIN is 1.44x, no HPFs
h# 0000 h# 42 codec! \ Use MCLK, not PLL
- b# 1110.1100.1001.0000 h# 52 codec! \ Protection on
- h# 4000 h# 56 codec! \ Power on Cap-free block with de-pop
+\ b# 1110.1100.1001.0000 h# 52 codec! \ Protection on
+ h# 8000 h# 56 codec! \ HP depop by register control
;
: codec-off ( -- )
0 h# 3a codec! \ All off
@@ -82,7 +101,7 @@
;
d# 0 constant default-adc-gain \ 0 dB - range is -96.625 to +28.5
d# 0 constant default-dac-gain \ 0 dB - range is -96.625 to +28.5
-d# 44 constant default-mic-gain \ 44 dB - range is 0 to 50 dB
+d# 52 constant default-mic-gain \ 52 dB - range is 0 to 52 dB
d# 0 constant default-speaker-volume \ 0 dB - range is -46.5 to +12
d# -10 constant default-headphone-volume \ -10 dB - range is -46.5 to 0
@@ -131,6 +150,7 @@
false value external-mic?
: mic-routing ( -- n )
mic1-single-ended mic2-single-ended
+ mic1-low-bias mic2-low-bias \ Works better than high bias
adc-unmute-mic
;
: db>mic-boost ( db -- code )
@@ -172,7 +192,9 @@
d# 48000 of h# 0000 h# 3072 endof
( default ) true abort" Unsupported audio sample rate"
endcase ( reg62val2 reg60val )
- h# 60 codec! h# 62 codec!
+ \ XXX need to do something with register 38
+ 2drop
+\ h# 60 codec! h# 62 codec!
;
\ LICENSE_BEGIN
Modified: cpu/arm/olpc/1.75/sound.fth
==============================================================================
--- cpu/arm/olpc/1.75/sound.fth Fri May 27 04:16:25 2011 (r2233)
+++ cpu/arm/olpc/1.75/sound.fth Tue May 31 01:23:49 2011 (r2234)
@@ -193,6 +193,15 @@
r> codec! ( )
;
+[ifdef] cl2-a1
+fload ${BP}/cpu/arm/olpc/1.75/alc5624.fth \ Realtek ALC5624 CODEC
+[else]
+: headphones-inserted? ( -- flag ) d# 97 gpio-pin@ ;
+: microphone-inserted? ( -- flag ) d# 96 gpio-pin@ ;
+
+fload ${BP}/cpu/arm/olpc/1.75/alc5631.fth \ Realtek ALC5631Q CODEC
+[then]
+
d# 48000 value sample-rate
\ Longest time to wait for a buffer event - a little more
@@ -284,6 +293,7 @@
copy-out
start-out-ring
enable-sspa-tx
+ dac-on
out-len if copy-out then \ Prefill the second buffer
install-playback-alarm
true to playing?
@@ -323,6 +333,7 @@
tuck to in-len to in-adr ( actual )
make-in-ring ( actual )
enable-sspa-rx ( actual )
+ adc-on ( actual )
start-in-ring ( actual )
begin in-len while ( actual )
wait-in ( actual )
@@ -351,15 +362,6 @@
\ Page 1498 - The data transmit register is listed as RO. How can a transmit register be RO????
[then]
-[ifdef] cl2-a1
-fload ${BP}/cpu/arm/olpc/1.75/alc5624.fth \ Realtek ALC5624 CODEC
-[else]
-: headphones-inserted? ( -- flag ) d# 97 gpio-pin@ ;
-: microphone-inserted? ( -- flag ) d# 96 gpio-pin@ ;
-
-fload ${BP}/cpu/arm/olpc/1.75/alc5631.fth \ Realtek ALC5631Q CODEC
-[then]
-
: set-sample-rate ( rate -- )
dup to sample-rate
dup set-ctlr-sample-rate
A few weeks ago (mid March) I mentioned that I had some ARM boards that
I'd like use as Linux development systems. Unfortunately, they come with
CE, and while the manufacturer does supply Linux it's prohibitively
expensive.
CE is booted from a partitioned CompactFlash card, and I initially
thought that the code in the partition and filesystem boot sectors was
relevant, i.e. that there was something equivalent to a PC's BIOS in
Flash. However on inspection I think that the code is x86, which implies
that the loader in Flash is reading and transferring control to the OS
image directly.
Is it possible to build Open Firmware to look like a CE image, which
would possibly allow this board (and potentially many other devices) to
run Linux without modification to the content of internal Flash?
--
Mark Morgan Lloyd
markMLl .AT. telemetry.co .DOT. uk
[Opinions above are the author's, not those of his employers or colleagues]
Hi everyone,
I want to make a small demo for Open Firmware to show that it can play a
music.
the very basic is : play, pause, play
with play, I use tone . but, I can't find WORD for pause, where is it?
further more, I read some articles about midi file. It's a little
complicated for me. So I want to finished the first tone-music first :)
PS: Are there some detail articles about Open Firmware handle with music?
wav, midi, mp3 or event avi?
--
Hu Songtao
works as an English Teacher in weekends
Skype: idisblueflash
Beijing, China
Author: wmb
Date: Thu May 26 23:23:22 2011
New Revision: 2232
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2232
Log:
BIOSload version - another fix to callbios.fth, so the return values can be seen.
Modified:
cpu/x86/pc/biosload/callbios.fth
Modified: cpu/x86/pc/biosload/callbios.fth
==============================================================================
--- cpu/x86/pc/biosload/callbios.fth Thu May 26 11:46:46 2011 (r2231)
+++ cpu/x86/pc/biosload/callbios.fth Thu May 26 23:23:22 2011 (r2232)
@@ -73,25 +73,34 @@
label bios-ret
16-bit
- bios-target # sp mov \ Set the stack pointer to the top of the rm reg area
+ cli
+
+ \ The SS:SP is currently at bios-rflags+2, as a result of the "far ret"
+ \ in bios-call having popped bios-target and the IRET in the INT handler
+ \ having popped bios-retloc (32 bits) and bios-rflags (16 bits).
+ \ The next line moves SS:SP down so subsequents pushes will hit the
+ \ register area.
+ d# 10 # sp sub
\ Copy the real-mode registers to the buffer
op: pushf op: pusha ds push es push fs push gs push
- cli
- ax ax xor ax ds mov \ Assumes that the real-mode buffers are in the low 64K
+ pm-gdt-save >seg:off ( offset segment )
+ # push ds pop ( offset ) \ Don't kill any other registers
+ op: #) lgdt ( )
- op: pm-gdt-save #) lgdt
- cr0 ax mov 1 # al or ax cr0 mov
+ cr0 ax mov 1 # al or ax cr0 mov \ Switch to protected mode
- here 5 + bios-ret - 'bios-ret + pm-code-desc #) far jmp
+ here 5 + bios-ret - 'bios-ret + pm-code-desc #) far jmp \ Jump to next location
32-bit
+ \ Reload descriptors with protected mode versions
pm-data-desc # ax mov ax ds mov ax es mov ax gs mov ax gs mov ax ss mov
- pm-idt-save #) lidt
- pm-sp-save #) sp mov
+ pm-idt-save #) lidt \ Switch back to protected mode IDT
+
+ pm-sp-save #) sp mov \ Switch back to protected mode stack
popf
popa
c;
@@ -114,8 +123,8 @@
bios-prepped? if exit then true to bios-prepped?
bios-call 'bios-call /bios-call move
bios-ret 'bios-ret /bios-ret move
- h# ffff 'bios-idt w!
- 0 'bios-idt 2+ l!
+ h# ffff 'bios-idt w! \ IDT size
+ 0 'bios-idt 2+ l! \ IDT base address
bios-regs 'bios-sp seg:off! \ Setup real-mode full pointer for lss
'bios-ret bios-retloc seg:off! \ Setup return address full pointer
bios-flagval bios-retloc 4 + w! \ Flags for return
Author: wmb
Date: Thu May 26 11:46:46 2011
New Revision: 2231
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2231
Log:
BIOSload version - now that callbios no longer kills the IDTR value, install the alarm handler and use hlt when waiting at the prompt, thus greatly reducing virtual CPU usage under emulators.
Modified:
cpu/x86/pc/biosload/fw.bth
Modified: cpu/x86/pc/biosload/fw.bth
==============================================================================
--- cpu/x86/pc/biosload/fw.bth Thu May 26 11:39:28 2011 (r2230)
+++ cpu/x86/pc/biosload/fw.bth Thu May 26 11:46:46 2011 (r2231)
@@ -339,6 +339,11 @@
[then]
;
+\ This reduces processor use when waiting for a key. It helps
+\ a lot when running on an emulator.
+: c1-idle ( -- ) interrupts-enabled? if halt then ;
+' c1-idle to stdin-idle
+
: startup ( -- )
standalone? 0= if exit then
." calibrate-ms" cr
@@ -358,7 +363,8 @@
warning on
only forth also definitions
-\ install-alarm
+ ." Installing alarms" cr
+ install-alarm
#line off
Author: wmb
Date: Thu May 26 11:39:28 2011
New Revision: 2230
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2230
Log:
BIOSload version - careful use of op: in callbios.fth to ensure that all bits of the GDT and IDT address are saved and restored.
Modified:
cpu/x86/pc/biosload/callbios.fth
Modified: cpu/x86/pc/biosload/callbios.fth
==============================================================================
--- cpu/x86/pc/biosload/callbios.fth Thu May 26 10:59:12 2011 (r2229)
+++ cpu/x86/pc/biosload/callbios.fth Thu May 26 11:39:28 2011 (r2230)
@@ -50,8 +50,8 @@
rm-data-desc # ax mov \ 16-bit data segment
ax ds mov ax es mov ax fs mov ax gs mov ax ss mov
- pm-gdt-save #) sgdt \ So we can get back
- pm-idt-save #) sidt \ So we can get back
+ op: pm-gdt-save #) sgdt \ So we can get back
+ op: pm-idt-save #) sidt \ So we can get back
'bios-idt #) lidt
cr0 ax mov h# fe # al and ax cr0 mov \ Enter real mode
