November 2014 - openfirmware - mail.coreboot.org

On Raspberry Pi
by Mark Morgan Lloyd Jan. 5, 2015

Jan. 5, 2015

Is it possible to put OpenFirmware on an SD card and use it to boot off e.g. a USB-attached mass storage device or using TFTP over a LAN? -- Mark Morgan Lloyd markMLl .AT. telemetry.co .DOT. uk [Opinions above are the author's, not those of his employers or colleagues]

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[commit] r3749 - cpu/arm/olpc/4.0
by repository service Nov. 24, 2014

Nov. 24, 2014

Author: quozl Date: Mon Nov 24 23:53:00 2014 New Revision: 3749 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3749 Log: Q7B42 Modified: cpu/arm/olpc/4.0/fw-version.fth Modified: cpu/arm/olpc/4.0/fw-version.fth ============================================================================== --- cpu/arm/olpc/4.0/fw-version.fth Mon Nov 24 23:48:54 2014 (r3748) +++ cpu/arm/olpc/4.0/fw-version.fth Mon Nov 24 23:53:00 2014 (r3749) @@ -1,7 +1,7 @@ \ The overall firmware revision macro: FW_PREFIX Q7 macro: FW_MAJOR B -macro: FW_MINOR 41 +macro: FW_MINOR 42 \ Create a 2-character build/fw-suffix file to personalize your test builds " fw-suffix" $file-exists? [if]

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[commit] r3748 - cpu/arm
by repository service Nov. 24, 2014

Nov. 24, 2014

Author: quozl Date: Mon Nov 24 23:48:54 2014 New Revision: 3748 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3748 Log: [ARM] fixed signed double conversion, from Matthijs van Duin <matthijsvanduin(a)gmail.com>, 24th November 2014, fixes a regression introduced in r3740, affected d<= and d> only. Modified: cpu/arm/kerncode.fth Modified: cpu/arm/kerncode.fth ============================================================================== --- cpu/arm/kerncode.fth Thu Nov 20 00:05:11 2014 (r3747) +++ cpu/arm/kerncode.fth Mon Nov 24 23:48:54 2014 (r3748) @@ -822,17 +822,17 @@ c; code d> ( d1 d2 -- f ) ldmia sp!,{r0,r1,r2} \ tos r0 r1 r2 - subs r2,r2,r0 - sbcs r1,r1,tos - movle tos,#0 - mvngt tos,#0 + subs r2,r0,r2 + sbcs r1,tos,r1 + movge tos,#0 + mvnlt tos,#0 c; code d<= ( d1 d2 -- f ) ldmia sp!,{r0,r1,r2} \ tos r0 r1 r2 - subs r2,r2,r0 - sbcs tos,r1,tos - movgt tos,#0 - mvnle tos,#0 + subs r2,r0,r2 + sbcs r1,tos,r1 + movlt tos,#0 + mvnge tos,#0 c; code du< ( d1 d2 -- f ) ldmia sp!,{r0,r1,r2} \ tos r0 r1 r2

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[commit] r3747 - cpu/arm/olpc/4.0
by repository service Nov. 20, 2014

Nov. 20, 2014

Author: quozl Date: Thu Nov 20 00:05:11 2014 New Revision: 3747 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3747 Log: Q7B41 Modified: cpu/arm/olpc/4.0/fw-version.fth Modified: cpu/arm/olpc/4.0/fw-version.fth ============================================================================== --- cpu/arm/olpc/4.0/fw-version.fth Wed Nov 19 23:47:06 2014 (r3746) +++ cpu/arm/olpc/4.0/fw-version.fth Thu Nov 20 00:05:11 2014 (r3747) @@ -1,7 +1,7 @@ \ The overall firmware revision macro: FW_PREFIX Q7 macro: FW_MAJOR B -macro: FW_MINOR 40 +macro: FW_MINOR 41 \ Create a 2-character build/fw-suffix file to personalize your test builds " fw-suffix" $file-exists? [if]

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[commit] r3746 - cpu/arm/olpc/4.0
by repository service Nov. 19, 2014

Nov. 19, 2014

Author: quozl Date: Wed Nov 19 23:47:06 2014 New Revision: 3746 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3746 Log: OLPC XO-4 - new EC firmware for Simplo LiPoly battery module Modified: cpu/arm/olpc/4.0/ec-version.fth Modified: cpu/arm/olpc/4.0/ec-version.fth ============================================================================== --- cpu/arm/olpc/4.0/ec-version.fth Mon Nov 17 00:36:21 2014 (r3745) +++ cpu/arm/olpc/4.0/ec-version.fth Wed Nov 19 23:47:06 2014 (r3746) @@ -1,6 +1,6 @@ \ The EC microcode macro: EC_PLATFORM cl4 -macro: EC_VERSION 7_0_4_12 +macro: EC_VERSION 7_0_5_01 \ Alternate command for getting EC microcode, for testing new versions. \ Temporarily uncomment the line and modify the path as necessary

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[commit] r3745 - cpu/x86/pc/olpc
by repository service Nov. 17, 2014

Nov. 17, 2014

Author: quozl Date: Mon Nov 17 00:36:21 2014 New Revision: 3745 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3745 Log: OLPC - tidy boost command output, break the line Modified: cpu/x86/pc/olpc/apt.fth Modified: cpu/x86/pc/olpc/apt.fth ============================================================================== --- cpu/x86/pc/olpc/apt.fth Mon Nov 3 08:27:15 2014 (r3744) +++ cpu/x86/pc/olpc/apt.fth Mon Nov 17 00:36:21 2014 (r3745) @@ -18,7 +18,7 @@ : .os " more int:\boot\olpc_build" eval ; -: boost .bat h# 3b ec-cmd d# 1000 ms h# 3c ec-cmd d# 1000 ms .bat ; +: boost .bat cr h# 3b ec-cmd d# 1000 ms h# 3c ec-cmd d# 1000 ms .bat ; stand-init: wifi " NN" find-tag if ?-null $essid then \ network name

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[commit] r3744 - in cpu: arm/olpc x86/pc/olpc/via/Notes
by repository service Nov. 3, 2014

Nov. 3, 2014

Author: quozl Date: Mon Nov 3 08:27:15 2014 New Revision: 3744 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3744 Log: OLPC XO-1.75 XO-4 - backport XO-4 EC recovery changes into the XO-1.75 EC recovery script, and test. Modified: cpu/arm/olpc/edi.fth cpu/x86/pc/olpc/via/Notes/fix-ec-175.fth cpu/x86/pc/olpc/via/Notes/fix-ec-4.fth Modified: cpu/arm/olpc/edi.fth ============================================================================== --- cpu/arm/olpc/edi.fth Fri Oct 31 06:29:38 2014 (r3743) +++ cpu/arm/olpc/edi.fth Mon Nov 3 08:27:15 2014 (r3744) @@ -1,7 +1,7 @@ \ See license at end of file purpose: Access and FLASH programming for KB3731 EC via its "EDI" interface -\ The following code depends on externally-privided low-level SPI bus +\ The following code depends on externally-provided low-level SPI bus \ access primitives that are defined in "bbedi.fth" for the "native" \ case (EC and CPU on the same machine). They can also be implemented \ for tethered programming from a different machine like an XO-1.5. Modified: cpu/x86/pc/olpc/via/Notes/fix-ec-175.fth ============================================================================== --- cpu/x86/pc/olpc/via/Notes/fix-ec-175.fth Fri Oct 31 06:29:38 2014 (r3743) +++ cpu/x86/pc/olpc/via/Notes/fix-ec-175.fth Mon Nov 3 08:27:15 2014 (r3744) @@ -3,15 +3,21 @@ \ HOWTO USE THIS \ Put this file and ecimage.bin (32768 bytes) on a USB stick, insert into XO-1.5 \ Connect 6-pin programming cable from XO-1.5 recovery driver port (J3) to -\ XO-1.75 A2 EDI "REFLASH EC HEADER" (J3) +\ XO-1.75 EDI "REFLASH EC HEADER" (J3) \ Power on XO-1.5 \ Power on XO-1.75 \ ok fload u:\fixec175.fth \ ok select /spi -\ ok recover-ec +\ ok excavate-ec u:\old.bin +\ ok recover-ec u:\ecimage.bin dev /spi +\ from cpu/arm/olpc/1.75/config.fth +char 4 constant expected-ec-version +h# 8000 constant /ec-flash +h# 7e80 constant ec-flags-offset \ don't program or verify this page + : pio16mhz ( -- ) h# 01 h# 6c spi-b! \ 33/(2*1) MHz h# 00 h# 6e spi-b! \ No special clocking @@ -54,6 +60,7 @@ out-ptr @ spi-b@ 8 out-ptr ! ; +: spi-start ( -- ) ; : edi-wait-b ( -- b ) 4 #in-bytes ! @@ -79,7 +86,7 @@ \ *** Start of verbatim inclusion of edi.fth -\ The following code depends on externally-privided low-level SPI bus +\ The following code depends on externally-provided low-level SPI bus \ access primitives that are defined in "bbedi.fth" for the "native" \ case (EC and CPU on the same machine). They can also be implemented \ for tethered programming from a different machine like an XO-1.5. @@ -91,7 +98,44 @@ \ spi-out ( byte -- ) - Send byte \ spi-in ( -- byte ) - Receive byte +0 value edi-chip-id +: kb9010? ( -- flag ) edi-chip-id 4 = ; + +: efcfg ( -- reg# ) kb9010? if h# fead else h# fea0 then ; +: efcmd ( -- reg# ) kb9010? if h# feac else h# fea7 then ; +: efdat ( -- reg# ) kb9010? if h# feab else h# feaa then ; \ io3731 has different read and write regs +h# feab constant efdat-in +: rst8051 ( -- reg# ) kb9010? if h# ff14 else h# f010 then ; +: ecreboot ( -- reg# ) kb9010? if h# ff01 else h# f018 then ; +\ Issues with .py code +\ A14:A8 should be A15:A8 several places +\ inconsistent use of handle vs gd.handle in edi_erase_chip + +\ KB9010 stuff... +d# 59 d# 1024 * constant /kb9010-flash +h# fe80 constant wdtcfg +h# fe81 constant wdtpf +h# fe82 constant wdt +h# fea2 constant shccfg +\ h# fea5 constant xbicfg \ Unused +h# fea6 constant xbics +\ h# feae constant efdatr \ Unused +\ h# feaf constant emfburw +h# feb2 constant xbiwp +\ h# feb6 constant xbipump +\ h# feb7 constant xbifm +\ h# feb8 constant sbivr +h# feb9 constant xbis +h# ff0d constant clkcfg +h# ff0f constant pllcfg +h# ff1d constant ecsts +h# ff1f constant pllcfg2 +h# ff14 constant pxcfg + +\ end KB9010 stuff... + d# 128 constant /flash-page +defer edi-progress ' 2drop to edi-progress ( offset size -- ) : edi-cmd,adr ( offset cmd -- ) \ Send command plus 3 address bytes spi-cs-on ( offset cmd ) @@ -103,12 +147,22 @@ ; [ifndef] edi-wait-b : edi-wait-b ( -- b ) \ Wait for and receive EC response byte - d# 10 0 do - spi-in h# 50 = if - spi-in ( b ) - spi-cs-off ( b ) - unloop exit - then + d# 100 0 do + spi-in ( d ) + dup h# 5f <> if ( d ) + dup h# 50 = if ( d ) + drop + spi-in ( b ) + spi-cs-off ( b ) + unloop exit + then ( d ) + spi-cs-off ( d ) + \ The setup in the CL4 has can also report zeros when inactive. + 2dup h# ff = 00 = or abort" EDI byte in inactive" + ." Unknown EDI byte in response: " .h cr + true abort" EDI byte in confused" + then ( d ) + drop loop spi-cs-off true abort" EDI byte in timeout" @@ -142,18 +196,25 @@ ; [then] : reset-8051 ( -- ) \ Reset 8-5 - h# f010 edi-b@ 1 or h# f010 edi-b! + rst8051 edi-b@ 1 or rst8051 edi-b! ; : unreset-8051 ( -- ) \ Reset 8-5 - h# f010 edi-b@ 1 invert and h# f010 edi-b! + rst8051 edi-b@ 1 invert and rst8051 edi-b! + d# 2000 ms ; \ 0 in bit 0 selects masked ROM as code source for 8051, 1 selects FLASH \ The 8051 should be in reset mode when changing that bit. + : select-flash ( -- ) \ Setup for access to FLASH inside the EC + kb9010? if exit then h# f011 edi-b@ 1 or h# f011 edi-b! ; +: edi-read-id ( -- id ) + spi-cs-on h# 3e spi-out spi-in spi-cs-off +; + : probe-rdid ( -- found? ) \ Verify that the EC is the one we think it is select-flash h# f01c ['] edi-w@ catch if ( x ) @@ -163,12 +224,15 @@ 1 invert and h# 3730 = ; +: finished? ( b -- flag ) + kb9010? if 2 and 0= else h# 80 and h# 80 = then +; : wait-flash-busy ( -- ) \ Wait for an erase/programming operation to complete get-msecs h# 1000 + ( limit ) begin ( limit ) - h# fea0 edi-b@ ( limit b ) - h# 80 and if ( limit ) - drop exit + efcfg edi-b@ ( limit b ) + finished? if ( limit ) + drop exit ( -- ) then ( limit ) dup get-msecs - 0<= ( limit timeout? ) until ( limit ) @@ -176,11 +240,12 @@ true abort" EDI FLASH busy timeout" ; -: flash-cmd ( b -- ) h# fea7 edi-b! ; +: flash-cmd ( b -- ) efcmd edi-b! ; : set-offset ( offset -- ) - wbsplit ( offset-low offset-hi ) - h# fea9 edi-b! h# fea8 edi-b! ( ) + lbsplit drop ( offset-low mid hi ) + kb9010? if h# feaa edi-b! else drop then ( offset-low mid ) + h# fea9 edi-b! h# fea8 edi-b! ( ) ; : erase-page ( offset -- ) @@ -189,14 +254,19 @@ h# 20 flash-cmd ( ) ; -: erase-chip ( -- ) wait-flash-busy h# 60 flash-cmd wait-flash-busy ; +: erase-chip ( -- ) + 0 set-offset \ New code does this (and does not wait-flash-busy) + wait-flash-busy h# 60 flash-cmd wait-flash-busy +; -: send-byte ( b offset -- ) set-offset h# feaa edi-b! 2 flash-cmd ; +: send-byte ( b offset -- ) set-offset efdat edi-b! 2 flash-cmd ; : edi-program-page ( adr offset -- ) \ Clear HVPL wait-flash-busy h# 80 flash-cmd ( adr offset ) + wait-flash-busy ( adr offset ) \ Necessary? + \ Fill the page buffer swap /flash-page bounds do ( offset ) i c@ over send-byte ( offset ) @@ -206,10 +276,10 @@ \ Commit the buffer to the FLASH memory wait-flash-busy ( ) \ Redundant wait? - h# 70 flash-cmd ( ) + h# 70 flash-cmd ( ) \ Program page command wait-flash-busy ( ) ; -h# 7e80 constant ec-flags-offset + : edi-program-flash ( adr len offset -- ) cr ( adr len offset ) swap 0 ?do ( adr offset ) @@ -218,6 +288,7 @@ dup i + erase-page ( adr offset ) over i + over i + edi-program-page ( adr offset ) then ( adr offset ) + i /ec-flash edi-progress ( adr offset ) /flash-page +loop ( adr offset ) 2drop ( ) ; @@ -229,12 +300,14 @@ edi-next-b@ i c! ( ) loop ( ) ; + : trim@ ( offset -- b ) set-offset h# 90 flash-cmd wait-flash-busy - h# feab edi-b@ + efdat-in edi-b@ \ reg: efdat ; + : trim-tune ( -- ) \ firmware-id 0= if \ Read trim data and write to register (for ENE macros) @@ -293,39 +366,148 @@ then \ then ; -: edi-open ( -- ) - \ slow-edi-clock \ Target speed between 1 and 2 MHz +: set-chip-id ( -- ) + ['] edi-read-id catch if ( ) + edi-read-id ( id ) + then ( id ) + to edi-chip-id +; +: kb9010-init ( -- ) + h# 00 xbics edi-b! + h# 00 xbiwp edi-b! \ Clear XBI write protection + h# ff wdt edi-b! \ Disable WDT + h# 00 wdtcfg edi-b! + h# 00 wdtpf edi-b! + h# 00 shccfg edi-b! \ Disable SHC + h# 0c clkcfg edi-b! \ Set the 8051 to 32Mhz + h# 08 efcfg edi-b! \ Enable the embedded flash cmd mode +; +base @ hex +create special-row 1f0 w, 1f1 w, 1f2 w, 1f4 w, 1f5 w, 1f6 w, 1f3 w, +create dest-regs feb9 w, feb6 w, feb6 w, feb7 w, feb8 w, feb8 w, feb7 w, +create source-bits 1f c, 0f c, 0f c, 0f c, 07 c, 1f c, 0f c, +create dest-bits 1f c, f0 c, 0f c, 0f c, e0 c, 1f c, f0 c, +create shift-cnt 0 c, 4 c, 0 c, 0 c, 5 c, 0 c, 4 c, +base ! +: kb9010-trimtune ( -- ) + h# 1ff trim@ 0<> if + 7 0 do + special-row i wa+ w@ edi-b@ ( data ) + source-bits i ca+ c@ or ( field ) + shift-cnt i ca+ c@ lshift ( field' ) + dest-regs i wa+ w@ edi-b@ ( field dest ) + dest-bits i ca+ c@ invert and or ( dest' ) + dest-regs i wa+ w@ edi-b! ( ) + loop + wait-flash-busy + then + h# 80 trim@ h# 5a = if + ecsts edi-b@ ( old-ecsts ) + dup 4 or ecsts edi-b! ( old-ecsts ) \ chipid is now pllcfg2 + + xbis edi-b@ h# 3f and ( old-ecsts xbis-bits ) + h# 81 trim@ 3 and 6 lshift or ( old-ecsts xbis-value ) + xbis edi-b! ( old-ecsts ) + + h# 82 trim@ h# f and 4 lshift ( old-ecsts pll-high ) + h# 83 trim@ h# f0 and 4 rshift or ( old-ecsts pll-value ) + pllcfg edi-b! ( old-ecsts ) + + pllcfg2 edi-b@ h# 3f and ( old-ecsts pll2-bits ) + h# 82 trim@ h# 30 and 2 lshift or ( old-ecsts pll2-value ) + pllcfg2 edi-b! ( old-ecsts ) + + ecsts edi-b! ( ) + then +; +\ This is used to start EDI from routines where you do not want to +\ put the EC into reset. ie the mfg tag reading routines +: edi-open-active ( -- ) spi-start - \ The first operation often fails so retry it - ['] select-flash catch if select-flash then + + \ Does a dummy ready and throws away the result. + \ required to get the EDI interface enabled + h# ff22 ['] edi-b@ catch 2drop + + set-chip-id + + select-flash +; +\ Full EDI startup sequece. Used when you want to reprogram the EC. +: edi-open ( -- ) + edi-open-active + reset-8051 - trim-tune - \ fast-edi-clock \ Target speed up to 16 MHz - \ reset + + kb9010? if + kb9010-init + kb9010-trimtune + else + trim-tune + then ; + \ *** End of verbatim inclusion of edi.fth -: recover-ec ( -- ) +\ *** Start of selective inclusion of cpu/arm/olpc/ecflash.fth + +: check-signature ( adr -- ) + /ec-flash + h# 100 - ( adr' ) + dup " XO-EC" comp abort" Bad signature in EC image" ( adr ) + dup ." EC firmware version: " cscount type cr ( adr ) + dup 6 + c@ expected-ec-version <> abort" Wrong EC version" ( adr ) + drop +; + +: ?ec-image-valid ( adr len -- ) + dup /ec-flash <> abort" Image file is the wrong size" ( adr len ) + over c@ h# 02 <> abort" Invalid EC image - must start with 02" + 2dup 0 -rot bounds ?do i l@ + /l +loop ( adr len checksum ) + abort" Incorrect EC image checksum" ( adr len ) + over check-signature ( adr len ) + 2drop +; + +0 value ec-file-loaded? +: get-ec-file ( "name" -- ) + safe-parse-word ." Reading " 2dup type cr + $read-open + load-base /ec-flash ifd @ fgets ( len ) + ifd @ fclose ( len ) + load-base swap ?ec-image-valid +; + +: ignore-ec-flags ( adr -- ) ec-flags-offset + /flash-page erase ; +: reflash-ec ( -- ) + pio1.5mhz edi-open - " u:\ecimage.bin" $read-file abort" Read error" ( adr len ) - erase-chip ( adr len ) - 2dup 0 edi-program-flash ( adr len ) - load-base 8000 0 edi-read-flash ( adr len ) - 2dup load-base swap comp if ." Different" then ( adr len ) - free-mem ( ) + erase-chip + ." Writing ..." load-base /ec-flash 0 edi-program-flash cr + ." Verifying ..." + load-base /ec-flash + /ec-flash 0 edi-read-flash + + load-base ignore-ec-flags + load-base /ec-flash + ignore-ec-flags + load-base load-base /ec-flash + /ec-flash comp + abort" Miscompare!" + cr ; +: recover-ec ( "filename" -- ) get-ec-file reflash-ec ; -: read-ec ( -- ) +: read-ec-flash ( -- ) pio1.5mhz edi-open - load-base h# 8000 0 edi-read-flash ( ) - ." Writing EC image to u:\ecimage.bin" - " u:\ecimage.bin" $new-file ( ) - load-base h# 8000 ofd @ fputs ( ) - ofd @ fclose ( ) - ." Written" cr + flash-buf /ec-flash 0 edi-read-flash ; +: excavate-ec ( "name" -- ) + safe-parse-word $new-file + read-ec-flash + load-base /ec-flash ofd @ fputs + ofd @ fclose +; + +\ *** End of selective inclusion of cpu/arm/olpc/ecflash.fth dend Modified: cpu/x86/pc/olpc/via/Notes/fix-ec-4.fth ============================================================================== --- cpu/x86/pc/olpc/via/Notes/fix-ec-4.fth Fri Oct 31 06:29:38 2014 (r3743) +++ cpu/x86/pc/olpc/via/Notes/fix-ec-4.fth Mon Nov 3 08:27:15 2014 (r3744) @@ -60,6 +60,7 @@ out-ptr @ spi-b@ 8 out-ptr ! ; +: spi-start ( -- ) ; : edi-wait-b ( -- b ) 4 #in-bytes !

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