Author: wmb Date: 2008-09-11 10:57:08 +0200 (Thu, 11 Sep 2008) New Revision: 930
Modified: cpu/x86/pc/olpc/addrs.fth cpu/x86/pc/olpc/gxearly.fth cpu/x86/pc/olpc/gxmsrs.fth cpu/x86/pc/olpc/probemem.fth cpu/x86/pc/olpc/vsapci.fth Log: OLPC trac 8426 - fixed B2 bricking by E-series firmware. The problem was caused by incorrect MSR setting for the memory that's mapped high for OFW's use. The MSRs were set correctly for LX CPUs, but not for GXs.
Modified: cpu/x86/pc/olpc/addrs.fth =================================================================== --- cpu/x86/pc/olpc/addrs.fth 2008-09-09 23:12:37 UTC (rev 929) +++ cpu/x86/pc/olpc/addrs.fth 2008-09-11 08:57:08 UTC (rev 930) @@ -17,8 +17,9 @@
dropin-base h# 20 + constant ResetBase \ Location of "reset" dropin in ROM
-h# ec0.0000 constant fw-pa +h# ec0.0000 value fw-pa \ Changed in probemem.fth h# 20.0000 constant /fw-ram +h# 40.0000 constant /fw-area [then]
[ifdef] linuxbios-loaded
Modified: cpu/x86/pc/olpc/gxearly.fth =================================================================== --- cpu/x86/pc/olpc/gxearly.fth 2008-09-09 23:12:37 UTC (rev 929) +++ cpu/x86/pc/olpc/gxearly.fth 2008-09-11 08:57:08 UTC (rev 930) @@ -39,24 +39,27 @@ \ Some of these don't really have to be set here, and could be \ moved to the big table of MSR values, except that the table \ slammer is dumb and can't handle conditionals. - 20000000.000fff00. 10000020 set-msr \ memory - 0..fffff + 20000000.000fff80. 10000020 set-msr \ memory - 0..7ffff + 20000000.080fffe0. 10000026 set-msr \ memory - 80000..9ffff (a0000..bffff is for VGA) + 20000000.0c0fffc0. 10000027 set-msr \ memory - c0000..fffff + ffbff000.ff800100. 1817 set-msr \ Region config - OFW area cacheable
1030 port-rl 4 bitand 0<> if \ 128 MiB - 25fff002.1077e000. 1808 set-msr - 2c7be040.400fffe0. 10000026 set-msr - 20000007.7df00100. 10000028 set-msr \ Top of memory - 20a7e0fd.7fffd000. 10000029 set-msr \ Frame buffer - 10075012.00003400. 20000018 set-msr - 20000007.7df00100. 40000029 set-msr \ top of memory. - 077df000.00100130. 50002019 set-msr + 25fff002.10780000. 1808 set-msr + 20000007.7ff00100. 10000028 set-msr \ Range - Top of memory at 07ff.ffff, fbsize + 20a800fd.7fffd000. 10000029 set-msr \ Range Offset - Frame buffer at PA fd00.0000 maps to RAM at 0780.0000, fbsize + 207c00ff.bffff800. 1000002b set-msr \ Range Offset - OFW area ff80.0000 maps to RAM at 0740.0000, fbsize + 10075012.00003400. 20000018 set-msr \ Refresh/SDRAM - DIMM 0 size 128 MB + 20000007.7ff00100. 40000029 set-msr \ Top of memory for DMA - 77ff.0000, fbsize + 077ff000.00100130. 50002019 set-msr \ Memory Region 1 config - top at 77ff.0000, PF, WC, fbsize else \ 256 MiB - 25fff002.10f7e000. 1808 set-msr - 2cfbe040.400fffe0. 10000026 set-msr - 2000000f.7df00100. 10000028 set-msr \ Top of memory - 2127e0fd.7fffd000. 10000029 set-msr \ Frame buffer - 10076013.00003400. 20000018 set-msr - 2000000f.7df00100. 40000029 set-msr \ top of memory. - 0f7df000.00100130. 50002019 set-msr + 25fff002.10f80000. 1808 set-msr + 2000000f.7ff00100. 10000028 set-msr \ Range - Top of memory at 0fff.ffff, fbsize + 212800fd.7fffd000. 10000029 set-msr \ Range Offset - Frame buffer at PA fd00.0000 maps to RAM at 0f80.0000, fbsize + 20fc00ff.bffff800. 1000002b set-msr \ Range Offset - OFW area ff80.0000 maps to RAM at 0f40.0000, fbsize + 10076013.00003400. 20000018 set-msr \ Refresh/SDRAM - DIMM 0 size 128 MB + 2000000f.7ff00100. 40000029 set-msr \ Top of memory for DMA - f7ff.0000, fbsize + 0f7ff000.00100130. 50002019 set-msr \ Memory Region 1 config - top at f7ff.0000, PF, WC, fbsize then
\ 20000019 rmsr \ SDRAM timing and mode program
Modified: cpu/x86/pc/olpc/gxmsrs.fth =================================================================== --- cpu/x86/pc/olpc/gxmsrs.fth 2008-09-09 23:12:37 UTC (rev 929) +++ cpu/x86/pc/olpc/gxmsrs.fth 2008-09-11 08:57:08 UTC (rev 930) @@ -52,7 +52,7 @@ \ msr: 4000.0027 000000ff.fff00000. \ Unmapped - default \ msr: 4000.0028 000000ff.fff00000. \ Unmapped - default \ msr: 4000.0029 20000007.7df00100. \ 10.0000 - 0f7d.f000 High RAM - Memsize dependent -msr: 4000.002a 200000fd.7fffd000. \ frame buffer - fd00.0000 .. fd7f.ffff, route to GLIU0 +msr: 4000.002a 200000fd.7fffd000. \ frame buffer - fd00.0000 .. fd7f.ffff, route to GLIU0, fbsize \ msr: 4000.002d 20000000.f0000003. \ 000f.0000 - 000f.ffff expansion ROM; XXX - no expansion ROM msr: 4000.0080 00000000.00000001. \ Route coherency snoops from GLIU1 to GLIU0 msr: 4000.0083 00000000.0000ff00. \ Disable SMIs
Modified: cpu/x86/pc/olpc/probemem.fth =================================================================== --- cpu/x86/pc/olpc/probemem.fth 2008-09-09 23:12:37 UTC (rev 929) +++ cpu/x86/pc/olpc/probemem.fth 2008-09-11 08:57:08 UTC (rev 930) @@ -35,6 +35,8 @@ : release-range ( start-adr end-adr -- ) over - release ;
: probe ( -- ) + system-ram /fw-area - to fw-pa + 0 total-ram reg \ Report extant memory
\ Put h# 10.0000-1f.ffff and 28.0000-memsize in pool,
Modified: cpu/x86/pc/olpc/vsapci.fth =================================================================== --- cpu/x86/pc/olpc/vsapci.fth 2008-09-09 23:12:37 UTC (rev 929) +++ cpu/x86/pc/olpc/vsapci.fth 2008-09-11 08:57:08 UTC (rev 930) @@ -154,7 +154,7 @@
create gxfb-hdr \ All R/O except cmd/stat and cache line size ' gxfb-cmd-reg token, ' >hdr-value token, - ff000000 , ffffc000 , ffffc000 , ffffc000 , + ff800000 , ffffc000 , ffffc000 , ffffc000 , 0 , 0 , 0 , 0 ,
30100b , 2200002 , 3000000 , 8 ,