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[commit] r3181 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 04:16:12 2012 New Revision: 3181 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3181 Log: OLPC ARM - Tweaks to the last EDI checkin so that EDI operations are always bracketed exactly the same way, with use-edi-spi ... use-ssp-spi Modified: cpu/arm/olpc/build-fw.fth cpu/arm/olpc/ecflash.fth Modified: cpu/arm/olpc/build-fw.fth ============================================================================== --- cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:14 2012 (r3180) +++ cpu/arm/olpc/build-fw.fth Thu Aug 16 04:16:12 2012 (r3181) @@ -195,13 +195,14 @@ fload ${BP}/cpu/arm/olpc/ecflash.fth : ec-spi-reprogrammed ( -- ) - edi-spi-start + use-edi-spi spi-start set-ec-reboot unreset-8051 + use-ssp-spi ; : ignore-power-button ( -- ) - edi-spi-start + use-edi-spi edi-open-active ['] reset-8051 catch if ['] reset-8051 catch if ." Write Protected EC" cr then Modified: cpu/arm/olpc/ecflash.fth ============================================================================== --- cpu/arm/olpc/ecflash.fth Thu Aug 16 04:01:14 2012 (r3180) +++ cpu/arm/olpc/ecflash.fth Thu Aug 16 04:16:12 2012 (r3181) @@ -66,6 +66,7 @@ ." Restarting EC and rebooting" cr set-ec-reboot unreset-8051 + use-ssp-spi [then] ec-power-cycle ; @@ -79,6 +80,7 @@ [else] use-edi-spi edi-open flash-buf /ec-flash 0 edi-read-flash + use-ssp-spi [then] ; : save-ec-flash ( "name" -- )

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[commit] r3180 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: rsmith Date: Thu Aug 16 04:01:14 2012 New Revision: 3180 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3180 Log: OLPC ARM - Refactor EDI start procedure Reboot after reflash did not work because the EC chip ID (io3731 vs io3790) was not set in the series of calls that the OFW flash makes. Refactor the EDI startup so that there is a common EDI enable routine for other words to call. Modified: cpu/arm/olpc/build-fw.fth cpu/arm/olpc/edi.fth Modified: cpu/arm/olpc/build-fw.fth ============================================================================== --- cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:07 2012 (r3179) +++ cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:14 2012 (r3180) @@ -202,6 +202,7 @@ : ignore-power-button ( -- ) edi-spi-start + edi-open-active ['] reset-8051 catch if ['] reset-8051 catch if ." Write Protected EC" cr then then Modified: cpu/arm/olpc/edi.fth ============================================================================== --- cpu/arm/olpc/edi.fth Thu Aug 16 04:01:07 2012 (r3179) +++ cpu/arm/olpc/edi.fth Thu Aug 16 04:01:14 2012 (r3180) @@ -335,23 +335,23 @@ ecsts edi-b! ( ) then ; - -\ Does a dummy ready and throws away the result. -\ required to get the EDI interface enabled -: edi-start ( -- ) - h# ff22 ['] edi-b@ catch if noop else drop then -; - -: edi-open ( -- ) - \ slow-edi-clock \ Target speed between 1 and 2 MHz +\ This is used to start EDI from routines where you do not want to +\ put the EC into reset. ie the mfg tag reading routines +: edi-open-active ( -- ) spi-start - edi-start + \ Does a dummy ready and throws away the result. + \ required to get the EDI interface enabled + h# ff22 ['] edi-b@ catch if noop else drop then set-chip-id - \ The first operation often fails so retry it - ['] select-flash catch if select-flash then + select-flash +; +\ Full EDI startup sequece. Used when you want to reprogram the EC. +: edi-open ( -- ) + edi-open-active + reset-8051 kb9010? if @@ -360,14 +360,7 @@ else trim-tune then - \ fast-edi-clock \ Target speed up to 16 MHz - \ reset ; -: edi-open-active ( -- ) - spi-start - ['] select-flash catch if select-flash then -; - \ LICENSE_BEGIN \ Copyright (c) 2011 FirmWorks \

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[commit] r3179 - cpu/arm/olpc dev/olpc/dcon
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 04:01:07 2012 New Revision: 3179 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3179 Log: OLPC ARM - Added properties to display and DCON device nodes for the benefit of the Linux pxa168fb.c driver. Modified: cpu/arm/olpc/lcd.fth dev/olpc/dcon/mmp2dcon.fth Modified: cpu/arm/olpc/lcd.fth ============================================================================== --- cpu/arm/olpc/lcd.fth Thu Aug 16 02:25:33 2012 (r3178) +++ cpu/arm/olpc/lcd.fth Thu Aug 16 04:01:07 2012 (r3179) @@ -5,6 +5,9 @@ " display" name my-address my-space h# 1000 reg + " mrvl,pxa168fb" +compatible + + " LCDCLK" " clock-names" string-property " /pmua" encode-phandle 1 encode-int encode+ " clocks" property d# 41 " interrupts" integer-property Modified: dev/olpc/dcon/mmp2dcon.fth ============================================================================== --- dev/olpc/dcon/mmp2dcon.fth Thu Aug 16 02:25:33 2012 (r3178) +++ dev/olpc/dcon/mmp2dcon.fth Thu Aug 16 04:01:07 2012 (r3179) @@ -10,14 +10,30 @@ previous definitions new-device -" dcon" device-name -" olpc,xo1-dcon" +compatible -" olpc,xo1.75-dcon" +compatible + " dcon" device-name + " mrvl,dumb-panel" +compatible + " olpc,xo1-dcon" +compatible + " olpc,xo1.75-dcon" +compatible + + " OLPC DCON panel" model + : +i encode-int encode+ ; + + decimal + 0 0 encode-bytes + \ xres, yres, refresh, clockhz, left, right, top, bottom, hsync, vsync, flags, widthmm, heightmm + 1200 +i 900 +i 50 +i 56,930,000 +i 24 +i 26 +i 5 +i 4 +i 6 +i 3 +i 0 +i 152 +i 115 +i + hex + " linux,timing-modes" property + + " 1200x900@50" " linux,mode-names" string-property + + h# 2000000d " lcd-dumb-ctrl-regval" integer-property + h# 08001100 " lcd-pn-ctrl0-regval" integer-property finish-device stand-init: has-dcon-ram? 0= if - " /dcon? find-device + " /dcon" find-device 0 0 " no-freeze" property device-end then

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[commit] r3178 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 02:25:33 2012 New Revision: 3178 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3178 Log: OLPC ARM - Deleted dead code from bbedi.fth Modified: cpu/arm/olpc/bbedi.fth Modified: cpu/arm/olpc/bbedi.fth ============================================================================== --- cpu/arm/olpc/bbedi.fth Wed Aug 15 20:03:54 2012 (r3177) +++ cpu/arm/olpc/bbedi.fth Thu Aug 16 02:25:33 2012 (r3178) @@ -7,97 +7,7 @@ : edi-clk-lo ( -- ) ec-edi-clk-gpio# gpio-clr ; : edi-clk-hi ( -- ) ec-edi-clk-gpio# gpio-set ; -0 [if] -\ All this timing stuff is pointless because the GPIOs are so slow -\ that the problem is to make the clock go fast enough to satisfy -\ the initial connection speed requirement. - -\ We need to run at between 1 and 2 MHz for the initial connection, -\ and then we can go faster, up to 16 Mhz. -\ The half-cycle period for 1-2 MHz is between 250 ns and 500 ns. -\ Timer0 runs at 6.5 MHz so each tick is about 150 ns. -\ Two ticks is 300 ns, three is 450 ns. -code spins ( count -- ) - cmp tos,#0 - <> if - begin - subs tos,tos,#1 - 0= until - then - pop tos,sp -c; - -d# 150 value edi-dly-spins -: edi-dly ( -- ) edi-dly-spins spins ; - -\ CPU clock is 800 Mhz, so 1.25 ns/clock -\ spins is 2 clocks/spin, so 2.5 ns/spin -\ Slow clock must be between 1 and 2 MHz, so period is between 1000 and 500 ns. -\ edi-dly is a half cycle, so edi-dly for slow clock is between 500 and 250 ns. -\ So we need between 200 and 100 spins for slow edi-dly -\ Fast clock can be up to 16 Mhz, so full-cycle period of 62.5 ns, half-cycle -\ period of >= 31.25 ns, so >= 12.5 spins at 2.5. ns/spin. - -: slow-edi-clock ( -- ) d# 150 to edi-dly-spins ; -: fast-edi-clock ( -- ) d# 13 to edi-dly-spins ; - -code edi-bit! ( flag -- ) - mov r0,#0x200 - set r1,`h# 19100 +io #` - cmp tos,#0 - streq r0,[r1,#0x24] \ Clr MOSI if flag is 0 - strne r0,[r1,#0x18] \ Set MOSI if flag is non0 - mov r0,#0x400 - str r0,[r1,#0x18] \ Set CLK - str r0,[r1,#0x24] \ Clr CLK - pop tos,sp -c; - -[ifndef] edi-bit! -: edi-bit! ( flag -- ) - ec-edi-mosi-gpio# swap if gpio-set else gpio-clr then - edi-clk-hi - edi-dly - edi-clk-lo - edi-dly -; -[then] - -[ifndef] edi-bit! -: edi-bit! ( flag -- ) - if - [ ec-edi-mosi-gpio# >gpio-pin h# 18 + ] dliteral io! \ Fast gpio-set - else - [ ec-edi-mosi-gpio# >gpio-pin h# 24 + ] dliteral io! \ Fast gpio-clr - then - [ ec-edi-clk-gpio# >gpio-pin h# 18 + ] dliteral io! \ Fast gpio-set -\ edi-dly - [ ec-edi-clk-gpio# >gpio-pin h# 24 + ] dliteral io! \ Fast gpio-set -\ edi-dly -; -[then] - -: edi-out ( b -- ) - 8 0 do ( b ) - dup h# 80 and edi-bit! ( b ) - 2* ( b' ) - loop ( b ) - drop ( ) -; -: edi-bit@ ( -- flag ) - edi-clk-hi - edi-dly - ec-edi-miso-gpio# gpio-pin@ - edi-clk-lo - edi-dly -; -: edi-in-h ( b -- ) - 0 ( b ) - 8 0 do ( b ) - 2* edi-bit@ 1 and or ( b' ) - loop ( b ) -; -[else] +\ This must be done in code to satisfy the stringent timing requirements of the EDI hardware code edi-out ( byte -- ) mov r2,#8 mov r0,#0x200 \ MOSI mask @@ -125,27 +35,6 @@ pop tos,sp c; -code edi-out1 ( byte -- ) - mov r2,#8 - mov r0,#0x200 \ MOSI mask - set r1,`h# 19100 +io #` \ GPIO register address - mov r4,#0x400 \ CLK mask - mov r5,#0x600 \ CLK and MOSI mask - begin - ands r3,tos,#0x80 \ Test bit - - strne r5,[r1,#0x18] \ Set MOSI and CLK in the same operation if bit is non0 - streq r0,[r1,#0x24] \ Clr MOSI - streq r4,[r1,#0x18] \ Set CLK - - str r4,[r1,#0x24] \ Clr CLK - - add tos,tos,tos \ Left shift TOS - decs r2,1 - 0= until - - pop tos,sp -c; code edi-in ( -- byte ) psh tos,sp mov tos,#0 \ Initial byte value @@ -180,9 +69,6 @@ 0= until c; -[then] - - : edi-spi-start ( -- ) ['] edi-in to spi-in ['] edi-out to spi-out

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[commit] r3177 - in cpu/arm/olpc: 1.75 cl4
by repository service 15 Aug '12

15 Aug '12

Author: pgf Date: Wed Aug 15 20:03:54 2012 New Revision: 3177 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3177 Log: leds: add device-tree declaration for storage led Modified: cpu/arm/olpc/1.75/leds.fth cpu/arm/olpc/cl4/leds.fth Modified: cpu/arm/olpc/1.75/leds.fth ============================================================================== --- cpu/arm/olpc/1.75/leds.fth Wed Aug 15 02:09:38 2012 (r3176) +++ cpu/arm/olpc/1.75/leds.fth Wed Aug 15 20:03:54 2012 (r3177) @@ -4,6 +4,16 @@ 0 0 " 0" " /" begin-package 0 0 reg \ So test-all will run the test " leds" device-name + +" gpio-leds" +compatible +" leds" device-name + +new-device + " storage-led" device-name + " mmc-block" " linux,default-trigger" string-property + led-storage-gpio# 0 " gpios" gpio-property +finish-device + : open ( -- okay? ) true ; : close ( -- ) ; Modified: cpu/arm/olpc/cl4/leds.fth ============================================================================== --- cpu/arm/olpc/cl4/leds.fth Wed Aug 15 02:09:38 2012 (r3176) +++ cpu/arm/olpc/cl4/leds.fth Wed Aug 15 20:03:54 2012 (r3177) @@ -3,7 +3,16 @@ 0 0 " 0" " /" begin-package 0 0 reg \ So test-all will run the test + +" gpio-leds" +compatible " leds" device-name + +new-device + " storage-led" device-name + " mmc-block" " linux,default-trigger" string-property + led-storage-gpio# 0 " gpios" gpio-property +finish-device + : open ( -- okay? ) true ; : close ( -- ) ;

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[commit] r3176 - in cpu/arm/olpc: 1.75 cl4
by repository service 15 Aug '12

15 Aug '12

Author: wmb Date: Wed Aug 15 02:09:38 2012 New Revision: 3176 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3176 Log: OLPC ARM - Removed typoed extraneous d# before symbolic names for switch gpios, added gpio properties to 1.75 switches node. Modified: cpu/arm/olpc/1.75/switches.fth cpu/arm/olpc/cl4/switches.fth Modified: cpu/arm/olpc/1.75/switches.fth ============================================================================== --- cpu/arm/olpc/1.75/switches.fth Wed Aug 15 00:25:40 2012 (r3175) +++ cpu/arm/olpc/1.75/switches.fth Wed Aug 15 02:09:38 2012 (r3176) @@ -3,6 +3,11 @@ 0 0 " 0" " /" begin-package " switches" device-name + +" olpc,xo1.75-switch" +compatible +ebook-mode-gpio# 1 " ebook-gpios" gpio-property +lid-switch-gpio# 1 " lid-gpios" gpio-property + 0 0 reg \ So test-all will run the test : open ( -- okay? ) true ; : close ( -- ) ; Modified: cpu/arm/olpc/cl4/switches.fth ============================================================================== --- cpu/arm/olpc/cl4/switches.fth Wed Aug 15 00:25:40 2012 (r3175) +++ cpu/arm/olpc/cl4/switches.fth Wed Aug 15 02:09:38 2012 (r3176) @@ -3,11 +3,12 @@ 0 0 " 0" " /" begin-package +" switches" device-name + " olpc,xo1.75-switch" +compatible -d# ebook-mode-gpio# 1 " ebook-gpios" gpio-property -d# lid-switch-gpio# 1 " lid-gpios" gpio-property +ebook-mode-gpio# 1 " ebook-gpios" gpio-property +lid-switch-gpio# 1 " lid-gpios" gpio-property -" switches" device-name 0 0 reg \ So test-all will run the test : open ( -- okay? ) true ; : close ( -- ) ;

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[commit] r3175 - cpu/arm/olpc/cl4
by repository service 14 Aug '12

14 Aug '12

Author: pgf Date: Wed Aug 15 00:25:40 2012 New Revision: 3175 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3175 Log: switches: use symbolic names for gpio pins Modified: cpu/arm/olpc/cl4/switches.fth Modified: cpu/arm/olpc/cl4/switches.fth ============================================================================== --- cpu/arm/olpc/cl4/switches.fth Wed Aug 15 00:11:59 2012 (r3174) +++ cpu/arm/olpc/cl4/switches.fth Wed Aug 15 00:25:40 2012 (r3175) @@ -4,8 +4,8 @@ 0 0 " 0" " /" begin-package " olpc,xo1.75-switch" +compatible -d# 130 1 " ebook-gpios" gpio-property -d# 129 1 " lid-gpios" gpio-property +d# ebook-mode-gpio# 1 " ebook-gpios" gpio-property +d# lid-switch-gpio# 1 " lid-gpios" gpio-property " switches" device-name 0 0 reg \ So test-all will run the test

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[commit] r3174 - cpu/arm/mmp2
by repository service 14 Aug '12

14 Aug '12

Author: pgf Date: Wed Aug 15 00:11:59 2012 New Revision: 3174 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3174 Log: twsi: pluralize the neonode touchscreen gpio properties Modified: cpu/arm/mmp2/twsi.fth Modified: cpu/arm/mmp2/twsi.fth ============================================================================== --- cpu/arm/mmp2/twsi.fth Wed Aug 15 00:11:57 2012 (r3173) +++ cpu/arm/mmp2/twsi.fth Wed Aug 15 00:11:59 2012 (r3174) @@ -213,10 +213,10 @@ " touchscreen" name " zforce" +compatible my-address my-space 1 reg - touch-rst-gpio# 1 " reset-gpio" gpio-property - touch-tck-gpio# 1 " test-gpio" gpio-property - touch-hd-gpio# 1 " hd-gpio" gpio-property - touch-int-gpio# 1 " dr-gpio" gpio-property + touch-rst-gpio# 1 " reset-gpios" gpio-property + touch-tck-gpio# 1 " test-gpios" gpio-property + touch-hd-gpio# 1 " hd-gpios" gpio-property + touch-int-gpio# 1 " dr-gpios" gpio-property end-package [then]

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[commit] r3173 - cpu/arm/olpc/cl4
by repository service 14 Aug '12

14 Aug '12

Author: pgf Date: Wed Aug 15 00:11:57 2012 New Revision: 3173 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3173 Log: switches: declare switch gpio pins for DT Modified: cpu/arm/olpc/cl4/switches.fth Modified: cpu/arm/olpc/cl4/switches.fth ============================================================================== --- cpu/arm/olpc/cl4/switches.fth Tue Aug 14 22:43:20 2012 (r3172) +++ cpu/arm/olpc/cl4/switches.fth Wed Aug 15 00:11:57 2012 (r3173) @@ -2,6 +2,11 @@ purpose: Driver/selftest for OLPC lid and ebook switches 0 0 " 0" " /" begin-package + +" olpc,xo1.75-switch" +compatible +d# 130 1 " ebook-gpios" gpio-property +d# 129 1 " lid-gpios" gpio-property + " switches" device-name 0 0 reg \ So test-all will run the test : open ( -- okay? ) true ;

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[commit] r3172 - dev/olpc/kb3700
by repository service 14 Aug '12

14 Aug '12

Author: wmb Date: Tue Aug 14 22:43:20 2012 New Revision: 3172 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3172 Log: OLPC - Added GPIO properties to /ec-spi node. Modified: dev/olpc/kb3700/spicmd.fth Modified: dev/olpc/kb3700/spicmd.fth ============================================================================== --- dev/olpc/kb3700/spicmd.fth Tue Aug 14 22:42:28 2012 (r3171) +++ dev/olpc/kb3700/spicmd.fth Tue Aug 14 22:43:20 2012 (r3172) @@ -38,6 +38,9 @@ d# 20 " interrupts" integer-property " /apbc" encode-phandle d# 21 encode-int encode+ " clocks" property + ec-spi-ack-gpio# 1 " ack-gpios" gpio-property + ec-spi-cmd-gpio# 1 " cmd-gpios" gpio-property + ec-spi-int-gpio# 1 " int-gpios" gpio-property : encode-unit ( phys -- adr len ) push-hex (u.) pop-base ; : decode-unit ( adr len -- phys ) push-hex $number if 0 then pop-base ;

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