openfirmware August 2012

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[commit] r3187 - cpu/arm/mmp2 cpu/arm/olpc/1.75 cpu/arm/olpc/cl4 dev/olpc/dcon dev/olpc/mmp2camera
by repository service 17 Aug '12

17 Aug '12

Author: wmb Date: Fri Aug 17 01:27:49 2012 New Revision: 3187 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3187 Log: OLPC ARM - Added I2C GPIO device nodes. Modified: cpu/arm/mmp2/gpio.fth cpu/arm/mmp2/twsi.fth cpu/arm/olpc/1.75/gpiopins.fth cpu/arm/olpc/cl4/gpiopins.fth dev/olpc/dcon/mmp2dcon.fth dev/olpc/mmp2camera/platform.fth Modified: cpu/arm/mmp2/gpio.fth ============================================================================== --- cpu/arm/mmp2/gpio.fth Fri Aug 17 01:27:02 2012 (r3186) +++ cpu/arm/mmp2/gpio.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -78,10 +78,38 @@ h# 108 make-gpio-mux-node end-package +: encode-gpio ( propval$ gpio# low? -- propval$' ) + >r >r ( propval$ r: low? gpio# ) + " /gpio" encode-phandle encode+ ( propval$' r: low? gpio# ) + r> encode-int encode+ ( propval$' r: low? ) + r> encode-int encode+ ( propval$' ) +; + : gpio-property ( gpionum low? gpioname$ -- ) - 2>r swap ( low? gpionum r: gpioname$ ) - " /gpio" encode-phandle ( low? gpionum propval$ r: gpioname$ ) - rot encode-int encode+ ( low? propval$' r: gpioname$ ) - rot encode-int encode+ ( propval$' r: gpioname$ ) + 2>r 2>r ( r: gpioname$ gpionum low? ) + 0 0 encode-bytes ( propval$ r: gpioname$ gpionum low? ) + 2r> encode-gpio ( propval$' r: gpioname$ ) 2r> property ( ) ; + +dev / + new-device + " camera-i2c" device-name + " i2c-gpio" +compatible + + 0 0 encode-bytes + cam-sda-gpio# 0 encode-gpio + cam-scl-gpio# 0 encode-gpio + " gpios" property + finish-device + + new-device + " dcon-i2c" device-name + " i2c-gpio" +compatible + + 0 0 encode-bytes + dcon-sda-gpio# 0 encode-gpio + dcon-scl-gpio# 0 encode-gpio + " gpios" property + finish-device +device-end Modified: cpu/arm/mmp2/twsi.fth ============================================================================== --- cpu/arm/mmp2/twsi.fth Fri Aug 17 01:27:02 2012 (r3186) +++ cpu/arm/mmp2/twsi.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -188,7 +188,7 @@ \ baseadr clk irq mux? fast? unit# h# d4011000 1 7 false true 2 make-twsi-node \ TWSI1 -\ h# d4031000 2 0 true true N make-twsi-node \ TWSI2 + h# d4031000 2 0 true true 3 make-twsi-node \ TWSI2 \ h# d4032000 3 1 true true N make-twsi-node \ TWSI3 h# d4033000 4 2 true true 0 make-twsi-node \ TWSI4 \ h# d4038000 d# 30 3 true true N make-twsi-node \ TWSI5 @@ -226,6 +226,12 @@ my-address my-space 1 reg end-package +0 0 " 68" " /i2c@d4031000" begin-package \ TWSI2 + " rtc" name + " idt,idt1338-rtc" +compatible + my-address my-space 1 reg +end-package + 0 0 " " " /" begin-package " twsi" name Modified: cpu/arm/olpc/1.75/gpiopins.fth ============================================================================== --- cpu/arm/olpc/1.75/gpiopins.fth Fri Aug 17 01:27:02 2012 (r3186) +++ cpu/arm/olpc/1.75/gpiopins.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -15,6 +15,9 @@ d# 161 constant dcon-scl-gpio# d# 110 constant dcon-sda-gpio# +d# 100 constant dcon-stat0-gpio# +d# 101 constant dcon-stat1-gpio# + d# 124 constant dcon-irq-gpio# d# 142 constant dcon-load-gpio# Modified: cpu/arm/olpc/cl4/gpiopins.fth ============================================================================== --- cpu/arm/olpc/cl4/gpiopins.fth Fri Aug 17 01:27:02 2012 (r3186) +++ cpu/arm/olpc/cl4/gpiopins.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -15,6 +15,9 @@ d# 168 constant dcon-scl-gpio# d# 167 constant dcon-sda-gpio# +d# 100 constant dcon-stat0-gpio# +d# 101 constant dcon-stat1-gpio# + d# 126 constant dcon-irq-gpio# d# 142 constant dcon-load-gpio# Modified: dev/olpc/dcon/mmp2dcon.fth ============================================================================== --- dev/olpc/dcon/mmp2dcon.fth Fri Aug 17 01:27:02 2012 (r3186) +++ dev/olpc/dcon/mmp2dcon.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -18,6 +18,21 @@ " OLPC DCON panel" model : +i encode-int encode+ ; + 0 0 encode-bytes + dcon-stat0-gpio# 0 encode-gpio + dcon-stat1-gpio# 0 encode-gpio + dcon-load-gpio# 0 encode-gpio + dcon-irq-gpio# 0 encode-gpio + " gpios" property + + " stat0" encode-string + " stat1" encode-string encode+ + " load" encode-string encode+ + " irq" encode-string encode+ + " gpio-names" property + + " /dcon-i2c" encode-phandle " i2c-parent" property + decimal 0 0 encode-bytes \ xres, yres, refresh, clockhz, left, right, top, bottom, hsync, vsync, flags, widthmm, heightmm Modified: dev/olpc/mmp2camera/platform.fth ============================================================================== --- dev/olpc/mmp2camera/platform.fth Fri Aug 17 01:27:02 2012 (r3186) +++ dev/olpc/mmp2camera/platform.fth Fri Aug 17 01:27:49 2012 (r3187) @@ -4,6 +4,8 @@ headers hex +" /camera-i2c" encode-phandle " i2c-parent" property + 0 value camera-smb-slave : camera-smb-setup ( -- ) 1 to smb-dly-us

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[commit] r3186 - cpu/arm/olpc/cl4
by repository service 17 Aug '12

17 Aug '12

Author: wmb Date: Fri Aug 17 01:27:02 2012 New Revision: 3186 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3186 Log: OLPC ARM - Finished adding USB properties. Added: cpu/arm/olpc/cl4/usb.fth Modified: cpu/arm/olpc/cl4/fw.bth Modified: cpu/arm/olpc/cl4/fw.bth ============================================================================== --- cpu/arm/olpc/cl4/fw.bth Fri Aug 17 01:25:00 2012 (r3185) +++ cpu/arm/olpc/cl4/fw.bth Fri Aug 17 01:27:02 2012 (r3186) @@ -17,7 +17,7 @@ fload ${BP}/cpu/arm/olpc/cl4/uart.fth fload ${BP}/cpu/arm/olpc/cl4/sdhci.fth fload ${BP}/cpu/arm/olpc/1.75/lcdcfg.fth -fload ${BP}/cpu/arm/olpc/1.75/usb.fth +fload ${BP}/cpu/arm/olpc/cl4/usb.fth fload ${BP}/cpu/arm/olpc/nn-touchscreen.fth fload ${BP}/cpu/arm/olpc/cl4/switches.fth fload ${BP}/cpu/arm/olpc/cl4/leds.fth Added: cpu/arm/olpc/cl4/usb.fth ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ cpu/arm/olpc/cl4/usb.fth Fri Aug 17 01:27:02 2012 (r3186) @@ -0,0 +1,17 @@ +purpose: Platform-specific USB elaborations +\ See license at end of file + +dev /usb@d4208000 + \ Port 1 on the hub is connected to unused pins on the WLAN connector, + \ so testing it is confusing + \ Port 2 is right upper + \ Port 3 is left + " 3,2" " usb-hub-test-list" string-property +device-end + +: (reset-usb-hub) ( -- ) + usb-hub-reset-gpio# gpio-clr d# 10 ms usb-hub-reset-gpio# gpio-set +; +' (reset-usb-hub) to reset-usb-hub + +devalias u /usb/disk

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[commit] r3185 - cpu/arm/marvell cpu/arm/mmp2 cpu/arm/mmp3 cpu/arm/olpc cpu/arm/olpc/3.0 dev/usb2/hcd/ehci
by repository service 17 Aug '12

17 Aug '12

Author: wmb Date: Fri Aug 17 01:25:00 2012 New Revision: 3185 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3185 Log: OLPC ARM - Added USB properties. Modified: cpu/arm/marvell/utmiphy.fth cpu/arm/mmp2/ulpiphy.fth cpu/arm/mmp3/usb2phy.fth cpu/arm/olpc/3.0/usb.fth cpu/arm/olpc/usb.fth dev/usb2/hcd/ehci/ehci.fth Modified: cpu/arm/marvell/utmiphy.fth ============================================================================== --- cpu/arm/marvell/utmiphy.fth Thu Aug 16 22:17:14 2012 (r3184) +++ cpu/arm/marvell/utmiphy.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -1,6 +1,13 @@ \ See license at end of file purpose: Init UTMI USB Phy in Marvell SoC +0 0 " d4207000" " /" begin-package + +" usb2-phy" device-name + +my-address my-space h# 100 reg +" mrvl,mmp2-utmiphy" +compatible + : +utmi ( offset -- offset' ) h# 20.7000 + ; h# 04 +utmi constant utmi-ctrl @@ -36,7 +43,7 @@ h# 0000.00f0 value rx-clr \ RX_SQ_THRESH h# 0000.00a0 value rx-set \ a -: init-usb-phy ( -- ) +: init ( -- ) [ifdef] notdef ." Interacting before USB PHY init." cr ." Change pll-set, tx-set, rx-set as desired then type 'resume'" cr @@ -83,3 +90,8 @@ ; : enable-ulpi-phy ( -- ) h# 100 utmi-ctl1 io-set ; : select-ulpi-data ( -- ) h# 200 utmi-ctl1 io-set ; + +: open ( -- true ) true ; +: close ; + +end-package Modified: cpu/arm/mmp2/ulpiphy.fth ============================================================================== --- cpu/arm/mmp2/ulpiphy.fth Thu Aug 16 22:17:14 2012 (r3184) +++ cpu/arm/mmp2/ulpiphy.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -1,6 +1,10 @@ \ See license at end of file purpose: Access to miscellaneous control/enable registers for the ULPI PHY portion of the USB SPH controller +0 0 " d4207000" " /" begin-package + +" mrvl,mmp2-ulpiphy" +compatible + h# 3800 io2-va + constant usbsph-misc-va : usbsph-misc@ ( -- n ) usbsph-misc-va 4 + l@ ; : usbsph-misc! ( n -- ) usbsph-misc-va 4 + l! ; @@ -13,6 +17,17 @@ : ulpi-clock-on ( -- ) usbsph-ctrl@ 1 or usbsph-ctrl! ; : ulpi-clock-select ( -- ) usbsph-ctrl@ h# 400 or usbsph-ctrl! ; +: init ( -- ) + ulpi-clock-on + ulpi-clock-select + ulpi-on +; + +: open ( -- true ) true ; +: close ; + +end-package + \ LICENSE_BEGIN \ Copyright (c) 2011 FirmWorks \ Modified: cpu/arm/mmp3/usb2phy.fth ============================================================================== --- cpu/arm/mmp3/usb2phy.fth Thu Aug 16 22:17:14 2012 (r3184) +++ cpu/arm/mmp3/usb2phy.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -1,6 +1,13 @@ \ See license at end of file purpose: Init USB2 Phy in Marvell SoC +0 0 " d4207000" " /" begin-package + +" usb2-phy" device-name + +my-address my-space h# 100 reg +" mrvl,mmp3-usb2phy" +compatible + : +usb2 ( offset -- offset' ) h# 20.7000 + ; h# 04 +usb2 constant pll-reg0 @@ -36,7 +43,7 @@ ." PLL calibrate timeout" cr ; -: init-usb-phy ( -- ) +: init ( -- ) h# f00 h# 100 +pmua io-clr \ h# d00 h# 100 +pmua io-set \ Select 26 MHz VCXO clock h# 000 h# 100 +pmua io-set \ Select crystal @@ -85,3 +92,8 @@ d# 100 wait-cal ; + +: open ( -- true ) true ; +: close ; + +end-package Modified: cpu/arm/olpc/3.0/usb.fth ============================================================================== --- cpu/arm/olpc/3.0/usb.fth Thu Aug 16 22:17:14 2012 (r3184) +++ cpu/arm/olpc/3.0/usb.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -17,6 +17,16 @@ my-space swap " map-in" $call-parent h# 100 + ( adr ) ; : my-map-out ( adr len -- ) swap h# 100 - swap " map-out" $call-parent ; + " /pmua" encode-phandle d# 18 encode-int encode+ " clocks" property + d# 34 " interrupts" integer-property + + " mrvl,mmp3-fsic" +compatible + + " host" " dr_mode" string-property + " ulpi" " phy_type" string_property + + " /usb-phy" encode-phandle " transceiver" property + false constant has-dbgp-regs? false constant needs-dummy-qh? : grab-controller ( config-adr -- error? ) drop false ; @@ -42,9 +52,7 @@ : (reset-usb-hub) ( -- ) d# 146 gpio-clr d# 10 ms d# 146 gpio-set \ Resets ULPI hub - ulpi-clock-on - ulpi-clock-select - ulpi-on + " /usb2-phy" " init" execute-device-method ; ' (reset-usb-hub) to reset-usb-hub Modified: cpu/arm/olpc/usb.fth ============================================================================== --- cpu/arm/olpc/usb.fth Thu Aug 16 22:17:14 2012 (r3184) +++ cpu/arm/olpc/usb.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -11,6 +11,14 @@ " /pmua" encode-phandle 5 encode-int encode+ " clocks" property d# 44 " interrupts" integer-property + " mrvl,pxa-u2oehci" +compatible + " mrvl,mmp3-u2oehci" +compatible + + " host" " dr_mode" string-property + " utmi" " phy_type" string-property + + " /usb2-phy" encode-phandle " transceiver" property + false constant has-dbgp-regs? false constant needs-dummy-qh? : grab-controller ( config-adr -- error? ) drop false ; @@ -29,7 +37,7 @@ : init-usb ( -- ) h# 9 h# 5c pmua! \ Enable clock to USB block reset-usb-hub - init-usb-phy + " /usb2-phy" " init" execute-device-method drop ; stand-init: Init USB Phy Modified: dev/usb2/hcd/ehci/ehci.fth ============================================================================== --- dev/usb2/hcd/ehci/ehci.fth Thu Aug 16 22:17:14 2012 (r3184) +++ dev/usb2/hcd/ehci/ehci.fth Fri Aug 17 01:25:00 2012 (r3185) @@ -3,6 +3,8 @@ " ehci" encode-string " device_type" property +" usb-ehci" +compatible + hex headers

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[commit] r3184 - cpu/arm/olpc/cl4
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 22:17:14 2012 New Revision: 3184 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3184 Log: OLPC XO-4 - Cope with inverted write protect on external SD. Modified: cpu/arm/olpc/cl4/sdhci.fth Modified: cpu/arm/olpc/cl4/sdhci.fth ============================================================================== --- cpu/arm/olpc/cl4/sdhci.fth Thu Aug 16 22:15:40 2012 (r3183) +++ cpu/arm/olpc/cl4/sdhci.fth Thu Aug 16 22:17:14 2012 (r3184) @@ -14,6 +14,10 @@ \ Active low " /gpio" encode-phandle d# 31 encode-int encode+ 1 encode-int encode+ " cd-gpios" property + \ MMP3 + 0 0 " wp-inverted" property + : write-protected? ( -- flag ) write-protected? 0= ; + new-device fload ${BP}/dev/mmc/sdhci/sdmmc.fth fload ${BP}/dev/mmc/sdhci/selftest.fth

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[commit] r3183 - in cpu/arm: mmp2 mmp3/thunderstone olpc olpc/1.75
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 22:15:40 2012 New Revision: 3183 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3183 Log: OLPC ARM - Change all uses of I2C addresses for TWSI-connected devices to use the unshifted address form. Modified: cpu/arm/mmp2/boardtwsi.fth cpu/arm/mmp2/dsi.fth cpu/arm/mmp2/twsi.fth cpu/arm/mmp3/thunderstone/boardtwsi.fth cpu/arm/olpc/1.75/compass.fth cpu/arm/olpc/accelerometer.fth cpu/arm/olpc/nn-touchscreen.fth cpu/arm/olpc/rtc.fth cpu/arm/olpc/sound.fth Modified: cpu/arm/mmp2/boardtwsi.fth ============================================================================== --- cpu/arm/mmp2/boardtwsi.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/mmp2/boardtwsi.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -8,7 +8,7 @@ \ 5 TC358762 MIPI bridge 16, TM-1210 or TM1414 touchscreen 40 \ 6 HDMI DDC EDID a0 -: select-touch-panel ( -- ) h# 40 5 set-twsi-target ; +: select-touch-panel ( -- ) h# 20 5 set-twsi-target ; : touch-panel-type ( -- n ) select-touch-panel h# bd twsi-b@ ; : get-tm1414-data ( -- x y finger-mask ) select-touch-panel ( ) @@ -29,7 +29,7 @@ ; : compass@ ( -- x y z temp id ) - h# 3c 4 set-twsi-target + h# 1e 4 set-twsi-target 0 0 twsi-b! \ Config register A h# 50 1 twsi-b! \ Config register B 0 2 twsi-b! \ Mode register @@ -40,7 +40,7 @@ h# a twsi-b@ 9 twsi-b@ bwjoin ( x y z temp id ) ; -: select-pmic ( -- ) h# 78 1 set-twsi-target ; +: select-pmic ( -- ) h# 3c 1 set-twsi-target ; : accel-power-on ( -- ) \ LDO8 - vout is 36, ctl is 34 select-pmic @@ -52,7 +52,7 @@ h# 1e h# 34 twsi-b! ; : accel@ ( -- x y z temp id ) - h# 70 4 set-twsi-target + h# 38 4 set-twsi-target 2 twsi-b@ 6 rshift ( x-low ) 3 twsi-b@ 2 lshift or ( x ) @@ -67,24 +67,24 @@ ; : init-pals ( -- ) - h# b0 4 set-twsi-target \ Set PS parameters address + h# 58 4 set-twsi-target \ Set PS parameters address 0 1 twsi-out \ clear interrupt settings - h# 22 4 set-twsi-target \ Device init address + h# 11 4 set-twsi-target \ Device init address h# 10 1 twsi-out \ Init device - h# 20 4 set-twsi-target \ Ambient Light Sensor address + h# 10 4 set-twsi-target \ Ambient Light Sensor address 2 1 twsi-out \ Enable ALS in most sensitive mode, 16-bit data ; : als@ ( -- n ) - h# 22 4 set-twsi-target \ Ambient Light Sensor LSB address + h# 11 4 set-twsi-target \ Ambient Light Sensor LSB address 0 1 twsi-get ( low ) - h# 20 4 set-twsi-target \ Ambient Light Sensor MSB address + h# 10 4 set-twsi-target \ Ambient Light Sensor MSB address 0 1 twsi-get bwjoin ( n ) ; : proximity@ ( -- byte ) - h# b0 4 set-twsi-target \ Proximity Sensor address + h# 58 4 set-twsi-target \ Proximity Sensor address 0 1 twsi-get ( byte ) ; @@ -128,7 +128,7 @@ ; : twsi-bcd@ ( reg# -- binary ) twsi-b@ bcd> ; : get-rtc ( -- ) - h# d0 1 set-twsi-target + h# 68 1 set-twsi-target \ 3 twsi-b@ ( dow ) \ @@ -142,7 +142,7 @@ ; : core-voltage! ( mv -- ) - h# c0 1 set-twsi-target \ MAX8649 power management IC + h# 60 1 set-twsi-target \ MAX8649 power management IC d# 750 umax d# 1350 umin \ Clipped voltage d# 750 - d# 10 / ( offset-in-mv/10 ) @@ -150,7 +150,7 @@ 2 twsi-b! ; : core-voltage@ ( -- mv ) - h# c0 1 set-twsi-target \ MAX8649 power management IC + h# 60 1 set-twsi-target \ MAX8649 power management IC 2 twsi-b@ ( code ) h# 7f and ( offset-mv/10 ) d# 10 * ( offset-mv ) Modified: cpu/arm/mmp2/dsi.fth ============================================================================== --- cpu/arm/mmp2/dsi.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/mmp2/dsi.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -45,7 +45,7 @@ 2 ms d# 83 gpio-clr 1 ms d# 83 gpio-set 1 ms \ LCD_RST_N line resets DSI bridge - h# 16 5 set-twsi-target \ TWSI address of TC358762 MIPI DSI bridge + h# 0b 5 set-twsi-target \ TWSI address of TC358762 MIPI DSI bridge \ Data Reg#....... 0 h# 047c dsi-twsi! \ Turn off sleep mode 2 ms @@ -142,7 +142,7 @@ : .dsi ( index -- ) dup 3 u.r space dsi-twsi@ 8 u.r cr ; : .dsiw ( index -- ) dup 3 u.r space dsi-twsi-w@ 8 u.r cr ; : dump-dsi ( -- ) - 16 5 set-twsi-target + 0b 5 set-twsi-target 47c .dsi 210 .dsi 470 .dsi Modified: cpu/arm/mmp2/twsi.fth ============================================================================== --- cpu/arm/mmp2/twsi.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/mmp2/twsi.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -42,7 +42,7 @@ ; : set-twsi-target ( slave channel -- ) \ Channel numbers range from 1 to 6 set-twsi-channel - to slave-address + 2* to slave-address ; \ Bit defines @@ -195,7 +195,7 @@ h# d4034000 d# 31 4 true true 1 make-twsi-node \ TWSI6 -0 0 " 34" " /i2c@d4011000" begin-package \ TWSI1 +0 0 " 1a" " /i2c@d4011000" begin-package \ TWSI1 " audio-codec" name " realtek,alc5631" +compatible " realtek,rt5631" +compatible Modified: cpu/arm/mmp3/thunderstone/boardtwsi.fth ============================================================================== --- cpu/arm/mmp3/thunderstone/boardtwsi.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/mmp3/thunderstone/boardtwsi.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -8,7 +8,7 @@ \ 5 TC358762 MIPI bridge 16, TM-1210 or TM1414 touchscreen 40 \ 6 HDMI DDC EDID a0 -: select-touch-panel ( -- ) h# 40 5 set-twsi-target ; +: select-touch-panel ( -- ) h# 20 5 set-twsi-target ; : touch-panel-type ( -- n ) select-touch-panel h# bd twsi-b@ ; : get-tm1414-data ( -- x y finger-mask ) select-touch-panel ( ) @@ -29,7 +29,7 @@ ; : compass@ ( -- x y z temp id ) - h# 3c 4 set-twsi-target + h# 1e 4 set-twsi-target 0 0 twsi-b! \ Config register A h# 50 1 twsi-b! \ Config register B 0 2 twsi-b! \ Mode register @@ -40,7 +40,7 @@ h# a twsi-b@ 9 twsi-b@ bwjoin ( x y z temp id ) ; -: select-pmic ( -- ) h# 78 1 set-twsi-target ; +: select-pmic ( -- ) h# 3c 1 set-twsi-target ; : accel-power-on ( -- ) \ LDO8 - vout is 36, ctl is 34 select-pmic @@ -52,7 +52,7 @@ h# 1e h# 34 twsi-b! ; : accel@ ( -- x y z temp id ) - h# 70 4 set-twsi-target + h# 38 4 set-twsi-target 2 twsi-b@ 6 rshift ( x-low ) 3 twsi-b@ 2 lshift or ( x ) @@ -67,24 +67,24 @@ ; : init-pals ( -- ) - h# b0 4 set-twsi-target \ Set PS parameters address + h# 58 4 set-twsi-target \ Set PS parameters address 0 1 twsi-out \ clear interrupt settings - h# 22 4 set-twsi-target \ Device init address + h# 11 4 set-twsi-target \ Device init address h# 10 1 twsi-out \ Init device - h# 20 4 set-twsi-target \ Ambient Light Sensor address + h# 10 4 set-twsi-target \ Ambient Light Sensor address 2 1 twsi-out \ Enable ALS in most sensitive mode, 16-bit data ; : als@ ( -- n ) - h# 22 4 set-twsi-target \ Ambient Light Sensor LSB address + h# 11 4 set-twsi-target \ Ambient Light Sensor LSB address 0 1 twsi-get ( low ) - h# 20 4 set-twsi-target \ Ambient Light Sensor MSB address + h# 10 4 set-twsi-target \ Ambient Light Sensor MSB address 0 1 twsi-get bwjoin ( n ) ; : proximity@ ( -- byte ) - h# b0 4 set-twsi-target \ Proximity Sensor address + h# 58 4 set-twsi-target \ Proximity Sensor address 0 1 twsi-get ( byte ) ; @@ -128,7 +128,7 @@ ; : twsi-bcd@ ( reg# -- binary ) twsi-b@ bcd> ; : get-rtc ( -- ) - h# d0 1 set-twsi-target + h# 68 1 set-twsi-target \ 3 twsi-b@ ( dow ) \ @@ -142,7 +142,7 @@ ; : core-voltage! ( mv -- ) - h# c0 1 set-twsi-target \ MAX8649 power management IC + h# 60 1 set-twsi-target \ MAX8649 power management IC d# 750 umax d# 1350 umin \ Clipped voltage d# 750 - d# 10 / ( offset-in-mv/10 ) @@ -150,7 +150,7 @@ 2 twsi-b! ; : core-voltage@ ( -- mv ) - h# c0 1 set-twsi-target \ MAX8649 power management IC + h# 60 1 set-twsi-target \ MAX8649 power management IC 2 twsi-b@ ( code ) h# 7f and ( offset-mv/10 ) d# 10 * ( offset-mv ) Modified: cpu/arm/olpc/1.75/compass.fth ============================================================================== --- cpu/arm/olpc/1.75/compass.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/olpc/1.75/compass.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -4,7 +4,7 @@ : set-compass-slave ( -- ) compass-scl-gpio# to smb-clock-gpio# compass-sda-gpio# to smb-data-gpio# - h# 3c to smb-slave + h# 1e to smb-slave smb-data-gpio# gpio-dir-out ; : smb-init ( -- ) set-compass-slave smb-on smb-pulses ; @@ -35,11 +35,11 @@ 0 0 " " " /" begin-package " combo-accelerometer" name -\ : set-sensor-slave ( -- ) h# 30 6 set-twsi-target ; +\ : set-sensor-slave ( -- ) h# 18 6 set-twsi-target ; : set-sensor-slave ( -- ) 4 to smb-clock-gpio# 5 to smb-data-gpio# - h# 30 to smb-slave + h# 18 to smb-slave smb-data-gpio# gpio-dir-out ; Modified: cpu/arm/olpc/accelerometer.fth ============================================================================== --- cpu/arm/olpc/accelerometer.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/olpc/accelerometer.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -2,6 +2,7 @@ 0 0 " " " /twsi" begin-package " accelerometer" name +\ reg is set dynamically by probing to find which chip is present \ my-address my-space encode-phys " reg" property \ This is for the stand-alone accelerometers LIS3DHTR and LIS33DETR @@ -149,7 +150,7 @@ d# 400,000 to bus-speed d# 50 to min-x d# 50 to min-y d# 50 to min-z d# 150 to max-x d# 150 to max-y d# 450 to max-z - h# 32 6 encode-phys " reg" property + h# 19 6 encode-phys " reg" property ['] lis3dhtr-selftest to lis-selftest else accelerometer-off @@ -158,7 +159,7 @@ d# 25,000 to bus-speed d# 20 to min-x d# 20 to min-y d# 20 to min-z d# 400 to max-x d# 400 to max-y d# 400 to max-z - h# 3a 6 encode-phys " reg" property + h# 1d 6 encode-phys " reg" property ['] lis33de-selftest to lis-selftest then ; Modified: cpu/arm/olpc/nn-touchscreen.fth ============================================================================== --- cpu/arm/olpc/nn-touchscreen.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/olpc/nn-touchscreen.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -1,7 +1,7 @@ \ See license at end of file purpose: Driver and diagnostic for Neonode zForce MultiSensing I2C Touchscreen -0 0 " 4,a0" " /twsi" begin-package +0 0 " 4,50" " /twsi" begin-package my-space encode-int my-address encode-int encode+ " reg" property \ XXX these are really platform-related, not touchscreen-related Modified: cpu/arm/olpc/rtc.fth ============================================================================== --- cpu/arm/olpc/rtc.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/olpc/rtc.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -22,7 +22,7 @@ : rtc@ ( reg# -- byte ) set-address smb-byte@ ; : rtc! ( byte reg# -- ) set-address smb-byte! ; [else] -: set-address ( -- ) h# d0 2 set-twsi-target ; +: set-address ( -- ) h# 68 2 set-twsi-target ; : rtc@ ( reg# -- byte ) set-address twsi-b@ ; : rtc! ( byte reg# -- ) set-address twsi-b! ; [then] Modified: cpu/arm/olpc/sound.fth ============================================================================== --- cpu/arm/olpc/sound.fth Thu Aug 16 04:19:35 2012 (r3182) +++ cpu/arm/olpc/sound.fth Thu Aug 16 22:15:40 2012 (r3183) @@ -264,9 +264,9 @@ ; [ifdef] cl2-a1 -: choose-smbus ( -- ) h# 30 1 set-twsi-target ; +: choose-smbus ( -- ) h# 18 1 set-twsi-target ; [else] -: choose-smbus ( -- ) h# 34 1 set-twsi-target ; +: choose-smbus ( -- ) h# 1a 1 set-twsi-target ; [then] \ Reset is unconnected on current boards

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[commit] r3182 - cpu/arm/olpc/cl4
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 04:19:35 2012 New Revision: 3182 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3182 Log: Q7A04 Modified: cpu/arm/olpc/cl4/fw-version.fth Modified: cpu/arm/olpc/cl4/fw-version.fth ============================================================================== --- cpu/arm/olpc/cl4/fw-version.fth Thu Aug 16 04:16:12 2012 (r3181) +++ cpu/arm/olpc/cl4/fw-version.fth Thu Aug 16 04:19:35 2012 (r3182) @@ -1,7 +1,7 @@ \ The overall firmware revision macro: FW_PREFIX Q7 macro: FW_MAJOR A -macro: FW_MINOR 03 +macro: FW_MINOR 04 \ Create a 2-character build/fw-suffix file to personalize your test builds " fw-suffix" $file-exists? [if]

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[commit] r3181 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 04:16:12 2012 New Revision: 3181 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3181 Log: OLPC ARM - Tweaks to the last EDI checkin so that EDI operations are always bracketed exactly the same way, with use-edi-spi ... use-ssp-spi Modified: cpu/arm/olpc/build-fw.fth cpu/arm/olpc/ecflash.fth Modified: cpu/arm/olpc/build-fw.fth ============================================================================== --- cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:14 2012 (r3180) +++ cpu/arm/olpc/build-fw.fth Thu Aug 16 04:16:12 2012 (r3181) @@ -195,13 +195,14 @@ fload ${BP}/cpu/arm/olpc/ecflash.fth : ec-spi-reprogrammed ( -- ) - edi-spi-start + use-edi-spi spi-start set-ec-reboot unreset-8051 + use-ssp-spi ; : ignore-power-button ( -- ) - edi-spi-start + use-edi-spi edi-open-active ['] reset-8051 catch if ['] reset-8051 catch if ." Write Protected EC" cr then Modified: cpu/arm/olpc/ecflash.fth ============================================================================== --- cpu/arm/olpc/ecflash.fth Thu Aug 16 04:01:14 2012 (r3180) +++ cpu/arm/olpc/ecflash.fth Thu Aug 16 04:16:12 2012 (r3181) @@ -66,6 +66,7 @@ ." Restarting EC and rebooting" cr set-ec-reboot unreset-8051 + use-ssp-spi [then] ec-power-cycle ; @@ -79,6 +80,7 @@ [else] use-edi-spi edi-open flash-buf /ec-flash 0 edi-read-flash + use-ssp-spi [then] ; : save-ec-flash ( "name" -- )

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[commit] r3180 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: rsmith Date: Thu Aug 16 04:01:14 2012 New Revision: 3180 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3180 Log: OLPC ARM - Refactor EDI start procedure Reboot after reflash did not work because the EC chip ID (io3731 vs io3790) was not set in the series of calls that the OFW flash makes. Refactor the EDI startup so that there is a common EDI enable routine for other words to call. Modified: cpu/arm/olpc/build-fw.fth cpu/arm/olpc/edi.fth Modified: cpu/arm/olpc/build-fw.fth ============================================================================== --- cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:07 2012 (r3179) +++ cpu/arm/olpc/build-fw.fth Thu Aug 16 04:01:14 2012 (r3180) @@ -202,6 +202,7 @@ : ignore-power-button ( -- ) edi-spi-start + edi-open-active ['] reset-8051 catch if ['] reset-8051 catch if ." Write Protected EC" cr then then Modified: cpu/arm/olpc/edi.fth ============================================================================== --- cpu/arm/olpc/edi.fth Thu Aug 16 04:01:07 2012 (r3179) +++ cpu/arm/olpc/edi.fth Thu Aug 16 04:01:14 2012 (r3180) @@ -335,23 +335,23 @@ ecsts edi-b! ( ) then ; - -\ Does a dummy ready and throws away the result. -\ required to get the EDI interface enabled -: edi-start ( -- ) - h# ff22 ['] edi-b@ catch if noop else drop then -; - -: edi-open ( -- ) - \ slow-edi-clock \ Target speed between 1 and 2 MHz +\ This is used to start EDI from routines where you do not want to +\ put the EC into reset. ie the mfg tag reading routines +: edi-open-active ( -- ) spi-start - edi-start + \ Does a dummy ready and throws away the result. + \ required to get the EDI interface enabled + h# ff22 ['] edi-b@ catch if noop else drop then set-chip-id - \ The first operation often fails so retry it - ['] select-flash catch if select-flash then + select-flash +; +\ Full EDI startup sequece. Used when you want to reprogram the EC. +: edi-open ( -- ) + edi-open-active + reset-8051 kb9010? if @@ -360,14 +360,7 @@ else trim-tune then - \ fast-edi-clock \ Target speed up to 16 MHz - \ reset ; -: edi-open-active ( -- ) - spi-start - ['] select-flash catch if select-flash then -; - \ LICENSE_BEGIN \ Copyright (c) 2011 FirmWorks \

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[commit] r3179 - cpu/arm/olpc dev/olpc/dcon
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 04:01:07 2012 New Revision: 3179 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3179 Log: OLPC ARM - Added properties to display and DCON device nodes for the benefit of the Linux pxa168fb.c driver. Modified: cpu/arm/olpc/lcd.fth dev/olpc/dcon/mmp2dcon.fth Modified: cpu/arm/olpc/lcd.fth ============================================================================== --- cpu/arm/olpc/lcd.fth Thu Aug 16 02:25:33 2012 (r3178) +++ cpu/arm/olpc/lcd.fth Thu Aug 16 04:01:07 2012 (r3179) @@ -5,6 +5,9 @@ " display" name my-address my-space h# 1000 reg + " mrvl,pxa168fb" +compatible + + " LCDCLK" " clock-names" string-property " /pmua" encode-phandle 1 encode-int encode+ " clocks" property d# 41 " interrupts" integer-property Modified: dev/olpc/dcon/mmp2dcon.fth ============================================================================== --- dev/olpc/dcon/mmp2dcon.fth Thu Aug 16 02:25:33 2012 (r3178) +++ dev/olpc/dcon/mmp2dcon.fth Thu Aug 16 04:01:07 2012 (r3179) @@ -10,14 +10,30 @@ previous definitions new-device -" dcon" device-name -" olpc,xo1-dcon" +compatible -" olpc,xo1.75-dcon" +compatible + " dcon" device-name + " mrvl,dumb-panel" +compatible + " olpc,xo1-dcon" +compatible + " olpc,xo1.75-dcon" +compatible + + " OLPC DCON panel" model + : +i encode-int encode+ ; + + decimal + 0 0 encode-bytes + \ xres, yres, refresh, clockhz, left, right, top, bottom, hsync, vsync, flags, widthmm, heightmm + 1200 +i 900 +i 50 +i 56,930,000 +i 24 +i 26 +i 5 +i 4 +i 6 +i 3 +i 0 +i 152 +i 115 +i + hex + " linux,timing-modes" property + + " 1200x900@50" " linux,mode-names" string-property + + h# 2000000d " lcd-dumb-ctrl-regval" integer-property + h# 08001100 " lcd-pn-ctrl0-regval" integer-property finish-device stand-init: has-dcon-ram? 0= if - " /dcon? find-device + " /dcon" find-device 0 0 " no-freeze" property device-end then

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[commit] r3178 - cpu/arm/olpc
by repository service 16 Aug '12

16 Aug '12

Author: wmb Date: Thu Aug 16 02:25:33 2012 New Revision: 3178 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3178 Log: OLPC ARM - Deleted dead code from bbedi.fth Modified: cpu/arm/olpc/bbedi.fth Modified: cpu/arm/olpc/bbedi.fth ============================================================================== --- cpu/arm/olpc/bbedi.fth Wed Aug 15 20:03:54 2012 (r3177) +++ cpu/arm/olpc/bbedi.fth Thu Aug 16 02:25:33 2012 (r3178) @@ -7,97 +7,7 @@ : edi-clk-lo ( -- ) ec-edi-clk-gpio# gpio-clr ; : edi-clk-hi ( -- ) ec-edi-clk-gpio# gpio-set ; -0 [if] -\ All this timing stuff is pointless because the GPIOs are so slow -\ that the problem is to make the clock go fast enough to satisfy -\ the initial connection speed requirement. - -\ We need to run at between 1 and 2 MHz for the initial connection, -\ and then we can go faster, up to 16 Mhz. -\ The half-cycle period for 1-2 MHz is between 250 ns and 500 ns. -\ Timer0 runs at 6.5 MHz so each tick is about 150 ns. -\ Two ticks is 300 ns, three is 450 ns. -code spins ( count -- ) - cmp tos,#0 - <> if - begin - subs tos,tos,#1 - 0= until - then - pop tos,sp -c; - -d# 150 value edi-dly-spins -: edi-dly ( -- ) edi-dly-spins spins ; - -\ CPU clock is 800 Mhz, so 1.25 ns/clock -\ spins is 2 clocks/spin, so 2.5 ns/spin -\ Slow clock must be between 1 and 2 MHz, so period is between 1000 and 500 ns. -\ edi-dly is a half cycle, so edi-dly for slow clock is between 500 and 250 ns. -\ So we need between 200 and 100 spins for slow edi-dly -\ Fast clock can be up to 16 Mhz, so full-cycle period of 62.5 ns, half-cycle -\ period of >= 31.25 ns, so >= 12.5 spins at 2.5. ns/spin. - -: slow-edi-clock ( -- ) d# 150 to edi-dly-spins ; -: fast-edi-clock ( -- ) d# 13 to edi-dly-spins ; - -code edi-bit! ( flag -- ) - mov r0,#0x200 - set r1,`h# 19100 +io #` - cmp tos,#0 - streq r0,[r1,#0x24] \ Clr MOSI if flag is 0 - strne r0,[r1,#0x18] \ Set MOSI if flag is non0 - mov r0,#0x400 - str r0,[r1,#0x18] \ Set CLK - str r0,[r1,#0x24] \ Clr CLK - pop tos,sp -c; - -[ifndef] edi-bit! -: edi-bit! ( flag -- ) - ec-edi-mosi-gpio# swap if gpio-set else gpio-clr then - edi-clk-hi - edi-dly - edi-clk-lo - edi-dly -; -[then] - -[ifndef] edi-bit! -: edi-bit! ( flag -- ) - if - [ ec-edi-mosi-gpio# >gpio-pin h# 18 + ] dliteral io! \ Fast gpio-set - else - [ ec-edi-mosi-gpio# >gpio-pin h# 24 + ] dliteral io! \ Fast gpio-clr - then - [ ec-edi-clk-gpio# >gpio-pin h# 18 + ] dliteral io! \ Fast gpio-set -\ edi-dly - [ ec-edi-clk-gpio# >gpio-pin h# 24 + ] dliteral io! \ Fast gpio-set -\ edi-dly -; -[then] - -: edi-out ( b -- ) - 8 0 do ( b ) - dup h# 80 and edi-bit! ( b ) - 2* ( b' ) - loop ( b ) - drop ( ) -; -: edi-bit@ ( -- flag ) - edi-clk-hi - edi-dly - ec-edi-miso-gpio# gpio-pin@ - edi-clk-lo - edi-dly -; -: edi-in-h ( b -- ) - 0 ( b ) - 8 0 do ( b ) - 2* edi-bit@ 1 and or ( b' ) - loop ( b ) -; -[else] +\ This must be done in code to satisfy the stringent timing requirements of the EDI hardware code edi-out ( byte -- ) mov r2,#8 mov r0,#0x200 \ MOSI mask @@ -125,27 +35,6 @@ pop tos,sp c; -code edi-out1 ( byte -- ) - mov r2,#8 - mov r0,#0x200 \ MOSI mask - set r1,`h# 19100 +io #` \ GPIO register address - mov r4,#0x400 \ CLK mask - mov r5,#0x600 \ CLK and MOSI mask - begin - ands r3,tos,#0x80 \ Test bit - - strne r5,[r1,#0x18] \ Set MOSI and CLK in the same operation if bit is non0 - streq r0,[r1,#0x24] \ Clr MOSI - streq r4,[r1,#0x18] \ Set CLK - - str r4,[r1,#0x24] \ Clr CLK - - add tos,tos,tos \ Left shift TOS - decs r2,1 - 0= until - - pop tos,sp -c; code edi-in ( -- byte ) psh tos,sp mov tos,#0 \ Initial byte value @@ -180,9 +69,6 @@ 0= until c; -[then] - - : edi-spi-start ( -- ) ['] edi-in to spi-in ['] edi-out to spi-out

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openfirmware August 2012