openfirmware January 2011

openfirmware@openfirmware.info

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[commit] r2149 - forth/wrapper/zip
by repository service 25 Jan '11

25 Jan '11

Author: wmb Date: Tue Jan 25 09:55:42 2011 New Revision: 2149 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2149 Log: Reverted change to inflate.c introduced by r2097. Without the "section text_inflate" attribute on the inflate() function, the GCC optimizer moves code so that huft_build() appears first in the file. OFW expects inflate() to be at the beginning of the image. Modified: forth/wrapper/zip/inflate.c Modified: forth/wrapper/zip/inflate.c ============================================================================== --- forth/wrapper/zip/inflate.c Tue Jan 25 04:07:13 2011 (r2148) +++ forth/wrapper/zip/inflate.c Tue Jan 25 09:55:42 2011 (r2149) @@ -165,7 +165,7 @@ * Return size of clear. */ int -inflate(struct workspace *wsptr, int nohdr, u_char* clear, u_char *compr); +inflate(struct workspace *wsptr, int nohdr, u_char* clear, u_char *compr) __attribute__((section ("text_inflate"))); int inflate(struct workspace *wsptr, int nohdr, u_char* clear, u_char *compr)

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[commit] r2148 - cpu/arm/olpc/1.75
by repository service 25 Jan '11

25 Jan '11

Author: quozl Date: Tue Jan 25 04:07:13 2011 New Revision: 2148 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2148 Log: OLPC XO-1.75 A2 - use new machine signature CL2 for next release http://dev.laptop.org/ticket/10616 Modified: cpu/arm/olpc/1.75/olpc.bth Modified: cpu/arm/olpc/1.75/olpc.bth ============================================================================== --- cpu/arm/olpc/1.75/olpc.bth Mon Jan 24 23:45:17 2011 (r2147) +++ cpu/arm/olpc/1.75/olpc.bth Tue Jan 25 04:07:13 2011 (r2148) @@ -182,7 +182,7 @@ /rom h# 40 - ofd @ fseek h# 10 buffer: signature signature h# 10 blank -" CL1" signature swap move +" CL2" signature swap move " ${FW_VERSION}" expand$ signature 6 + swap move " Q4${FW_MAJOR}" expand$ signature d# 13 + swap move signature h# 10 ofd @ fputs

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[commit] r2147 - cpu/arm/olpc/1.75
by repository service 24 Jan '11

24 Jan '11

Author: wmb Date: Mon Jan 24 23:45:17 2011 New Revision: 2147 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2147 Log: OLPC XO-1.75 - RTC is now working on A2. Modified: cpu/arm/olpc/1.75/rtc.fth Modified: cpu/arm/olpc/1.75/rtc.fth ============================================================================== --- cpu/arm/olpc/1.75/rtc.fth Mon Jan 24 23:44:23 2011 (r2146) +++ cpu/arm/olpc/1.75/rtc.fth Mon Jan 24 23:45:17 2011 (r2147) @@ -1,18 +1,19 @@ 0 0 " " " /" begin-package " rtc" name -: set-address ( -- ) [ifdef] cl2-a1 +: set-address ( -- ) d# 97 to smb-clock-gpio# d# 98 to smb-data-gpio# -[else] - d# 53 to smb-clock-gpio# - d# 54 to smb-data-gpio# -[then] h# d0 to smb-slave ; : rtc@ ( reg# -- byte ) set-address smb-byte@ ; : rtc! ( byte reg# -- ) set-address smb-byte! ; +[else] +: set-address ( -- ) h# d0 2 set-twsi-target ; +: rtc@ ( reg# -- byte ) set-address twsi-b@ ; +: rtc! ( byte reg# -- ) set-address twsi-b! ; +[then] headerless @@ -30,7 +31,11 @@ : >bcd ( binary -- bcd ) d# 10 /mod 4 << + ; : bcd-time&date ( -- s m h d m y century ) +[ifdef] cl2-a1 7 0 smb-read-n ( s m h dow d m y ) +[else] + 0 1 7 twsi-get ( s m h dow d m y ) +[then] 3 roll drop ( s m h dow d m y ) d# 20 ;

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[commit] r2146 - cpu/arm/olpc/1.75
by repository service 24 Jan '11

24 Jan '11

Author: wmb Date: Mon Jan 24 23:44:23 2011 New Revision: 2146 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2146 Log: OLPC XO-1.75 - flash-ec is now working on A2. Modified: cpu/arm/olpc/1.75/devices.fth cpu/arm/olpc/1.75/ecflash.fth cpu/arm/olpc/1.75/edi.fth Modified: cpu/arm/olpc/1.75/devices.fth ============================================================================== --- cpu/arm/olpc/1.75/devices.fth Fri Jan 21 23:19:08 2011 (r2145) +++ cpu/arm/olpc/1.75/devices.fth Mon Jan 24 23:44:23 2011 (r2146) @@ -143,6 +143,9 @@ : ofw-fw-filename$ " disk:\boot\olpc.rom" ; ' ofw-fw-filename$ to fw-filename$ +fload ${BP}/cpu/arm/olpc/1.75/bbedi.fth +fload ${BP}/cpu/arm/olpc/1.75/edi.fth + fload ${BP}/cpu/arm/olpc/1.75/ecflash.fth 0 0 " d420b000" " /" begin-package @@ -308,9 +311,6 @@ fload ${BP}/cpu/arm/olpc/1.75/accelerometer.fth fload ${BP}/cpu/arm/olpc/1.75/compass.fth -fload ${BP}/cpu/arm/olpc/1.75/bbedi.fth -fload ${BP}/cpu/arm/olpc/1.75/edi.fth - warning @ warning off : stand-init stand-init Modified: cpu/arm/olpc/1.75/ecflash.fth ============================================================================== --- cpu/arm/olpc/1.75/ecflash.fth Fri Jan 21 23:19:08 2011 (r2145) +++ cpu/arm/olpc/1.75/ecflash.fth Mon Jan 24 23:44:23 2011 (r2146) @@ -1,14 +1,19 @@ \ See license at end of file purpose: Reflash the EC code -h# 10000 value /ec-flash +[ifdef] cl2-a1 +h# 10000 value /ec-flash char 3 value expected-ec-version +[else] +h# 8000 value /ec-flash +char 4 value expected-ec-version +[then] : check-signature ( adr -- ) - h# ff00 + ( adr' ) + /ec-flash + h# 100 - ( adr' ) dup " XO-EC" comp abort" Bad signature in EC image" ( adr ) - dup ." EC firmware verison: " cscount type cr ( adr ) + dup ." EC firmware version: " cscount type cr ( adr ) dup 6 + c@ expected-ec-version <> abort" Wrong EC version" ( adr ) drop ; @@ -31,20 +36,38 @@ ; : flash-ec ( "filename" -- ) get-ec-file +[ifdef] cl2-a1 " enter-updater" $call-ec ." Erasing ..." cr " erase-flash" $call-ec cr ." Writing ..." cr load-base /ec-flash 0 " write-flash" $call-ec cr ." Verifying ..." cr load-base /ec-flash + /ec-flash 0 " read-flash" $call-ec +[else] + use-edi-spi edi-open + ." Erasing ..." erase-chip cr + ." Writing ..." load-base /ec-flash 0 edi-program-flash cr + ." Verifying ..." + load-base /ec-flash + /ec-flash 0 edi-read-flash +[then] load-base load-base /ec-flash + /ec-flash comp - abort" Miscompare!" + abort" Miscompare!" cr +[ifndef] cl2-a1 + ." Restarting EC and powering off" cr + d# 3000 ms + unreset-8051 +[then] reset-ec ; : read-ec-flash ( -- ) +[ifdef] cl2-a1 " enter-updater" $call-ec flash-buf /ec-flash 0 " read-flash" $call-ec \ " reboot-ec" $call-ec +[else] + use-edi-spi edi-open + flash-buf /ec-flash 0 edi-read-flash +[then] ; : save-ec-flash ( "name" -- ) safe-parse-word $new-file Modified: cpu/arm/olpc/1.75/edi.fth ============================================================================== --- cpu/arm/olpc/1.75/edi.fth Fri Jan 21 23:19:08 2011 (r2145) +++ cpu/arm/olpc/1.75/edi.fth Mon Jan 24 23:44:23 2011 (r2146) @@ -13,7 +13,7 @@ \ spi-out ( byte -- ) - Send byte \ spi-in ( -- byte ) - Receive byte -h# 128 constant /flash-page +d# 128 constant /flash-page : edi-cmd,adr ( offset cmd -- ) \ Send command plus 3 address bytes spi-cs-on ( offset cmd ) @@ -32,6 +32,7 @@ unloop exit then loop + spi-cs-off true abort" EDI byte in timeout" ; [then] @@ -114,7 +115,7 @@ : send-byte ( b offset -- ) set-offset h# feaa edi-b! 2 flash-cmd ; -: program-page ( adr offset -- ) +: edi-program-page ( adr offset -- ) \ Clear HVPL wait-flash-busy h# 80 flash-cmd ( adr offset ) @@ -130,6 +131,14 @@ h# 70 flash-cmd ( ) wait-flash-busy ( ) ; +: edi-program-flash ( adr len offset -- ) + cr + swap 0 ?do + (cr i . + over i + over i + edi-program-page ( adr offset ) + /flash-page +loop ( adr offset ) + 2drop ( ) +; : edi-read-flash ( adr len offset -- ) over 0= if 3drop exit then ( adr len offset ) edi-b@ ( adr len byte ) @@ -138,44 +147,6 @@ edi-next-b@ i c! ( ) loop ( ) ; -: edi-open ( -- ) - \ slow-edi-clock \ Target speed between 1 and 2 MHz - spi-start - reset-8051 - \ fast-edi-clock \ Target speed up to 16 MHz - \ reset -; -0 [if] -+// IO3731 internal register locations -+#define E51_RST 0xf010 // 8051 Reset Control -+#define CODE_SEL 0xf011 // Code Source selection -+#define CHIP_ID_H 0xf01c // Chip ID High Byte -+#define CHIP_ID_L 0xf01d // Chip ID Low Byte -+#define IOSCCR 0xf02b // Internal OSC Control -+#define LVD_TRIM 0xf035 // Low Voltage Detect Trim -+#define XBIEFCFG 0xfea0 // XBI Embedded Flash Configuration -+#define XBIEFSIG1 0xfea1 // XBI Embedded Flash signals 1 in FW mode -+#define XBIEFSIG2 0xfea2 // XBI Embedded Flash signals 2 in FW mode -+#define XBIPUMP 0xfea3 // XBI Pump IP trimming bits -+#define XBIFM 0xfea4 // XBI Flash IP trimming bits -+#define XBIVR 0xfea5 // XBI VR IP trimming bits -+#define XBIMISC 0xfea6 // XBI MISC Reg -+#define XBIEFCMD 0xfea7 // XBI Embedded Flash Command Port -+#define XBIEFA0 0xfea8 // XBI Embedded Flash Address high -+#define XBIEFA1 0xfea9 // XBI Embedded Flash Address low -+#define XBIEFDO 0xfeaa // XBI Embedded Flash Output Data Port -+#define XBIEFDI 0xfeab // XBI Embedded Flash Input Data Port -+ -+ -+// IO3731 embedded flash command support: -+#define PAGE_LATCH 0x02 // Page latch -+#define READ 0x03 // Read -+#define ERASEPAGE 0x20 // Erase selected page -+#define ERASECHIP 0x60 // Erase whole e-flash -+#define PROGRAMPAGE 0x70 // Program selected page -+#define CLEARPAGELATCH 0x80 // Clear HVPL data -+#define READTRIMDATA 0x90 // Read Trim data from special rows -[then] : trim@ ( offset -- b ) set-offset h# 90 flash-cmd @@ -240,6 +211,16 @@ then \ then ; +: edi-open ( -- ) + \ slow-edi-clock \ Target speed between 1 and 2 MHz + spi-start + \ The first operation often fails so retry it + ['] select-flash catch if select-flash then + reset-8051 + trim-tune + \ fast-edi-clock \ Target speed up to 16 MHz + \ reset +; \ LICENSE_BEGIN \ Copyright (c) 2011 FirmWorks

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[commit] r2145 - cpu/arm/olpc/1.75
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 23:19:08 2011 New Revision: 2145 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2145 Log: Q4A11 Modified: cpu/arm/olpc/1.75/fw-version.fth Modified: cpu/arm/olpc/1.75/fw-version.fth ============================================================================== --- cpu/arm/olpc/1.75/fw-version.fth Fri Jan 21 23:18:42 2011 (r2144) +++ cpu/arm/olpc/1.75/fw-version.fth Fri Jan 21 23:19:08 2011 (r2145) @@ -1,3 +1,3 @@ \ The overall firmware revision macro: FW_MAJOR A -macro: FW_MINOR 10d +macro: FW_MINOR 11

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[commit] r2144 - cpu/arm
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 23:18:42 2011 New Revision: 2144 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2144 Log: ARM kernel - removed extra cr from build script. Modified: cpu/arm/kernel.bth Modified: cpu/arm/kernel.bth ============================================================================== --- cpu/arm/kernel.bth Fri Jan 21 22:07:15 2011 (r2143) +++ cpu/arm/kernel.bth Fri Jan 21 23:18:42 2011 (r2144) @@ -123,7 +123,6 @@ \Tags close-tag-file \NotTags .( --- Saving ) " kernel.dic" type .( ---) " kernel.dic" $save-meta cr -cr \ LICENSE_BEGIN \ Copyright (c) 2008 FirmWorks

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[commit] r2143 - clients/lib/arm
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 22:07:15 2011 New Revision: 2143 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2143 Log: svn ignore Modified: clients/lib/arm/ (props changed)

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[commit] r2142 - cpu/x86/Linux
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 22:05:07 2011 New Revision: 2142 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2142 Log: svn ignore Modified: cpu/x86/Linux/ (props changed)

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[commit] r2141 - dev/usb2/hcd/ehci
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 22:03:57 2011 New Revision: 2141 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2141 Log: USB EHCI driver - fixed longstanding stack bug in intr-in? which broke USB keyboard support. I'm unsure why we didn't notice this problem a long time ago. In the process of fixing the bug, I rewrote part of intr-in? for better stack clarity. Modified: dev/usb2/hcd/ehci/intr.fth Modified: dev/usb2/hcd/ehci/intr.fth ============================================================================== --- dev/usb2/hcd/ehci/intr.fth Fri Jan 21 21:53:07 2011 (r2140) +++ dev/usb2/hcd/ehci/intr.fth Fri Jan 21 22:03:57 2011 (r2141) @@ -64,21 +64,21 @@ ; : intr-in? ( -- actual usberr ) - intr-in-qh 0= if 0 USB_ERR_INV_OP exit then - clear-usb-error - intr-in-qh qh-done? if - intr-in-qh error? if - 0 - else - intr-in-qh dup sync-qhqtds - intr-in-qtd dup intr-in-qh >qh-#qtds l@ get-actual - over >qtd-buf rot >qtd-pbuf l@ 2 pick dma-sync - then - usb-error - intr-in-qh fixup-intr-in-data - else - 0 usb-error - then + intr-in-qh 0= if 0 USB_ERR_INV_OP exit then ( ) + clear-usb-error ( ) + intr-in-qh qh-done? if ( ) + intr-in-qh error? if ( ) + 0 ( actual ) + else ( ) + intr-in-qh sync-qhqtds ( ) + intr-in-qtd intr-in-qh >qh-#qtds l@ get-actual ( actual ) + intr-in-qtd >qtd-buf intr-in-qtd >qtd-pbuf l@ 2 pick dma-sync ( actual ) + then ( actual ) + usb-error ( actual usberr ) + intr-in-qh fixup-intr-in-data ( actual usberr ) + else ( ) + 0 usb-error ( actual usberr ) + then ( actual usberr ) ; headers

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[commit] r2140 - cpu/arm/olpc/1.75
by repository service 21 Jan '11

21 Jan '11

Author: wmb Date: Fri Jan 21 21:53:07 2011 New Revision: 2140 URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2140 Log: OLPC XO-1.75 - Added 400mhz and 800mhz commands for reduced-frequency testing. Modified: cpu/arm/olpc/1.75/fw.bth Modified: cpu/arm/olpc/1.75/fw.bth ============================================================================== --- cpu/arm/olpc/1.75/fw.bth Fri Jan 21 21:47:20 2011 (r2139) +++ cpu/arm/olpc/1.75/fw.bth Fri Jan 21 21:53:07 2011 (r2140) @@ -356,6 +356,13 @@ game-key-mask = if protect-fw try-fs-update then ; +: 400mhz ( -- ) + h# d428.2804 l@ 7 invert and h# 7000.0000 or 1 or h# d428.2804 l! +; +: 800mhz ( -- ) + h# d428.2804 l@ 7 invert and h# 7000.0000 or h# d428.2804 l! +; + : startup ( -- ) standalone? 0= if exit then

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openfirmware January 2011