openfirmware May 2009

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r1179 - in dev: . mmc/sdhci mmc/sdhci/mv8686 usb2/device/wlan
by svn＠openfirmware.info 13 May '09

13 May '09

Author: wmb Date: 2009-05-13 00:53:43 +0200 (Wed, 13 May 2009) New Revision: 1179 Added: dev/libertas.fth dev/mmc/sdhci/mv8686/ dev/mmc/sdhci/mv8686/build/ dev/mmc/sdhci/mv8686/common.fth dev/mmc/sdhci/mv8686/fw8686.fth dev/mmc/sdhci/mv8686/mv8686.bth dev/mmc/sdhci/mv8686/mv8686.fth dev/mmc/sdhci/mv8686/queue.fth dev/mmc/sdhci/mv8686/sdio.fth dev/mmc/sdhci/sdhci2.bth Modified: dev/mmc/sdhci/sdhci.fth dev/mmc/sdhci/sdmmc.fth dev/mmc/sdhci/selftest.fth dev/usb2/device/wlan/common.fth dev/usb2/device/wlan/fw8388.fth dev/usb2/device/wlan/usb8388.bth dev/usb2/device/wlan/usb8388.fth dev/usb2/device/wlan/wlan.fth Log: SD and Libertas - Big rearrangement of Marvel Wireless driver and of the SDHCI driver to support the wireless on both USB and SD, while sharing as much code as possible. Added: dev/libertas.fth =================================================================== --- dev/libertas.fth (rev 0) +++ dev/libertas.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,1720 @@ +purpose: Marvel "Libertas" wireless network driver common code +\ See license at end of file + +headers +hex + +\ **************** WPA and WPA2 are not functional yet ****************** + +\ ======================================================================= +\ Usage: +\ +\ Before probe-pci, reset-wlan. +\ Before using the driver, set wlan-* environment variables. +\ ======================================================================= + +\ Interface to /supplicant support package +0 value supplicant-ih +: $call-supplicant ( ...$ -- ... ) supplicant-ih $call-method ; +: do-associate ( -- flag ) " do-associate" $call-supplicant ; +: process-eapol ( adr len -- ) " process-eapol" $call-supplicant ; +: .scan ( adr -- ) " .scan" $call-supplicant ; + +defer load-all-fw ( -- error? ) ' false to load-all-fw +defer ?process-eapol ['] 2drop to ?process-eapol + +0 value outbuf +d# 2048 value /outbuf \ Power of 2 larger than max-frame-size + \ Override as necessary + +d# 2048 value /inbuf \ Power of 2 larger than max-frame-size + \ Override as necessary + +: init-buf ( -- ) + outbuf 0= if /outbuf dma-alloc to outbuf then +; +: free-buf ( -- ) + outbuf if outbuf /outbuf dma-free 0 to outbuf then +; + +\ ======================================================================= +\ Driver variables +\ ======================================================================= + +\ driver-state bit definitions +0000 constant ds-not-ready \ Initial state +0001 constant ds-ready \ Firmware has been downloaded +0010 constant ds-connected-mask \ Associated or joined +0010 constant ds-associated +8000 constant ds-disconnected \ Disconnected + +ds-not-ready value driver-state + +: set-driver-state ( bit-mask -- ) driver-state or to driver-state ; +: reset-driver-state ( bit-mask -- ) invert driver-state and to driver-state ; + +\ bss-type values +1 constant bss-type-managed +2 constant bss-type-adhoc +bss-type-managed value bss-type + +\ WPA/WPA2 keys +0 value ktype \ Key type +0 value ctype-g \ Group (multicast) cipher type +0 value ctype-p \ Pairwise (unicast) cipher type + +\ ktype values +0 constant kt-wep +1 constant kt-wpa +2 constant kt-wpa2 +h# ff constant kt-none + +\ ctype-x values +0 constant ct-none +1 constant ct-tkip +2 constant ct-aes + +\ WEP keys +1 constant TYPE_WEP_40_BIT +2 constant TYPE_WEP_104_BIT + +0 value wep-idx +d# 13 buffer: wep1 0 constant /wep1 +d# 13 buffer: wep2 0 constant /wep2 +d# 13 buffer: wep3 0 constant /wep3 +d# 13 buffer: wep4 0 constant /wep4 +: wep1$ ( -- $ ) wep1 /wep1 ; +: wep2$ ( -- $ ) wep2 /wep2 ; +: wep3$ ( -- $ ) wep3 /wep3 ; +: wep4$ ( -- $ ) wep4 /wep4 ; + +/mac-adr buffer: target-mac +: target-mac$ ( -- $ ) target-mac /mac-adr ; + +0 value #mc-adr \ Actual number of set multicast addresses +d# 32 dup constant #max-mc-adr \ Maximum number of multicast addresses +/mac-adr * dup constant /mc-adrs + buffer: mc-adrs \ Buffer of multicast addresses + +d# 256 buffer: ssid +0 value /ssid +: ssid$ ( -- $ ) ssid /ssid ; + +0 value channel + +d# 80 buffer: wpa-ie \ WPA IE saved for EAPOL phases +0 value /wpa-ie + +external +: wpa-ie$ ( -- adr len ) wpa-ie /wpa-ie ; +headers + +\ Data rates +d# 14 constant #rates +create supported-rates 82 c, 84 c, 8b c, 96 c, 0c c, 12 c, 18 c, 24 c, + 30 c, 48 c, 60 c, 6c c, 00 c, 00 c, +#rates buffer: common-rates + +external +: supported-rates$ ( -- adr len ) supported-rates #rates ; +: set-common-rates ( adr len -- ) + common-rates #rates erase + #rates min common-rates swap move +; +headers + +\ Miscellaneous +0 value preamble \ 0=long, 2=short, 4=auto +0 value auth-mode \ 0: open; 1: shared key; 2: EAP +h# 401 value cap \ Capabilities +3 instance value mac-ctrl \ MAC control + +external +: set-preamble ( preamble -- ) to preamble ; +: set-cap ( cap -- ) to cap ; +: set-auth-mode ( amode -- ) to auth-mode ; +headers + +: marvel-link-up? ( -- flag ) driver-state ds-ready > ; + +' marvel-link-up? to link-up? + +\ ========================================================================= +\ Firmware Command +\ ========================================================================= + +struct + /fw-transport + + 2 field >fw-cmd \ Start of command header + 2 field >fw-len + 2 field >fw-seq + 2 field >fw-result +dup constant /fw-cmd +dup 4 - constant /fw-cmd-hdr \ Command header len (less /fw-transport) + 0 field >fw-data \ Command payload starts here +drop + +: outbuf-out ( -- error? ) + outbuf dup >fw-len le-w@ /fw-transport + cmd-out +; + + +0 constant ACTION_GET +1 constant ACTION_SET +2 constant ACTION_ADD +3 constant ACTION_HALT +4 constant ACTION_REMOVE +8 constant ACTION_USE_DEFAULT + +-1 value fw-seq + +: fw-seq++ ( -- seq ) fw-seq 1+ dup to fw-seq ; + +d# 30 constant resp-wait-tiny +d# 1,000 constant resp-wait-short +d# 10,000 constant resp-wait-long +resp-wait-short instance value resp-wait + +/inbuf instance buffer: respbuf +0 instance value /respbuf + +\ ========================================================================= +\ Transmit Packet Descriptor +\ ========================================================================= + +struct + /fw-transport + + 4 field >tx-stat + 4 field >tx-ctrl + 4 field >tx-offset + 2 field >tx-len + 6 field >tx-mac + 1 field >tx-priority + 1 field >tx-pwr + 1 field >tx-delay \ in 2ms + 1+ + 1+ \ tx-mesh must be 0 + 1+ \ tx-mesh must be 0 + 1 field >tx-mesh-ttl + 1+ \ Just for alignment + 0 field >tx-pkt +constant /tx-hdr + +0 constant tx-ctrl \ Tx rates, etc + +\ The Libertas FW is currently abusing the WDS flag to mean "send on the mesh". +\ At some point a separate mesh flag might be defined ... +h# 20000 constant TX_WDS + +: mesh-on? ( -- flag ) tx-ctrl TX_WDS and 0<> ; + +: wrap-msg ( adr len -- adr' len' ) + outbuf /tx-hdr erase ( adr len ) + over outbuf >tx-mac /mac-adr move ( adr len ) + dup outbuf >tx-len le-w! ( adr len ) + tuck outbuf >tx-pkt swap move ( len ) + + /tx-hdr 4 - outbuf >tx-offset le-l! ( len ) \ Offset from >tx-ctrl field + tx-ctrl outbuf >tx-ctrl le-l! ( len ) + + mesh-on? if 1 outbuf >tx-mesh-ttl c! then ( len ) + + outbuf swap /tx-hdr + ( adr' len' ) +; + +\ ========================================================================= +\ Receive Packet Descriptor +\ ========================================================================= + +true instance value got-data? +0 instance value /data +0 instance value data + +\ Receive packet descriptor +struct + /fw-transport + + 2 field >rx-stat + 1 field >rx-snr + 1 field >rx-ctrl + 2 field >rx-len + 1 field >rx-nf + 1 field >rx-rate + 4 field >rx-offset + 1 field >rx-type + 3 + + 1 field >rx-priority + 3 + +\ dup constant /rx-desc +\ 6 field >rx-dst-mac +\ 6 field >rx-src-mac +\ 0 field >rx-data-no-snap +\ 2 field >rx-pkt-len \ pkt len from >rx-snap-hdr +\ 6 field >rx-snap-hdr +\ 0 field >rx-data +d# 22 + \ Size of an Ethernet header with SNAP +constant /rx-min + +\ >rx-stat constants +1 constant rx-stat-ok +2 constant rx-stat-multicast + +: snap-header " "(aa aa 03 00 00 00)" ; + +: rx-rate$ ( -- adr len ) " 1 25.5 11 ? 6 9 12 18 24 36 48 54 ? ? ?" ; +: .rx-rate ( rate -- ) h# f and 3 * rx-rate$ drop + 3 type ; + +: .rx-desc ( adr -- ) + debug? 0= if drop exit then + ?cr + ." Rx status: " dup >rx-stat le-w@ u. cr + ." Rx offset: " dup >rx-offset le-l@ u. cr + ." Rx len: " dup >rx-len le-w@ u. cr + ." Rx SNR: " dup >rx-snr c@ .d ." dB" cr + ." Rx noise floor: -" dup >rx-nf c@ .d ." dBm" cr + ." Rx rate: " dup >rx-rate c@ .rx-rate ." Mbps" cr + ." Rx priority: " dup >rx-priority c@ u. cr + drop +; + +: unwrap-pkt ( adr len -- data-adr data-len ) + /rx-min < if drop 0 0 then \ Invalid packet: too small + + \ Go to the payload, skipping the descriptor header + dup dup >rx-offset le-l@ + la1+ ( adr data-adr ) + swap >rx-len le-w@ ( data-adr data-len ) + + \ Remove snap header by moving the MAC addresses up + \ That's faster than moving the contents down + over d# 14 + snap-header comp 0= if ( data-adr data-len ) + over dup 8 + d# 12 move ( data-adr data-len ) + 8 /string ( adr' len' ) + then +; + +: process-data ( adr len -- ) + 2dup vdump ( adr len ) + over .rx-desc ( adr len ) + + over >rx-stat le-w@ rx-stat-ok <> if 2drop exit then + + unwrap-pkt to /data to data ( ) + + true to got-data? \ do-process-eapol may unset this + + \ Check the Ethernet type field for EAPOL messages + data d# 12 + be-w@ h# 888e = if \ Pass EAPOL messages to supplicant + data /data ?process-eapol + then +; + +: do-process-eapol ( adr len -- ) false to got-data? process-eapol ; + +\ ========================================================================= +\ Generic commands & responses +\ ========================================================================= + +0 value x \ Temporary variables to assist command creation +0 value /x + +: set-fw-data-x ( -- ) outbuf >fw-data to x /fw-cmd-hdr to /x ; +: 'x ( -- adr ) x /x + ; +: +x ( n -- ) /x + to /x ; +: +x$ ( $ -- ) 'x swap dup +x move ; +: +xl ( n -- ) 'x le-l! /l +x ; +: +xw ( n -- ) 'x le-w! /w +x ; +: +xb ( n -- ) 'x c! /c +x ; +: +xbl ( n -- ) 'x be-l! /l +x ; +: +xerase ( n -- ) 'x over erase +x ; + +: .cmd ( cmd -- ) + debug? 0= if drop exit then + ?cr + case + 0003 of ." CMD_GET_HW_SPEC" endof + 0005 of ." CMD_802_11_RESET" endof + 0006 of ." CMD_802_11_SCAN" endof + 000b of ." CMD_802_11_GET_LOG" endof + 0010 of ." CMD_MAC_MULTICAST_ADR" endof + 0011 of ." CMD_802_11_AUTHENTICATE" endof + 0013 of ." CMD_802_11_SET_WEP" endof + 0016 of ." CMD_802_11_SNMP_MIB" endof + 0019 of ." CMD_MAC_REG_ACCESS" endof + 001a of ." CMD_BBP_REG_ACCESS" endof + 001b of ." CMD_RF_REG_ACCESS" endof + 001c of ." CMD_802_11_RADIO_CONTROL" endof + 001d of ." CMD_802_11_RF_CHANNEL" endof + 001e of ." CMD_802_11_TX_POWER" endof + 001f of ." CMD_802_11_RSSI" endof + 0020 of ." CMD_802_11_RF_ANTENNA" endof + 0021 of ." CMD_802_11_PS_MODE" endof + 0022 of ." CMD_802_11_DATA_RATE" endof + 0024 of ." CMD_802_11_DEAUTHENTICATE" endof + 0026 of ." CMD_802_11_DISASSOCIATE" endof + 0028 of ." CMD_MAC_CONTROL" endof + 002b of ." CMD_802_11_AD_HOC_START" endof + 002c of ." CMD_802_11_AD_HOC_JOIN" endof + 002f of ." CMD_802_11_ENABLE_RSN" endof + 003e of ." CMD_802_11_DEEP_SLEEP" endof + 0040 of ." CMD_802_11_AD_HOC_STOP" endof + 0043 of ." CMD_802_11_HOST_SLEEP_CFG" endof + 0044 of ." CMD_802_11_WAKEUP_CONFIRM" endof + 004c of ." CMD_802_11_RGN_CODE" endof + 004d of ." CMD_802_11_MAC_ADDR" endof + 0050 of ." CMD_802_11_ASSOCIATE" endof + 0058 of ." CMD_802_11_BAND_CONFIG" endof + 0059 of ." CMD_EEPROM_ACCESS" endof + 005a of ." CMD_GSPI_BUS_CONFIG" endof + 005b of ." CMD_802_11D_DOMAIN_INFO" endof + 005c of ." CMD_WMM_ACK_POLICY" endof + 005e of ." CMD_802_11_KEY_MATERIAL" endof + 005f of ." CMD_802_11H_TPC_INFO" endof + 0060 of ." CMD_802_11H_TPC_ADAPT_REQ" endof + 0061 of ." CMD_802_11H_CHAN_SW_ANN" endof + 0062 of ." CMD_802_11H_MEASUREMENT_REQUEST" endof + 0063 of ." CMD_802_11H_GET_MEASUREMENT_REPORT" endof + 0066 of ." CMD_802_11_SLEEP_PARAMS" endof + 0068 of ." CMD_802_11_SLEEP_PERIOD" endof + 0069 of ." CMD_802_11_BCA_CONFIG_TIMESHARE" endof + 006b of ." CMD_802_11_BG_SCAN_CONFIG" endof + 006c of ." CMD_802_11_BG_SCAN_QUERY" endof + 006d of ." CMD_802_11_CAL_DATA_EXT" endof + 0071 of ." CMD_WMM_GET_STATUS" endof + 0072 of ." CMD_802_11_TPC_CFG" endof + 0073 of ." CMD_802_11_PA_CFG" endof + 0074 of ." CMD_802_11_FW_WAKE_METHOD" endof + 0075 of ." CMD_802_11_SUBSCRIBE_EVENT" endof + 0076 of ." CMD_802_11_RATE_ADAPT_RATESET" endof + 007f of ." CMD_TX_RATE_QUERY" endof + ( default ) ." Unknown command: " dup u. + endcase + cr +; + +\ Use prepare-cmd when the length is well known in advance +\ or longer than the outgoing argument fields +: prepare-cmd ( len cmd -- ) + dup .cmd ( len cmd ) + resp-wait-short to resp-wait ( len cmd ) + outbuf /outbuf erase ( len cmd ) + outbuf /fw-transport + to x 0 to /x ( len cmd ) + ( len cmd ) +xw \ fw-cmd ( len ) + /fw-cmd-hdr + +xw \ fw-len ( ) + fw-seq++ +xw \ fw-seq ( ) + 0 +xw \ fw-result ( ) +; + +\ Use start-cmd when determining the length in advance is tricky +: start-cmd ( cmd -- ) 0 swap prepare-cmd ; \ Will set actual len later +: finish-cmd ( -- ) /x outbuf >fw-len le-w! ; \ Set len field + +true value got-response? +true value got-indicator? + +: process-disconnect ( -- ) ds-disconnected set-driver-state ; +: process-wakeup ( -- ) ; +: process-sleep ( -- ) ; +: process-pmic-failure ( -- ) ; +: process-gmic-failure ( -- ) ; + +: .event ?cr ." Event: " type cr ; +0 instance value last-event +: process-ind ( adr len -- ) + drop + true to got-indicator? + 4 + le-l@ dup to last-event + case + h# 00 of " Tx PPA Free" .event endof \ n + h# 01 of " Tx DMA Done" .event endof \ n + h# 02 of " Link Loss with scan" .event process-disconnect endof + h# 03 of " Link Loss no scan" .event process-disconnect endof + h# 04 of " Link Sensed" .event endof + h# 05 of " CMD Finished" .event endof + h# 06 of " MIB Changed" .event endof + h# 07 of " Init Done" .event endof + h# 08 of " Deauthenticated" .event process-disconnect endof + h# 09 of " Disassociated" .event process-disconnect endof + h# 0a of " Awake" .event process-wakeup endof + h# 0b of " Sleep" .event process-wakeup endof + h# 0d of " Multicast MIC error" .event process-gmic-failure endof + h# 0e of " Unicast MIC error" .event process-pmic-failure endof + h# 0e of " WM awake" .event endof \ n + h# 11 of " HWAC - adhoc BCN lost" .event endof + h# 19 of " RSSI low" .event endof + h# 1a of " SNR low" .event endof + h# 1b of " Max fail" .event endof + h# 1c of " RSSI high" .event endof + h# 1d of " SNR high" .event endof + h# 23 of endof \ Suppress this; the user doesn't need to see it + \ h# 23 of ." Mesh auto-started" endof + h# 30 of endof \ Handle this silently +\ h# 30 of " Firmware ready" .event endof + ( default ) ." Unknown " dup u. + endcase +; + +: process-request ( adr len -- ) + 2dup vdump ( adr len ) + to /respbuf ( adr ) + respbuf /respbuf move ( ) + true to got-response? ( ) +; + +: process-rx ( adr len -- ) + over packet-type case + \ Encoding must agree with packet-type + 0 of process-request endof \ Response & request + 1 of process-data endof \ Data + 2 of process-ind endof \ Indication + ( default ) >r vdump r> + endcase +; + +: check-for-rx ( -- ) + got-packet? if ( error | buf len 0 ) + 0= if process-rx then ( ) + recycle-packet ( ) + then ( ) +; + +\ -1 error, 0 okay, 1 retry +: wait-cmd-resp ( -- -1|0|1 ) + false to got-response? + resp-wait 0 do + check-for-rx + got-response? if leave then + 1 ms + loop + got-response? if + respbuf >fw-result le-w@ case + 0 of 0 endof \ No error + 4 of 1 endof \ Busy, so retry + ( default ) ." Result = " dup u. cr dup + endcase + else +\ ." Timeout or error" cr + true + then +; +: wait-event ( -- true | event false ) + false to got-indicator? + d# 1000 0 do + check-for-rx + got-indicator? if last-event false unloop exit then + 1 ms + loop + true +; +: outbuf-wait ( -- error? ) + outbuf-out ?dup if exit then + wait-cmd-resp +; + + +\ ========================================================================= +\ Dumps +\ ========================================================================= + +: .fw-cap ( cap -- ) + ." 802.11" + dup h# 400 and if ." a" then + dup h# 100 and if ." b" then + dup h# 200 and if ." g" then ." ;" + dup h# 1 and if ." WPA;" then + dup h# 2 and if ." PS;" then + dup h# 8 and if ." EEPROM does not exit;" then + dup h# 30 and case + h# 00 of ." TX antanna 0;" endof + h# 10 of ." TX antenna 1;" endof + ( default ) ." TX diversity; " + endcase + h# c0 and case + h# 00 of ." RX antenna 0;" endof + h# 40 of ." RX antenna 1;" endof + ( default ) ." RX diversity;" + endcase +; + +: .log ( adr -- ) + dup >fw-len le-w@ /fw-cmd-hdr = if drop exit then + ." Multicast txed: " dup >fw-data le-l@ u. cr + ." Failed: " dup >fw-data 4 + le-l@ u. cr + ." Retry: " dup >fw-data 8 + le-l@ u. cr + ." Multiple retry: " dup >fw-data h# c + le-l@ u. cr + ." Duplicate frame rxed: " dup >fw-data h# 10 + le-l@ u. cr + ." Successful RTS: " dup >fw-data h# 14 + le-l@ u. cr + ." Failed RTS: " dup >fw-data h# 18 + le-l@ u. cr + ." Failed ACK: " dup >fw-data h# 1c + le-l@ u. cr + ." Fragment rxed: " dup >fw-data h# 20 + le-l@ u. cr + ." Multicast rxed: " dup >fw-data h# 24 + le-l@ u. cr + ." FCS error: " dup >fw-data h# 28 + le-l@ u. cr + ." Frame txed: " dup >fw-data h# 2c + le-l@ u. cr + ." WEP undecryptable: " dup >fw-data h# 30 + le-l@ u. cr + drop +; + + +\ ========================================================================= +\ Reset +\ ========================================================================= + +: reset-wlan ( -- ) " wlan-reset" evaluate ; + +: marvel-get-hw-spec ( -- true | adr false ) + d# 38 h# 03 ( CMD_GET_HW_SPEC ) prepare-cmd + outbuf-out ?dup if true exit then + resp-wait-tiny to resp-wait + wait-cmd-resp if true exit then + + respbuf >fw-data false +; + +\ The purpose of this is to work around a problem that I don't fully understand. +\ For some reason, when you reopen the device without re-downloading the +\ firmware, the first command silently fails - you don't get a response. +\ This is a "throwaway" command to handle that case without a long timeout +\ or a warning message. + +: nonce-cmd ( -- ) marvel-get-hw-spec 0= if drop then ; + +\ ========================================================================= +\ MAC address +\ ========================================================================= + +: marvel-get-mac-address ( -- ) + 8 h# 4d ( CMD_802_11_MAC_ADDRESS ) prepare-cmd + ACTION_GET +xw + outbuf-wait if ." marvel-get-mac-address failed" cr exit then + respbuf >fw-data 2 + mac-adr$ move +; + +: marvel-set-mac-address ( -- ) + 8 h# 4d ( CMD_802_11_MAC_ADDRESS ) prepare-cmd + ACTION_SET +xw + mac-adr$ +x$ + outbuf-wait if exit then +; + +: marvel-get-mc-address ( -- ) + 4 /mc-adrs + h# 10 ( CMD_MAC_MULTICAST_ADR ) prepare-cmd + ACTION_GET +xw + outbuf-wait if exit then + respbuf >fw-data 2 + le-w@ to #mc-adr + respbuf >fw-data 4 + mc-adrs #mc-adr /mac-adr * move +; + +: marvel-set-mc-address ( adr len -- ) + 4 /mc-adrs + h# 10 ( CMD_MAC_MULTICAST_ADR ) prepare-cmd + ACTION_SET +xw + dup /mac-adr / dup +xw \ Number of multicast addresses + to #mc-adr + ( adr len ) 2dup +x$ \ Multicast addresses + mc-adrs swap move + outbuf-wait if exit then +; + +\ ========================================================================= +\ Register access +\ ========================================================================= + +: reg-access@ ( reg cmd -- n ) + 8 swap prepare-cmd + ACTION_GET +xw + ( reg ) +xw + outbuf-wait if 0 exit then + respbuf >fw-data 4 + le-l@ +; + +: bbp-reg@ ( reg -- n ) + 1a ( CMD_BBP_REG_ACCESS ) reg-access@ h# ff and +; +: rf-reg@ ( reg -- n ) + 1b ( CMD_RF_REG_ACCESS ) reg-access@ h# ff and +; +: mac-reg@ ( reg -- n ) + 19 ( CMD_MAC_REG_ACCESS ) reg-access@ +; +: eeprom-l@ ( idx -- n ) + a 59 ( CMD_EEPROM_ACCESS ) prepare-cmd + ACTION_GET +xw + ( idx ) +xw + 4 +xw + outbuf-wait if 0 exit then + respbuf >fw-data 6 + le-l@ +; + +\ ========================================================================= +\ Miscellaneous control settings +\ ========================================================================= + +: set-radio-control ( -- ) + 4 h# 1c ( CMD_802_11_RADIO_CONTROL ) prepare-cmd + ACTION_SET +xw + preamble 1 or +xw \ Preamble, RF on + outbuf-wait if exit then +; + +: (set-bss-type) ( bsstype -- ok? ) + 6 d# 128 + h# 16 ( CMD_802_11_SNMP_MIB ) prepare-cmd + ACTION_SET +xw + 0 +xw \ Object = desiredBSSType + 1 +xw \ Size of object + ( bssType ) +xb + outbuf-wait 0= +; + +external +: set-bss-type ( bssType -- ok? ) dup to bss-type (set-bss-type) ; +headers + +: (set-mac-control) ( -- error? ) + 4 h# 28 ( CMD_MAC_CONTROL ) prepare-cmd + mac-ctrl +xw \ WEP type, WMM, protection, multicast, promiscous, WEP, tx, rx + outbuf-wait +; + +: set-mac-control ( -- error? ) + (set-mac-control) if + (set-mac-control) drop + then +; + +: set-domain-info ( adr len -- ) + dup 6 + h# 5b ( CMD_802_11D_DOMAIN_INFO ) prepare-cmd + ACTION_SET +xw + 7 +xw \ Type = MrvlIETypes_DomainParam_t + ( len ) dup +xw \ Length of payload + ( adr len ) +x$ \ Country IE + outbuf-wait if exit then +; + +: enable-11d ( -- ) + 6 d# 128 + h# 16 ( CMD_802_11_SNMP_MIB ) prepare-cmd + ACTION_SET +xw + 9 +xw \ Object = enable 11D + 2 +xw \ Size of object + 1 +xw \ Enable 11D + outbuf-wait if exit then +; + +external +: enforce-protection ( -- ) + mac-ctrl h# 400 or to mac-ctrl \ Enforce protection + set-mac-control +; + +: disable-protection ( -- ) + mac-ctrl h# 400 invert and to mac-ctrl + set-mac-control +; + +: set-key-type ( ctp ctg ktype -- ) to ktype to ctype-g to ctype-p ; + +: set-country-info ( adr len -- ) \ IEEE country IE + set-domain-info + enable-11d +; + +: enable-promiscuous ( -- ) + mac-ctrl h# 80 or to mac-ctrl + set-mac-control +; +: disable-promiscuous ( -- ) + mac-ctrl h# 80 invert and to mac-ctrl + set-mac-control +; + +: enable-multicast ( -- ) + mac-ctrl h# 20 or to mac-ctrl + set-mac-control +; +: disable-multicast ( -- ) + mac-ctrl h# 20 invert and to mac-ctrl + set-mac-control +; +: set-multicast ( adr len -- ) marvel-set-mc-address enable-multicast ; + +: mac-off ( -- ) + 0 to mac-ctrl set-mac-control 3 to mac-ctrl +; +headers + +\ ========================================================================= +\ Scan +\ ========================================================================= + +1 constant #probes + +d# 14 constant #channels + +[ifdef] notdef +struct + 2 field >type-id + 2 field >/payload +dup constant /marvel-IE-hdr + 2 field >probes +constant /probes-IE + +struct + 1 field >radio-type + 1 field >channel# + 1 field >scan-type + 2 field >min-scan-time + 2 field >max-scan-time +constant /chan-list + +struct + /marvel-IE-hdr + + #channels /chan-list * field >chan-list +constant /chan-list-IE + +struct + /marvel-IE-hdr + + d# 34 field >ssid +constant /ssid-IE + +struct + 1 field >bss-type + 6 field >bss-id + /chan-list-IE field >chan-list-IE + /probes-IE field >probes-IE +constant /cmd_802_11_scan +[then] + +1 constant BSS_INDEPENDENT +2 constant BSS_INFRASTRUCTURE +3 constant BSS_ANY + +\ OUI values (big-endian) +h# 0050.f201 constant wpa-tag \ WPA tag +h# 0050.f202 constant moui-tkip \ WPA cipher suite TKIP +h# 0050.f204 constant moui-aes \ WPA cipher suite AES +h# 000f.ac02 constant oui-tkip \ WPA2 cipher suite TKIP +h# 000f.ac04 constant oui-aes \ WPA2 cipher suite AES +h# 000f.ac02 constant aoui \ WPA2 authentication suite +h# 0050.f202 constant amoui \ WPA authentication suite + + +d# 34 instance buffer: scan-ssid + +0 value scan-type +: active-scan ( -- ) 0 to scan-type ; +: passive-scan ( -- ) 1 to scan-type ; + +[ifdef] notdef +: make-chan-list-param ( adr -- ) + #channels 0 do + dup i /chan-list * + + 0 over >radio-type c! + i 1+ over >channel# c! + scan-type over >scan-type c! + d# 100 over >min-scan-time le-w! + d# 100 swap >max-scan-time le-w! + loop drop +; + +: (oldscan) ( -- error? | adr len 0 ) + /cmd_802_11_scan scan-ssid c@ if + /marvel-IE-hdr + scan-ssid c@ + + then + 6 ( CMD_802_11_SCAN ) prepare-cmd ( ) + resp-wait-long to resp-wait ( ) + BSS_ANY outbuf >fw-data tuck >bss-type c! ( 'fw-data ) + + dup >chan-list-IE ( 'fw-data 'chan-list ) + h# 101 over >type-id le-w! ( 'fw-data 'chan-list ) + #channels /chan-list * over >/payload le-w! ( 'fw-data 'chan-list ) + >chan-list make-chan-list-param ( 'fw-data ) + + dup >probes-IE ( 'fw-data 'probes ) + h# 102 over >type-id le-w! ( 'fw-data 'probes ) + 2 over >/payload le-w! ( 'fw-data 'probes ) + #probes swap >probes le-w! ( 'fw-data ) + + scan-ssid c@ if ( 'fw-data ) + \ Attach an SSID TLV to filter the result + /cmd_802_11_scan + ( 'ssid ) + h# 000 over >type-id le-w! ( 'ssid ) + scan-ssid c@ over >/payload le-w! ( 'ssid ) + scan-ssid count rot /marvel-IE-hdr + swap move ( ) + else ( 'fw-data ) + drop + then ( ) + + outbuf-wait ( error? ) + dup 0= if ( error? ) + respbuf /respbuf /fw-cmd /string rot ( adr len 0 ) + then +; +[then] + +h# 7ffe instance value channel-mask + +: +chan-list-tlv ( -- ) + h# 101 +xw + 0 +xw 'x >r ( r: 'payload ) + #channels 1+ 1 do + 1 i lshift channel-mask and if + 0 +xb \ Radio type + i +xb \ Channel # + scan-type +xb \ Scan type - 0:active or 1:passive + d# 100 +xw \ Min scan time + d# 100 +xw \ Max scan time + then + loop + 'x r@ - r> 2- le-w! +; + +: +probes-tlv ( -- ) + h# 102 +xw \ Probes TLV + 2 +xw \ length + #probes +xw \ #probes +; + +: +ssid-tlv ( -- ) + scan-ssid c@ if + 0 +xw \ SSID TLV + scan-ssid c@ +xw \ length + scan-ssid count +x$ + then +; + +: (scan) ( -- error? | adr len 0 ) + 6 ( CMD_802_11_SCAN ) start-cmd + resp-wait-long to resp-wait + + BSS_ANY +xb + 6 +xerase \ BSS ID + + +chan-list-tlv + +probes-tlv + +ssid-tlv + + finish-cmd outbuf-wait dup 0= if ( error? ) + respbuf /respbuf /fw-cmd /string rot ( adr len 0 ) + then +; + + +external +: set-channel-mask ( n -- ) + h# 7ffe and to channel-mask +; + +\ Ask the device to look for the indicated SSID. +: set-ssid ( adr len -- ) + \ This is an optimization for NAND update over the mesh. + \ It prevents listening stations, of which there can be many, + \ from transmitting when they come on-line. + 2dup " olpc-mesh" $= if passive-scan then + + h# 32 min scan-ssid pack drop +; + +: scan ( adr len -- actual ) +\ (scan) + begin (scan) dup 1 = while drop d# 1000 ms repeat \ Retry while busy + if 2drop 0 exit then ( adr len scan-adr scan-len ) + rot min >r ( adr scan-adr r: len ) + swap r@ move ( r: len ) + r> +; +headers + +\ ========================================================================= +\ WEP +\ ========================================================================= + +: set-wep-type ( len -- ) + ?dup if + 5 = if TYPE_WEP_40_BIT 8 else TYPE_WEP_104_BIT h# 8008 then + mac-ctrl or to mac-ctrl \ WEPxx on + else + 0 + then + +xb +; + +external +: (set-wep) ( wep4$ wep3$ wep2$ wep1$ idx -- ok? ) + d# 72 h# 13 ( CMD_802_11_SET_WEP ) prepare-cmd + ACTION_ADD +xw + ( idx ) +xw \ TxKeyIndex + dup set-wep-type + 2 pick set-wep-type + 4 pick set-wep-type + 6 pick set-wep-type + 4 0 do + ?dup if x /x + swap move else drop then + d# 16 /x + to /x + loop + outbuf-wait 0= +; +: set-wep ( wep4$ wep3$ wep2$ wep1$ idx -- ok? ) + to wep-idx + dup to /wep1 wep1 swap move + dup to /wep2 wep2 swap move + dup to /wep3 wep3 swap move + dup to /wep4 wep4 swap move + true +; +: ?set-wep ( -- ) + ktype kt-wep = if + wep4$ wep3$ wep2$ wep1$ wep-idx (set-wep) drop + then +; + +: disable-wep ( -- ok? ) + mac-ctrl h# 8008 invert and to mac-ctrl \ Disable WEP + d# 72 h# 13 ( CMD_802_11_SET_WEP ) prepare-cmd + ACTION_REMOVE +xw + 0 +xw \ TxKeyIndex + outbuf-wait 0= +; +headers + +\ ========================================================================= +\ WPA and WPA2 +\ ========================================================================= + +: set-rsn ( enable? -- ok? ) + 4 h# 2f ( CMD_802_11_ENABLE_RSN ) prepare-cmd + ACTION_SET +xw + ( enable? ) +xw \ 1: enable; 0: disable + outbuf-wait 0= +; + +external +: enable-rsn ( -- ok? ) 1 set-rsn ; +: disable-rsn ( -- ok? ) 0 set-rsn ; +headers + +: set-key-material ( key$ kinfo ct -- ) + h# 5e ( CMD_802_11_KEY_MATERIAL ) start-cmd + ACTION_SET +xw + h# 100 +xw \ Key param IE type + 2 pick 6 + +xw \ IE payload length + ( ct ) +xw \ Cipher type + ( kinfo ) +xw \ Key info + dup +xw \ Key length + ( key$ ) +x$ \ key$ + finish-cmd outbuf-wait if exit then +; + +external +: set-gtk ( gtk$ -- ) 5 ctype-g set-key-material ; +: set-ptk ( ptk$ -- ) 6 ctype-p set-key-material ; +headers + +\ ======================================================================= +\ Adhoc join +\ ======================================================================= + +0 value atim + +: save-associate-params ( ch ssid$ target-mac$ -- ch ssid$ target-mac ) + over target-mac$ move + 2over dup to /ssid + ssid swap move + 4 pick to channel +; + +: (join) ( ch ssid$ target-mac$ -- ok? ) + save-associate-params + h# 2c ( CMD_802_11_AD_HOC_JOIN ) start-cmd + resp-wait-long to resp-wait + + ( target-mac$ ) +x$ \ Peer MAC address + ( ssid$ ) tuck +x$ \ SSID + ( ssid-len ) d# 32 swap - +x \ 32 bytes of SSID + bss-type-adhoc +xb \ BSS type + d# 100 +xw \ Beacon period + 1 +xb \ DTIM period + + 8 +x \ 8 bytes of time stamp + 8 +x \ 8 bytes of local time + + \ DS param set + 3 +xb \ Elem ID = DS param set + 1 +xb \ Length + ( channel ) +xb \ Channel + 4 +x \ Reserved bytes + + \ IBSS param set + 6 +xb \ Elem ID = IBSS param set + 2 +xb \ Length + atim +xw \ ATIM window + 4 +x \ Reserved bytes + + cap +xw \ Capability info: ESS, short slot, WEP + + \ XXX 14 bytes for 802.11g, 8 bytes for 802.11b + common-rates #rates +x$ \ Common supported data rates + d# 255 +xw \ Association timeout + 0 +xw \ Probe delay time + + finish-cmd outbuf-wait if ." Failed to join adhoc network" cr false exit then + true +; + +external +: set-atim-window ( n -- ) d# 50 min to atim ; +headers + +\ ========================================================================= +\ Authenticate +\ ========================================================================= + +: authenticate ( target-mac$ -- ) + dup 1+ h# 11 ( CMD_802_11_AUTHENTICATE ) prepare-cmd + ( target-mac$ ) +x$ \ Peer MAC address + auth-mode +xb \ Authentication mode + outbuf-wait if exit then +; + +: deauthenticate ( mac$ -- ) + dup 2+ h# 24 ( CMD_802_11_DEAUTHENTICATE ) prepare-cmd + ( mac$ ) +x$ \ AP MAC address + 3 +xw \ Reason code: station is leaving + outbuf-wait if exit then + ds-disconnected set-driver-state +; + +\ Mesh + +: mesh-access! ( value cmd -- ) + h# 82 h# 9b ( CMD_MESH_ACCESS ) prepare-cmd ( value cmd ) + +xw +xl ( ) + + outbuf-wait if exit then +; +: mesh-access@ ( cmd -- value ) + h# 82 h# 9b ( CMD_MESH_ACCESS ) prepare-cmd ( value cmd ) + +xw ( ) + + outbuf-wait if -1 exit then + respbuf >fw-data wa1+ le-l@ +; + +: mesh-config-set ( adr len type channel action -- error? ) + h# 88 h# a3 ( CMD_MESH_CONFIG ) prepare-cmd ( adr len type channel action ) + +xw +xw +xw ( adr len ) + dup +xw +x$ ( ) + + outbuf-wait +; +: mesh-config-get ( -- true | buf false ) + h# 88 h# a3 ( CMD_MESH_CONFIG ) prepare-cmd ( ) + 3 +xw 0 +xw 5 +xw ( ) + + outbuf-wait if true exit then + respbuf >fw-data false +; +: (mesh-start) ( channel tlv -- error? ) + " "(dd 0e 00 50 43 04 00 00 00 00 00 04)mesh" ( channel tlv adr len ) + 2swap swap 1 ( adr len tlv channel action ) \ 1 is CMD_ACT_MESH_CONFIG_START + mesh-config-set +; + +: mesh-stop ( -- error? ) + mesh-on? if + " " 0 0 0 mesh-config-set ( error? ) + tx-ctrl TX_WDS invert and to tx-ctrl ( error? ) + ds-associated reset-driver-state ( error? ) + else + false ( error? ) + then +; + +: mesh-start ( channel -- error? ) + \ h# 223 (0x100 + 291) is an old value + \ h# 125 (0x100 + 37) is an "official" value that doesn't work + dup h# 223 (mesh-start) if ( channel ) + \ Retry once + h# 223 (mesh-start) ( error? ) + else + drop false ( error? ) + then + + dup 0= if ( error? ) + tx-ctrl TX_WDS or to tx-ctrl ( error? ) + ds-associated set-driver-state ( error? ) + then ( error? ) +; + +instance variable mesh-param +: mesh-set-bootflag ( bootflag -- error? ) + mesh-param le-l! mesh-param 4 1 0 3 mesh-config-set +; +: mesh-set-boottime ( boottime -- error? ) + mesh-param le-w! mesh-param 2 2 0 3 mesh-config-set +; +: mesh-set-def-channel ( boottime -- error? ) + mesh-param le-w! mesh-param 2 3 0 3 mesh-config-set +; +: mesh-set-ie ( adr len -- error? ) 4 0 3 mesh-config-set ; +: mesh-set-ttl ( ttl -- ) 2 mesh-access! ; +: mesh-get-ttl ( -- ttl ) 1 mesh-access@ ; +: mesh-set-bcast ( index -- ) 8 mesh-access! ; +: mesh-get-bcast ( -- index ) 9 mesh-access@ ; + +[ifdef] notdef +: mesh-set-anycast ( mask -- ) 5 mesh-access! ; +: mesh-get-anycast ( -- mask ) 4 mesh-access@ ; + +: mesh-set-rreq-delay ( n -- ) d# 10 mesh-access! ; +: mesh-get-rreq-delay ( -- n ) d# 11 mesh-access@ ; + +: mesh-set-route-exp ( n -- ) d# 12 mesh-access! ; +: mesh-get-route-exp ( -- n ) d# 13 mesh-access@ ; + +: mesh-set-autostart ( n -- ) d# 14 mesh-access! ; +: mesh-get-autostart ( -- n ) d# 15 mesh-access@ ; + +: mesh-set-prb-rsp-retry-limit ( n -- ) d# 17 mesh-access! ; +[then] + +\ ========================================================================= +\ Associate/disassociate +\ ========================================================================= + +0 value assoc-id + +\ The source IE is in the Marvel format: id and len are 2 bytes long. +\ The destination IE is in the 802.11 format: id and len are 1 byte long. +: save-wpa-ie ( boffset eoffset -- ) + over - 2 - to /wpa-ie \ Less extra bytes + x + dup c@ wpa-ie c! \ Copy IE id + 2 + dup c@ wpa-ie 1+ c! \ Copy len + 2 + wpa-ie /wpa-ie 2 /string move \ Copy body of IE +; + +: moui ( ct -- ) ct-tkip = if moui-tkip else moui-aes then ; +: oui ( ct -- ) ct-tkip = if oui-tkip else oui-aes then ; + +: (associate) ( ch ssid$ target-mac$ -- ok? ) + save-associate-params + + h# 50 ( CMD_802_11_ASSOCIATE ) start-cmd + resp-wait-long to resp-wait + + ( target-mac$ ) +x$ \ Peer MAC address + cap +xw \ Capability info: ESS, short slot, WEP + d# 10 +xw \ Listen interval + d# 100 +xw \ Beacon period + 1 +xb \ DTIM period + + \ SSID + 0 +xw \ element ID = SSID + dup +xw \ len + ( ssid$ ) +x$ \ SSID + + \ DS param + 3 +xw \ element ID = DS param set + 1 +xw \ len + ( ch ) +xb \ channel + + \ CF param + 4 +xw \ element ID = CF param set + 0 +xw \ len + + \ Common supported rates + 1 +xw \ element ID = rates + #rates +xw \ len + common-rates #rates +x$ \ common supported data rates + + \ RSN (WPA2) + ktype kt-wpa2 = if + /x \ Save beginning offset + d# 48 +xw \ element ID = RSN + d# 20 +xw \ len + 1 +xw \ version + ctype-g oui +xbl \ group cipher suite + 1 +xw \ count of pairwise cipher suite + ctype-p oui +xbl \ pairwise cipher suite + 1 +xw \ count of authentication suite + aoui +xbl \ authentication suite + h# 28 +xw \ RSN capabilities + /x save-wpa-ie \ Save IE in wpa-ie + then + + \ WPA param + ktype kt-wpa = if + /x \ Save beginning offset + d# 221 +xw \ element ID = WPA + d# 24 +xw \ len + wpa-tag +xbl \ WPA-specific tag + 1 +xw \ version + ctype-g moui +xbl \ group cipher suite + 1 +xw \ count of pairwise cipher suite + ctype-p moui +xbl \ pairwise cipher suite + 1 +xw \ count of authentication suite + amoui +xbl \ authentication suite + ctype-p ct-tkip = if h# 2a else h# 28 then + ( cap ) +xw \ WPA capabilities + /x save-wpa-ie \ Save IE in wpa-ie + then + + \ XXX power (optional) + \ XXX supported channels set (802.11h only) + \ XXX pass thru IEs (optional) + + finish-cmd outbuf-wait if false exit then + + respbuf >fw-data 2 + le-w@ ?dup if \ This is the IEEE Status Code + ." Failed to associate: " u. cr + false + else + respbuf >fw-data 4 + le-w@ to assoc-id + ds-disconnected ds-connected-mask or reset-driver-state + true + then +; + +external +instance defer mesh-default-modes +' noop to mesh-default-modes +: nandcast-mesh-modes ( -- ) + 1 mesh-set-ttl + d# 12 mesh-set-bcast +; +' nandcast-mesh-modes to mesh-default-modes + +: associate ( ch ssid$ target-mac$ -- ok? ) + 2over " olpc-mesh" $= if ( ch ssid$ target-mac$ ) + 2drop 2drop mesh-start 0= ( ok? ) + dup if mesh-default-modes then + exit + then + ?set-wep \ Set WEP keys again, if ktype is WEP + set-mac-control + 2dup authenticate + bss-type bss-type-managed = if (associate) else (join) then +; +headers + +: do-associate ( -- ok? ) + do-associate dup if + ds-disconnected reset-driver-state + ds-associated set-driver-state + then +; + +: ?reassociate ( -- ) + driver-state ds-disconnected and if do-associate drop then +; +' ?reassociate to start-nic + +: disassociate ( mac$ -- ) + dup 2+ h# 26 ( CMD_802_11_DISASSOCIATE ) prepare-cmd + ( mac$ ) +x$ \ AP MAC address + 3 +xw \ Reason code: station is leaving + outbuf-wait if exit then + ds-disconnected set-driver-state +; + + +\ ======================================================================= +\ Miscellaneous +\ ======================================================================= + +: get-rf-channel ( -- ) + d# 40 h# 1d ( CMD_802_11_RF_CHANNEL ) prepare-cmd + ACTION_GET +xw + outbuf-wait if exit then + ." Current channel = " respbuf >fw-data 2 + le-w@ .d cr +; + +: get-beacon ( -- interval enabled? ) + 6 h# b0 ( CMD_802_11_BEACON_CTRL ) prepare-cmd + ACTION_GET +xw + outbuf-wait if exit then + respbuf >fw-data dup 2 wa+ le-w@ swap wa1+ le-w@ +; + +: set-beacon ( interval enabled? -- ) + 6 h# b0 ( CMD_802_11_BEACON_CTRL ) prepare-cmd + ACTION_SET +xw ( interval enabled? ) + +xw +xw + outbuf-wait drop +; + + +: get-log ( -- ) + 0 h# b ( CMD_802_11_GET_LOG ) prepare-cmd + outbuf-wait if exit then + respbuf .log +; + +: get-rssi ( -- ) + 2 h# 1f ( CMD_802_11_RSSI ) prepare-cmd + 8 +xw \ Value used for exp averaging + outbuf-wait drop + \ XXX What to do with the result? +; + +: .hw-spec ( -- ) + marvel-get-hw-spec if + ." marvel-get-hw-spec command failed" cr + else + ." HW interface version: " dup le-w@ u. cr + ." HW version: " dup 2 + le-w@ u. cr + ." Max multicast addr: " dup 6 + le-w@ .d cr + ." MAC address: " dup 8 + .enaddr cr + ." Region code: " dup d# 14 + le-w@ u. cr + ." # antenna: " dup d# 16 + le-w@ .d cr + ." FW release: " dup d# 18 + le-l@ u. cr + ." FW capability:" d# 34 + le-l@ .fw-cap cr + then +; + +: set-data-rate ( rate-code -- ) + #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd + + 1 ( CMD_ACT_SET_TX_FIX_RATE ) +xw + 0 +xw \ reserved field + ( rate-code ) +xb + + outbuf-wait drop +; +: auto-data-rate ( -- ) + #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd + + 0 ( CMD_ACT_SET_TX_FIX_RATE ) +xw + 0 +xw \ reserved field + + outbuf-wait drop +; + + +: get-data-rates ( -- ) + #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd + 2 ( HostCmd_ACT_GET_TX_RATE ) +xw + outbuf-wait drop +; + +2 constant gpio-pin +d# 20 constant wake-gap +1 constant wake-on-broadcast +2 constant wake-on-unicast +4 constant wake-on-mac-event +-1 constant remove-wakeup + +\ LED_GPIO_CTRL + +: host-sleep-activate ( -- ) + 0 h# 45 ( CMD_802_11_HOST_SLEEP_ACTIVATE ) prepare-cmd + outbuf-wait drop +; + +: host-sleep-config ( conditions -- ) + >r + 6 h# 43 ( CMD_802_11_HOST_SLEEP_CFG ) prepare-cmd +\ ACTION_SET +xw + + r> +xl + gpio-pin +xb + wake-gap +xb + + outbuf-wait drop +; + +: unicast-wakeup ( -- ) wake-on-unicast host-sleep-config ; +: broadcast-wakeup ( -- ) wake-on-unicast wake-on-broadcast or host-sleep-config ; +: sleep ( -- ) host-sleep-activate ; + +[ifdef] notdef + CMD_ACT_MESH_... + 1 GET_TTL 2 SET_TTL 3 GET_STATS 4 GET_ANYCAST 5 SET_ANYCAST + 6 SET_LINK_COSTS 7 GET_LINK_COSTS 8 SET_BCAST_RATE 9 GET_BCAST_RATE +10 SET_RREQ_DELAY 11 GET_RREQ_DELAY 12 SET_ROUTE_EXP 13 GET_ROUTE_EXP +14 SET_AUTOSTART_ENABLED 15 GET_AUTOSTART_ENABLED 16 not used +17 SET_PRB_RSP_RETRY_LIMIT + +CMD_TYPE_MESH_ +1 SET_BOOTFLAG 2 SET_BOOTTIME 3 SET_DEF_CHANNEL 4 SET_MESH_IE +5 GET_DEFAULTS 6 GET_MESH_IE /* GET_DEFAULTS is superset of GET_MESHIE */ + +CMD_ACT_MESH_CONFIG_.. 0 STOP 1 START 2 SET 3 GET + +struct cmd_ds_mesh_config { + struct cmd_header hdr; + __le16 action; __le16 channel; __le16 type; __le16 length; + u8 data[128]; /* last position reserved */ +} +struct mrvl_meshie_val { + uint8_t oui[P80211_OUI_LEN]; + uint8_t type; + uint8_t subtype; + uint8_t version; + uint8_t active_protocol_id; + uint8_t active_metric_id; + uint8_t mesh_capability; + uint8_t mesh_id_len; + uint8_t mesh_id[IW_ESSID_MAX_SIZE]; 32 +} +struct ieee80211_info_element { + u8 id; u8 len; u8 data[0]; +} +struct mrvl_meshie { + struct ieee80211_info_element hdr; + struct mrvl_meshie_val val; +} + memset(&cmd, 0, sizeof(cmd)); + cmd.channel = cpu_to_le16(chan); + ie = (struct mrvl_meshie *)cmd.data; + + switch (action) { + case CMD_ACT_MESH_CONFIG_START: +0.b 221 ie->hdr.id = MFIE_TYPE_GENERIC; +2.b h# 00 ie->val.oui[0] = 0x00; +3.b h# 50 ie->val.oui[1] = 0x50; +4.b h# 43 ie->val.oui[2] = 0x43; +5.b 4 ie->val.type = MARVELL_MESH_IE_TYPE; +6.b 0 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE; +7.b 0 ie->val.version = MARVELL_MESH_IE_VERSION; +8.b 0 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP; +9.b 0 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID; +10.b 0 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY; +11.b ssid_len ie->val.mesh_id_len = priv->mesh_ssid_len; +12 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len); +1 10+ssid_len ie->hdr.len = sizeof(struct mrvl_meshie_val) - IW_ESSID_MAX_SIZE + priv->mesh_ssid_len; + + 42 (32+10) cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val)); + +config_start: action is 1 (...CONFIG_START), type = mesh_tlv which is either h# 100 d# 291 + or h# 100 d# 37 + +[then] + +[ifdef] notdef +create mesh_start_cmd + \ MFIE_TYPE_GENERIC ielen (10 + sizeof("mesh")) + d# 221 c, d# 14 c, + + \ OUI.................... type subtyp vers proto metric cap + h# 00 c, h# 50 c, h# 43 c, 4 c, 0 c, 0 c, 0 c, 0 c, 0 c, + + \ ssidlen ssid (set@12) + d# 04 c, here 4 allot " mesh" rot swap move +here mesh_start_cmd - constant /mesh_start_cmd +[then] + +[ifdef] wlan-wackup \ This is test code that only works with a special debug version of the Libertas firmware +: autostart ( -- ) + h# 700000 h# 5 mesh-access! +; +[then] + +hex +headers + +" wlan" device-name +" wireless-network" device-type + +variable opencount 0 opencount ! + +headers + +: ?make-mac-address-property ( -- ) + driver-state ds-ready < if exit then + " mac-address" get-my-property if + mac-adr$ encode-bytes " local-mac-address" property + mac-address encode-bytes " mac-address" property + else + 2drop + then +; +: set-frame-size ( -- ) + " max-frame-size" get-my-property if ( ) + max-frame-size encode-int " max-frame-size" property + else ( prop$ ) + 2drop + then +; + +: init-net ( -- ) + marvel-get-mac-address + ?make-mac-address-property +; + +: ?load-fw ( -- error? ) + driver-state ds-not-ready = if + load-all-fw if + ." Failed to download firmware" cr + true exit + then + ds-ready to driver-state + then + init-net + false +; + +false instance value use-promiscuous? + +external + +\ Set to true to force open the driver without association. +\ Designed for use by application to update the Marvel firmware only. +\ Normal operation should have force-open? be false. +false instance value force-open? + +: parse-args ( $ -- ) + false to use-promiscuous? + begin ?dup while + ascii , left-parse-string + 2dup " debug" $= if debug-on then + 2dup " promiscuous" $= if true to use-promiscuous? then + " force" $= if true to force-open? then + repeat drop +; + +: open ( -- ok? ) + my-args parse-args + set-parent-channel + opencount @ 0= if + init-buf + /inbuf /outbuf setup-bus-io if free-buf false exit then + ?load-fw if release-bus-resources free-buf false exit then + my-args " supplicant" $open-package to supplicant-ih + supplicant-ih 0= if release-bus-resources free-buf false exit then + nonce-cmd + force-open? 0= if + link-up? 0= if + ['] 2drop to ?process-eapol + do-associate 0= if free-buf false exit then + ds-disconnected reset-driver-state + ds-associated set-driver-state + ['] do-process-eapol to ?process-eapol + then + start-nic + then + then + force-open? 0= if + use-promiscuous? if enable-promiscuous else disable-promiscuous then + then + opencount @ 1+ opencount ! + true +; + +: close ( -- ) + opencount @ 1- 0 max opencount ! + opencount @ 0= if + disable-multicast + mesh-stop drop + link-up? if target-mac$ deauthenticate then + ['] 2drop to ?process-eapol + stop-nic + mac-off + supplicant-ih ?dup if close-package 0 to supplicant-ih then + release-bus-resources + then +; + +\ Read and write ethernet messages regardless of the associate state. +\ Used by the /supplicant support package to perform key handshaking. +: write-force ( adr len -- actual ) + tuck ( actual adr len ) + wrap-msg ( actual adr' len' ) + data-out ( actual ) +; + +: read-force ( adr len -- actual ) + got-packet? 0= if ( adr len ) + 2drop -2 exit + then ( adr len [ error | buf actual 0 ] ) + + if \ receive error ( adr len ) + recycle-packet ( adr len ) + 2drop -1 exit + then ( adr len buf actual ) + + false to got-data? ( adr len buf actual ) + process-rx ( adr len ) + recycle-packet ( adr len ) + + got-data? if ( adr len ) + /data min tuck data -rot move ( actual ) + else ( adr len ) + 2drop -2 \ No data + then ( actual ) + +; + +\ Normal read and write methods. +: write ( adr len -- actual ) + link-up? 0= if 2drop 0 exit then \ Not associated yet. + ?reassociate \ In case if the connection is dropped + write-force +; +: read ( adr len -- actual ) + \ If a good receive packet is ready, copy it out and return actual length + \ If a bad packet came in, discard it and return -1 + \ If no packet is currently available, return -2 + + link-up? 0= if 2drop 0 exit then \ Not associated yet. + ?reassociate \ In case if the connection is dropped + read-force +; + +: load ( adr -- len ) + link-up? 0= if drop 0 exit then \ Not associated yet. + + " obp-tftp" find-package if ( adr phandle ) + my-args rot open-package ( adr ihandle|0 ) + else ( adr ) + 0 ( adr 0 ) + then ( adr ihandle|0 ) + + dup 0= if ." Can't open obp-tftp support package" stop-nic abort then + ( adr ihandle ) + + >r + " load" r@ $call-method ( len ) + r> close-package +; + +: reset ( -- flag ) reset-nic ; + +: (scan-wifi) ( -- error? ) + true to force-open? + open + false to force-open? + 0= if ." Can't open Marvell wireless" cr true close exit then + + (scan) if + ." Failed to scan" true cr + else ( adr len ) + drop .scan false + then + + close +; + +: scan-wifi ( -- ) (scan-wifi) drop ; + +: selftest ( -- error? ) (scan-wifi) ; + +headers + + +\ LICENSE_BEGIN +\ Copyright (c) 2007 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/common.fth =================================================================== --- dev/mmc/sdhci/mv8686/common.fth (rev 0) +++ dev/mmc/sdhci/mv8686/common.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,113 @@ +purpose: Common ethernet driver stuff +\ See license at end of file + +hex +headers + +false instance value debug? + +: debug-on ( -- ) true to debug? ; + +: dma-alloc ( size -- virt ) " dma-alloc" $call-parent ; +: dma-free ( virt size -- ) " dma-free" $call-parent ; + +: usec ( us -- ) " us" evaluate ; + +: 4drop ( n1 n2 n3 n4 -- ) 2drop 2drop ; + +\ Little endian operations +: le-w@ ( a -- w ) dup c@ swap ca1+ c@ bwjoin ; +: le-w! ( w a -- ) >r wbsplit r@ ca1+ c! r> c! ; +: le-l@ ( a -- l ) >r r@ c@ r@ 1+ c@ r@ 2+ c@ r> 3 + c@ bljoin ; +: le-l! ( l a -- ) >r lbsplit r@ 3 + c! r@ 2+ c! r@ 1+ c! r> c! ; + +\ String comparision +: $= ( adr0 len0 adr1 len1 -- equal? ) + 2 pick <> if 3drop false exit then ( adr0 len0 adr1 ) + swap comp 0= +; +: /string ( adr len cnt -- adr+n len-n ) tuck - -rot + swap ; + +create mac-adr 0 c, 0 c, 0 c, 0 c, 0 c, 0 c, 0 c, 0 c, +6 constant /mac-adr +: mac-adr$ ( -- adr len ) mac-adr /mac-adr ; + +: null$ ( -- adr len ) " " ; + +\ Big endian operations +: be-w@ ( a -- w ) dup ca1+ c@ swap c@ bwjoin ; +: be-w! ( w a -- ) >r wbsplit r@ c! r> ca1+ c! ; +: be-l@ ( a -- l ) dup wa1+ be-w@ swap be-w@ wljoin ; +: be-l! ( l a -- ) >r lwsplit r@ be-w! r> wa1+ be-w! ; + +\ Dumps +: .2 ( n -- ) <# u# u# u#> type ; +: .enaddr ( adr -- ) + base @ >r d# 16 base ! ( adr len ) ( R: base ) + 5 0 do dup c@ .2 1+ ." :" loop c@ .2 + r> base ! ( ) +; +: 3u.r ( n -- ) <# bl hold u# u#s u#> type ; +: cdump ( adr len -- ) + base @ >r d# 16 base ! ( adr len ) ( R: base ) + bounds ?do i c@ 3u.r loop ( ) ( R: base ) + r> base ! ( ) +; +: ?cr ( -- ) " ??cr" evaluate ; +: vdump ( adr len -- ) debug? if " dump" evaluate else 2drop then ; +: vldump ( adr len -- ) debug? if " ldump" evaluate else 2drop then ; +: vtype ( adr len -- ) debug? if type cr else 2drop then ; + + +defer link-up? ( -- up? ) ' true to link-up? +defer reset-nic ( -- ) ' noop to reset-nic +defer start-nic ( -- ) ' noop to start-nic +defer stop-nic ( -- ) ' noop to stop-nic + +external +defer get-mac-address ( -- adr len ) ' mac-adr$ to get-mac-address +headers + +: max-frame-size ( -- size ) d# 1514 ; + +: property-or-abort ( name$ -- n ) + 2dup get-my-property if ( name$ ) + ." Can't find property " type cr stop-nic abort + then ( name$ value$ ) + 2swap 2drop decode-int nip nip ( n ) +; + +: find-fw ( $ -- adr len ) + over " rom:" comp if + " boot-read" evaluate \ Not a dropin + " loaded" evaluate + else + 4 - swap 4 + swap " find-drop-in" evaluate 0= if null$ then + then +; + +headers + +\ LICENSE_BEGIN +\ Copyright (c) 2006 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/fw8686.fth =================================================================== --- dev/mmc/sdhci/mv8686/fw8686.fth (rev 0) +++ dev/mmc/sdhci/mv8686/fw8686.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,143 @@ +purpose: Marvel 8686 firmware loader +\ See license at end of file + + +\ ======================================================================= +\ Firmware download data structures +\ ======================================================================= + +h# fedc constant FIRMWARE_READY + +fw-blksz 2 * 4 - constant /fw-tx + + +\ ========================================================================= +\ Firmware Download +\ ========================================================================= + +0 value dn-idx +0 value fw-len +0 value fw-adr +0 value fw-tx-len +0 value dn-retry + +: fw-dn-blksz ( -- blksz ) + h# 10 1 sdio-reg@ + h# 11 1 sdio-reg@ bwjoin +; +: wait-for-fw-dn-blksz ( -- blksz ) + \ Wait for the first non-zero value + d# 5000 0 do fw-dn-blksz dup ?leave drop loop + dup 0= if ." Failed to get firmware download block size" cr then +; + +: fw-download-ok? ( -- flag ) + false d# 100 0 do + sdio-scratch@ FIRMWARE_READY = if drop true leave then + d# 10 ms + loop +; + +: (download-fw) ( adr len tx-size -- error? ) + to fw-tx-len + to fw-len to fw-adr + 0 to dn-idx 0 to dn-retry + begin + fw-len dn-idx - fw-tx-len min ( len ) + fw-adr dn-idx + outbuf 2 pick move ( len ) + outbuf over sdio-fw! <> if + 4 3 1 sdio-reg! \ FN1 CFG = write iomem fail + then + sdio-poll-dl-ready 0= if true exit then + fw-dn-blksz ?dup 0= if true exit then + dup 1 and if + dn-retry 1+ dup to dn-retry + 2 > if ." Retry fail" cr true exit then + else + 0 to dn-retry + dn-idx fw-tx-len + to dn-idx + then + 1 invert and to fw-tx-len + dn-idx fw-len >= until + false +; + +: fw-image-ok? ( adr len -- flag ) 2drop true ; + +: download-fw ( adr len -- error? ) + 2dup fw-image-ok? 0= if ." Bad WLAN firmware image" cr true exit then + + wait-for-fw-dn-blksz + ?dup 0= if ." Failed to get firmware download block size" cr 2drop true exit then + + sdio-poll-dl-ready 0= if ." Helper not ready" cr 3drop true exit then + 1 invert and (download-fw) if true exit then + + fw-download-ok? 0= if true exit then + + 3 4 1 sdio-reg! \ Enable host interrupt mask + false +; + +: (download-helper) ( adr len -- error? ) + to fw-len to fw-adr + 0 to dn-idx + begin + sdio-poll-dl-ready 0= if true exit then + fw-len dn-idx - /fw-tx min ( len ) + dup outbuf le-l! ( len ) + fw-adr dn-idx + outbuf 4 + 2 pick move ( len ) + dn-idx over + to dn-idx ( len ) + outbuf swap 4 + sdio-fw! drop ( ) + dn-idx fw-len >= until + \ Write last EOF data + outbuf fw-blksz erase + outbuf fw-blksz sdio-fw! drop + false +; + +: download-helper ( adr len -- error? ) + sdio-scratch@ FIRMWARE_READY = if " Firmware downloaded" vtype 2drop true exit then + 2dup fw-image-ok? 0= if ." Bad WLAN helper image" cr true exit then + (download-helper) +; + +: load-8686-fw ( -- error? ) + wlan-helper find-fw dup if ( adr len ) + download-helper if true exit then + else ( adr len ) + 2drop ( ) + then ( ) + + wlan-fw find-fw dup if ( adr len ) + download-fw ( error? ) + else ( adr len ) + 2drop false ( error? ) + then ( error? ) +; +' load-8686-fw to load-all-fw + + +\ LICENSE_BEGIN +\ Copyright (c) 2007 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/mv8686.bth =================================================================== --- dev/mmc/sdhci/mv8686/mv8686.bth (rev 0) +++ dev/mmc/sdhci/mv8686/mv8686.bth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,48 @@ +purpose: Marvel SDIO 8686 wireless ethernet driver loader +\ See license at end of file + +command: &tokenize &this +build-now + +silent on + +begin-tokenizing mv8686.fc + +FCode-version2 + +fload ${BP}/dev/mmc/sdhci/mv8686/common.fth \ Ethernet common variables and routines +fload ${BP}/dev/mmc/sdhci/mv8686/queue.fth \ Receive queue management +fload ${BP}/dev/mmc/sdhci/mv8686/sdio.fth \ SDIO interface routines +fload ${BP}/dev/mmc/sdhci/mv8686/mv8686.fth \ SDIO I/O interface for Marvell 8686 +fload ${BP}/dev/libertas.fth \ Marvell "Libertas" common code +fload ${BP}/dev/mmc/sdhci/mv8686/fw8686.fth \ Marvell firmware download for SDIO +\ fload ${BP}/dev/mmc/sdhci/mv8686/wlan.fth \ External interface methods + +end0 + +end-tokenizing + + +\ LICENSE_BEGIN +\ Copyright (c) 2007 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/mv8686.fth =================================================================== --- dev/mmc/sdhci/mv8686/mv8686.fth (rev 0) +++ dev/mmc/sdhci/mv8686/mv8686.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,114 @@ +purpose: Transport interface for Marvel 8686 wireless ethernet driver +\ See license at end of file + +headers +hex + +\ ======================================================================= +\ Wireless environment variables +\ wlan-fw e.g., rom:mv8686.bin, disk:\mv8686.bin +\ wlan-helper e.g., rom:mvhelper.bin, disk:\mvhelper.bin +\ ======================================================================= + +: wlan-fw ( -- $ ) + " wlan-fw" " $getenv" evaluate if " rom:sd8686.bin" then +; +: wlan-helper ( -- $ ) + " wlan-helper" " $getenv" evaluate if " rom:helper_sd.bin" then +; + +\ >fw-type constants +0 constant CMD_TYPE_DATA +1 constant CMD_TYPE_CMD +3 constant CMD_TYPE_EVENT + +struct +2 field >fw-plen +2 field >fw-type +constant /fw-transport + +: packet-type ( adr -- type ) + >fw-type le-w@ case + CMD_TYPE_CMD of 0 endof + CMD_TYPE_DATA of 1 endof + CMD_TYPE_EVENT of 2 endof + endcase +; + +: cmd-out ( adr len -- error? ) + read-poll + 2dup swap >fw-plen le-w! ( len ) + CMD_TYPE_CMD 2 pick >fw-type le-w! ( len ) + + 2dup vdump ( adr len ) + packet-out ( error? ) +; + +: data-out ( adr len -- ) + read-poll + 2dup swap >fw-plen le-w! ( adr len ) + CMD_TYPE_DATA 2 pick >fw-type le-w! ( adr len ) + packet-out-async +; + +: got-packet? ( -- false | error true | buf len 0 true ) + read-poll ( ) + + get-queued? if ( buf len ) + 0 true ( buf len 0 true ) + else ( ) + false ( false ) + then +; +: recycle-packet ( -- ) recycle-queued ; + +0 value rca \ Relative card address + +: set-parent-channel ( -- ) rca my-unit set-address ; + +: release-bus-resources ( -- ) drain-queue detach-card ; + +0 value card-attached? + +: ?attach-card ( -- ok? ) + card-attached? if true exit then + attach-card dup to card-attached? ( ok? ) +; + +: make-my-properties ( -- ) + get-address dup to rca + encode-int " assigned-address" property +; + +: setup-bus-io ( /inbuf /outbuf -- error? ) + 2drop + init-queue + ?attach-card 0= if ." Fail to attach card" cr true exit then + make-my-properties + init-device + false +; + +\ LICENSE_BEGIN +\ Copyright (c) 2009 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/queue.fth =================================================================== --- dev/mmc/sdhci/mv8686/queue.fth (rev 0) +++ dev/mmc/sdhci/mv8686/queue.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,85 @@ +\ See license at end of file +purpose: Packet queue routines + +\ Maintain a linked list of packets that were received while transmitting. + +\ Since the firmware mostly uses request/response protocols, the expected +\ queue length is either 0 or 1. However, since the queue is stored as a +\ linked list with dynamically allocated and freed entries, it costs very +\ little to make the maximum size rather large. + +d# 32 constant max#queued \ Toss old packets after this number + +variable rx-queue +0 value #queued + +struct \ Queue entry +/n field >link +/n field >length + 0 field >data +constant /q-header + +: init-queue ( -- ) 0 to #queued 0 rx-queue ! ; + +\ Do not execute this is #queued is 0 +: deque-oldest ( -- handle ) + 0 rx-queue ( prev this ) + begin dup >link @ dup while ( prev this next ) + rot drop ( prev' this' ) + repeat ( prev-handle oldest-handle 0 ) + rot >link ! ( oldest-handle ) + #queued 1- to #queued +; + +: release-buffer ( handle -- ) dup >length @ /q-header + dma-free ; + +: drain-queue ( -- ) + #queued 0 ?do deque-oldest release-buffer loop +; + +: new-buffer ( packet-length -- handle adr len ) + #queued max#queued >= if deque-oldest release-buffer then + + dup /q-header + dma-alloc ( packet-length handle ) + 2dup >length ! ( packet-length handle ) + dup >data rot ( handle adr len ) +; + +: enque-buffer ( handle -- ) + rx-queue @ over >link ! rx-queue ! + #queued 1+ to #queued +; + +0 instance value loaned-handle + +: get-queued? ( -- false | adr len true ) + #queued 0= if false exit then + deque-oldest to loaned-handle ( ) + loaned-handle >data loaned-handle >length @ ( adr len ) + true +; +: recycle-queued ( -- ) loaned-handle release-buffer ; + +\ LICENSE_BEGIN +\ Copyright (c) 2006 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: dev/mmc/sdhci/mv8686/sdio.fth =================================================================== --- dev/mmc/sdhci/mv8686/sdio.fth (rev 0) +++ dev/mmc/sdhci/mv8686/sdio.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,140 @@ +purpose: SDIO interface +\ See license at end of file + +hex +headers + +0 value ioport +d# 320 constant blksz \ Block size for data tx/rx +d# 32 constant fw-blksz + +: roundup-blksz ( n -- n' ) blksz 1- + blksz / blksz * ; + +: set-address ( rca slot -- ) " set-address" $call-parent ; +: get-address ( -- rca ) " get-address" $call-parent ; +: attach-card ( -- ok? ) " attach-sdio-card" $call-parent ; +: detach-card ( -- ) " detach-sdio-card" $call-parent ; + +\ The following are CMD52 (SDIO) variants +\ Flags: 80:CRC_ERROR 40:ILLEGAL_COMMAND 30:IO_STATE (see spec) +\ 08:ERROR 04:reserved 02:INVALID_FUNCTION# 01:OUT_OF_RANGE + +h# cf constant SDIO_FLAG_MASK + +: .io-state ( flags & 30 -- ) + case + h# 00 of ." card disabled; " endof + h# 10 of ." CMD state; " endof + h# 20 of ." data transfer; " endof + h# 30 of ." reserved; " endof + endcase +; +: .sdio-flags ( flags -- ) + dup SDIO_FLAG_MASK and 0= if drop exit then + ." IO_RW_DIRECT response = " + dup h# 80 and if ." CRC error; " then + dup h# 40 and if ." illegal command; " then + dup h# 30 and .io-state + dup h# 08 and if ." error; " then + dup h# 02 and if ." invalid function; " then + dup h# 01 and if ." argument out of range" then + cr +; + +: sdio-reg@ ( reg# function# -- value ) + " io-b@" $call-parent .sdio-flags +; + +: sdio-reg! ( value reg# function# -- ) + " io-b!" $call-parent .sdio-flags +; + +: sdio-reg!@ ( value reg# function# -- value' ) + " io-b!@" $call-parent .sdio-flags +; + +: sdio-scratch@ ( -- value ) + h# 34 1 sdio-reg@ ( lo ) + h# 35 1 sdio-reg@ ( lo hi ) + bwjoin ( value ) +; + +: sdio-poll-dl-ready ( -- ready? ) + false d# 100 0 do + h# 20 1 sdio-reg@ \ card status register + h# 9 tuck and = if drop true leave then + d# 100 usec + loop + dup 0= if ." sdio-poll-dl-ready failed" cr then +; + +: sdio-blocks@ ( adr len -- actual ) + >r >r + ioport 1 true r> r> blksz true " r/w-ioblocks" $call-parent ( actual ) +; + +: sdio-blocks! ( adr len -- actual ) + >r >r ioport 1 true r> r> blksz false " r/w-ioblocks" $call-parent +; + +: packet-out ( adr len -- error? ) tuck sdio-blocks! <> ; +: packet-out-async ( adr len -- ) sdio-blocks! drop ; + +: sdio-fw! ( adr len -- actual ) + >r >r ioport 1 true r> r> fw-blksz false " r/w-ioblocks" $call-parent +; + +: rx-ready? ( -- len ) + 5 1 sdio-reg@ \ Read interrupt status reg + dup 0= if exit then + dup invert 3 and 5 1 sdio-reg! \ Clear UP_LD bit + 1 and if + sdio-scratch@ \ Read payload length + else + 0 + then +; + +: read-poll ( -- ) + begin rx-ready? ?dup while ( len ) + new-buffer ( handle adr len ) + sdio-blocks@ drop ( handle ) + enque-buffer ( ) + repeat +; + +: init-device ( -- ) + 3 0 do i 1 sdio-reg@ loop \ Read the IO port + 0 bljoin to ioport + + 7 0 sdio-reg@ h# 20 or 7 0 sdio-reg! \ Enable async interrupt mode + + 2 2 0 sdio-reg! \ Enable IO function + 3 4 0 sdio-reg! \ Enable interrupts +; + +headers + +\ LICENSE_BEGIN +\ Copyright (c) 2006 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Modified: dev/mmc/sdhci/sdhci.fth =================================================================== --- dev/mmc/sdhci/sdhci.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/mmc/sdhci/sdhci.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -12,7 +12,7 @@ \ begin-select /pci/pci11ab,4101 " sd" device-name -0 " #address-cells" integer-property +1 " #address-cells" integer-property 0 " #size-cells" integer-property " sdhci" " compatible" string-property @@ -20,6 +20,8 @@ h# 100 value /regs \ Standard size of SDHCI register block 1 value #slots +0 instance value rca + : phys+ encode-phys encode+ ; : i+ encode-int encode+ ; @@ -32,7 +34,7 @@ then h# 40 my-space + " config-b@" $call-parent ( slot_info ) - 4 rshift 7 and 1+ ( #slots ) + 4 rshift 7 and 1+ dup to #slots ( #slots ) 0 ?do 0 0 h# 0100.0010 i 4 * + my-space + phys+ 0 i+ /regs i+ \ Operational regs for slot N loop @@ -43,7 +45,8 @@ 0 value debug? -0 value chip +0 instance value slot +0 instance value chip h# 200 constant /block \ 512 bytes @@ -52,17 +55,24 @@ : map-regs ( -- ) chip if exit then - 0 0 h# 0200.0010 my-space + /regs " map-in" $call-parent + 0 0 h# 0200.0010 slot 1- 4 * + my-space + /regs " map-in" $call-parent to chip 6 4 my-w! ; : unmap-regs ( -- ) chip 0= if exit then - 0 4 my-w! +\ 0 4 my-w! chip /regs " map-out" $call-parent 0 to chip ; +external +: set-address ( rca slot -- ) to slot to rca map-regs ; +: get-address ( -- rca ) rca ; +: decode-unit ( addr len -- lun ) push-hex $number if 0 then pop-base ; +: encode-unit ( lun -- adr len ) push-hex (u.) pop-base ; +headers + : cl! ( l adr -- ) chip + rl! ; : cl@ ( adr -- l ) chip + rl@ ; : cw! ( w adr -- ) chip + rw! ; @@ -94,6 +104,7 @@ h# 7fff h# 60 cw! \ Disable internal pull-up/down on DATA3 then ; + \ Some Marvell-specific stuff : enable-sd-int ( -- ) h# 300c cl@ h# 8000.0002 or h# 300c cl! @@ -145,10 +156,23 @@ present-state@ h# 40000 and h# 40000 = ; +: ?via-quirk ( -- ) + \ This is a workaround for an odd problem with the Via Vx855 chip. + \ You have to tell it to use 1.8 V, otherwise when you tell it + \ it to use 3.3V, it will use 1.8 V instead! You only have to + \ do this 1.8V thing once after power-up to fix it until the + \ next power cycle. The "fix" survives resets; it takes a power + \ cycle to break it again. + + my-space " config-l@" $call-parent h# 95d01106 = if h# 0a h# 29 cb! then +; + : card-power-on ( -- ) \ Card power on does not work if a removal interrupt is pending h# c0 isr! \ Clear any pending insert/remove events + ?via-quirk + \ The 200.0000 bit is set if 3.0V is supported. If it is, \ use it (value c for reg 29), otherwise use 3.3V (value e). \ For now we don't handle the 1.8V possibility. @@ -221,6 +245,8 @@ 0 instance value dma-vadr 0 instance value dma-padr 0 instance value dma-len +0 instance value io-block-len +0 instance value io-#blocks : (dma-setup) ( adr #bytes block-size -- ) h# 7000 or 4 cw! ( adr #bytes ) \ Block size register @@ -240,6 +266,11 @@ dma-vadr dma-padr dma-len " dma-map-out" $call-parent ; +: iodma-setup ( adr len -- ) + io-#blocks 6 cw! ( adr len ) \ Set block count + io-block-len (dma-setup) ( ) +; + : decode-esr ( esr -- ) dup h# 8000 and if ." Vendor8, " then dup h# 4000 and if ." Vendor4, " then @@ -333,6 +364,7 @@ \ Response types: \ R1: mirrored command and status \ R3: OCR register +\ R5: 8-bit flags, 8-bit data (for CMD52) \ R6: RCA \ R2: 136 bits (CID (cmd 2 or 9) or CSD (cmd 10)) \ R7: 136 bits (Interface condition, for CMD8) @@ -356,7 +388,6 @@ 0 value scratch-buf -0 instance value rca d# 16 instance buffer: cid external @@ -467,9 +498,9 @@ : io-send-op-cond ( voltage-range -- ocr ) h# 050a 0 cmd response ; \ CMD5 R4 (SDIO) -: >io-arg ( reg# function# -- arg ) 7 and d# 28 lshift or ; +: >io-arg ( reg# function# -- arg ) 7 and d# 28 lshift swap 9 lshift or ; -\ The following are CMD52 (SDIO) variants +\ The following are CMD52 (SDIO R5) variants \ Flags: 80:CRC_ERROR 40:ILLEGAL_COMMAND 30:IO_STATE (see spec) \ 08:ERROR 04:reserved 02:INVALID_FUNCTION# 01:OUT_OF_RANGE : io-b@ ( reg# function# -- value flags ) @@ -489,37 +520,44 @@ \ These commands - io-{read,write}-{bytes,blocks} will need to be \ enclosed in a method like r/w-blocks, in order to set up the DMA hardware. -0 instance value io-block-len +: write-blksz ( blksz function# -- ) + over to io-block-len ( blksz function# ) + h# 100 * h# 11 + ( blksz reg# ) + swap wbsplit rot tuck ( blksz.lo reg# blksz.hi reg# ) + 0 io-b! drop ( blksz.lo reg# ) + 1- 0 io-b! drop ( ) +; \ In FIFO mode, the address inside the card does not autoincrement \ during the transfer. -: >io-xarg ( reg# function# fifo-mode? -- arg ) +: >io-xarg ( reg# function# inc? -- arg ) >r >io-arg r> 0= if h# 0400.0000 or then ; \ Set up memory address in caller -: io-read-bytes ( len reg# function# fifo? -- flags ) \ 1 <= len <= 512 - >io-xarg ( len arg ) - swap h# 1ff and or ( arg' ) \ Byte count +: io-read-bytes ( reg# function# inc? len -- flags ) \ 1 <= len <= 512 + >r ( reg# function# inc? r: len ) + >io-xarg ( arg r: len ) + r> h# 1ff and or ( arg' ) \ Byte count h# 353a h# 13 cmd ( ) ; -: io-read-blocks ( adr len reg# function# fifo? -- flags ) - >io-xarg h# 0800.0000 or ( len arg ) - swap io-block-len / or ( arg' ) \ Block count - h# 353a h# 37 cmd ( ) +: io-read-blocks ( reg# function# inc? -- flags ) + >io-xarg h# 0800.0000 or ( arg ) + io-#blocks or ( arg' ) \ Block count + h# 353a h# 33 cmd ( ) ; -: io-write-bytes ( len reg# function# fifo? -- flags ) - >io-xarg h# 8000.0000 or ( len arg ) - swap h# 1ff and or ( arg' ) \ Byte count +: io-write-bytes ( reg# function# inc? len -- flags ) + >r ( reg# function# inc? r: len ) + >io-xarg h# 8000.0000 or ( arg r: len ) + r> h# 1ff and or ( arg' ) \ Byte count h# 353a h# 03 cmd ; -: io-write-blocks ( len reg# function# fifo? -- flags ) - >io-xarg h# 8800.0000 or ( len arg ) - swap io-block-len / or ( arg' ) \ Block count - h# 353a h# 27 cmd +: io-write-blocks ( reg# function# inc? -- flags ) + >io-xarg h# 8800.0000 or ( arg ) + io-#blocks or ( arg' ) \ Block count + h# 353a h# 23 cmd ; - 9 instance value address-shift h# 8010.0000 value oc-mode \ Voltage settings, etc. @@ -660,9 +698,26 @@ false ; +\ -1 means error, 1 means retry +: power-up-sdio-card ( -- false | retry? true ) + intstat-on + card-power-off d# 20 ms + card-power-on d# 40 ms \ This delay is just a guess (20 was barely too slow for a Via board) + card-inserted? 0= if card-power-off intstat-off false true exit then + card-clock-slow d# 10 ms \ This delay is just a guess + reset-card \ Cmd 0 + false +; + +: set-sdio-voltage ( -- ) + 0 io-send-op-cond \ Cmd 5: get card voltage + h# ff.ffff and io-send-op-cond drop \ Cmd 5: set card voltage +; + external : attach-card ( -- okay? ) + setup-host power-up-card if ( retry? ) \ The first try at powering up failed. if ( ) @@ -688,7 +743,7 @@ card-clock-25 - get-csd \ Cmd 9 - Get card-specific data +\ get-csd \ Cmd 9 - Get card-specific data select-card \ Cmd 7 - Select @@ -700,6 +755,42 @@ true ; +: detach-card ( -- ) + card-clock-off + card-power-off +; + +: attach-sdio-card ( -- okay? ) + setup-host + power-up-sdio-card if ( retry? ) + \ The first try at powering up failed. + if ( ) + \ The card was detected, but didn't go to "powered up" state. + \ Sometimes that can be fixed by power cycling, so we retry + power-up-sdio-card if ( retry? ) + if ." SD card did not power up" cr then + false exit + then + \ The second attempt to power up the card worked + else + \ The card was not detected, so we give up + false exit + then + then + + set-sdio-voltage + get-rca \ Cmd 3 (SD) - Get relative card address + card-clock-25 + select-card \ Cmd 7 - Select + set-timeout + 4-bit + 22 7 0 io-b! \ Cmd 52 - Set 4-bit bus width and ECSI bit + h# cf and 0= +; + +: detach-sdio-card ( -- ) +; + : dma-alloc ( size -- vadr ) " dma-alloc" $call-parent ; : dma-free ( vadr size -- ) " dma-free" $call-parent ; @@ -720,11 +811,28 @@ intstat-off ; +: r/w-ioblocks ( reg# function# inc? addr len blksz in? -- actual ) + 2 pick 0= if 2drop 2drop 2drop drop 0 exit then \ Prevents hangs + intstat-on + >r ( reg# function# inc? addr len blksz r: in? ) + 2dup tuck 1- + swap / to io-#blocks ( reg# function# inc? addr len blksz r: in? ) + 4 pick write-blksz ( reg# function# inc? addr len r: in? ) + iodma-setup ( reg# function# inc? r: in? ) + wait-write-done + r> if ( reg# function# inc? ) + io-read-blocks + else + io-write-blocks ( true to writing? ) + then + 2 wait + dma-release + dma-len +\ intstat-off +; + 0 value open-count : open ( -- ) open-count 0= if - map-regs - setup-host d# 64 " dma-alloc" $call-parent to scratch-buf then open-count 1+ to open-count @@ -736,14 +844,13 @@ intstat-on wait-write-done scratch-buf d# 64 " dma-free" $call-parent - card-clock-off - card-power-off - unmap-regs then + unmap-regs open-count 1- 0 max to open-count ; : init ( -- ) + 0 1 set-address map-regs vendor-modes unmap-regs Added: dev/mmc/sdhci/sdhci2.bth =================================================================== --- dev/mmc/sdhci/sdhci2.bth (rev 0) +++ dev/mmc/sdhci/sdhci2.bth 2009-05-12 22:53:43 UTC (rev 1179) @@ -0,0 +1,29 @@ +purpose: Load file for SDHCI (Secure Digital Host Controller Interface) + +command: &tokenize &this +build-now + +silent on + +begin-tokenizing sdhci2.fc + +FCode-version2 +fload ${BP}/dev/mmc/sdhci/sdhci.fth + +init + +new-device + 1 encode-int " reg" property + " sdmmc" " $load-driver" eval drop +finish-device + +new-device + 2 encode-int " reg" property + " mv8686" " $load-driver" eval drop +finish-device + + +fload ${BP}/dev/mmc/sdhci/selftest.fth +end0 + +end-tokenizing Modified: dev/mmc/sdhci/sdmmc.fth =================================================================== --- dev/mmc/sdhci/sdmmc.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/mmc/sdhci/sdmmc.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -35,6 +35,7 @@ : dma-free ( vadr size -- ) " dma-free" $call-parent ; : open ( -- ) + 0 my-unit " set-address" $call-parent " attach-card" $call-parent 0= if false exit then " " " deblocker" $open-package ?dup if @@ -56,6 +57,7 @@ ; : close ( -- ) + " detach-card" $call-parent label-package close-package deblocker close-package ; Modified: dev/mmc/sdhci/selftest.fth =================================================================== --- dev/mmc/sdhci/selftest.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/mmc/sdhci/selftest.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -35,6 +35,7 @@ external : selftest ( -- error? ) open 0= if ." Open /sd failed" cr true exit then + 0 1 set-address attach-card 0= if ." No card inserted" cr close false exit then alloc-test-bufs ['] (selftest) catch if true then Modified: dev/usb2/device/wlan/common.fth =================================================================== --- dev/usb2/device/wlan/common.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/usb2/device/wlan/common.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -4,15 +4,6 @@ hex headers -\ Interface to /supplicant support package -0 value supplicant-ih -: $call-supplicant ( ...$ -- ... ) supplicant-ih $call-method ; -: do-associate ( -- flag ) " do-associate" $call-supplicant ; -: process-eapol ( adr len -- ) " process-eapol" $call-supplicant ; -: .scan ( adr -- ) " .scan" $call-supplicant ; - -defer ?process-eapol ['] 2drop to ?process-eapol - \ String comparision : $= ( adr0 len0 adr1 len1 -- equal? ) 2 pick <> if 3drop false exit then ( adr0 len0 adr1 ) @@ -51,9 +42,6 @@ : vtype ( adr len -- ) debug? if type cr else 2drop then ; -defer init-nic ( -- ) ' noop to init-nic -defer wrap-msg ( adr len -- adr' len' ) ' noop to wrap-msg -defer unwrap-msg ( adr len -- adr' len' ) ' noop to unwrap-msg defer link-up? ( -- up? ) ' true to link-up? defer reset-nic ( -- ) ' noop to reset-nic defer start-nic ( -- ) ' noop to start-nic @@ -65,23 +53,6 @@ : max-frame-size ( -- size ) d# 1514 ; -0 value vid -0 value pid - -0 value outbuf -d# 2048 value /outbuf \ Power of 2 larger than max-frame-size - \ Override as necessary - -d# 2048 value /inbuf \ Power of 2 larger than max-frame-size - \ Override as necessary - -: init-buf ( -- ) - outbuf 0= if /outbuf dma-alloc to outbuf then -; -: free-buf ( -- ) - outbuf if outbuf /outbuf dma-free 0 to outbuf then -; - : property-or-abort ( name$ -- n ) 2dup get-my-property if ( name$ ) ." Can't find property " type cr stop-nic abort @@ -89,18 +60,15 @@ 2swap 2drop decode-int nip nip ( n ) ; -: init ( -- ) - init - " vendor-id" property-or-abort to vid - " device-id" property-or-abort to pid +: find-fw ( $ -- adr len ) + over " rom:" comp if + " boot-read" evaluate \ Not a dropin + " loaded" evaluate + else + 4 - swap 4 + swap " find-drop-in" evaluate 0= if null$ then + then ; -: bulk-out ( adr len pipe -- error? ) - drop - " send-out" $call-parent ( qtd ) - " wait-out" $call-parent ( error? ) -; - headers \ LICENSE_BEGIN Modified: dev/usb2/device/wlan/fw8388.fth =================================================================== --- dev/usb2/device/wlan/fw8388.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/usb2/device/wlan/fw8388.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -1,7 +1,6 @@ purpose: Marvel USB 8388 firmware loader \ See license at end of file - \ ======================================================================= \ Firmware download data structures \ ======================================================================= @@ -32,7 +31,7 @@ 0 constant boot-ack-ok \ Download ok 1 constant boot-ack-fail \ Download failed -\ Bulk out transfer: USB image download +\ USB image download request structure struct 4 field >dl-cmd \ Download command 4 field >dl-ba \ Address in the device @@ -74,23 +73,22 @@ " Bad command status length" vtype false exit then ( adr ) - dup >boot-magic le-l@ boot-magic <> if ( adr ) - drop ( ) - " Bad signature" vtype ( ) - false exit - then ( adr ) - >cmd-status c@ boot-ack-ok = ( ok? ) + >boot-magic le-l@ case ( ) + 0 of false exit endof \ BOOT_CMD_RESP_FAIL + 1 of true exit endof \ BOOT_CMD_RESP_OK + 2 of false exit endof \ BOOT_CMD_RESP_NOT_SUPPORTED + endcase ; : wait-cmd-fw-dl-ack ( -- acked? ) d# 100 0 do ( ) - bulk-in-ready? if ( error | buf len 0 ) + got-packet? if ( error | buf len 0 ) if ( ) false ( acked? ) else ( buf len ) cmd-fw-dl-ok? ( acked? ) then ( acked? ) - restart-bulk-in ( acked? ) + recycle-packet ( acked? ) unloop exit then ( ) 1 ms ( ) @@ -104,7 +102,7 @@ cmd-fw-dl outbuf >boot-cmd c! 5 0 do - outbuf /boot-cmd bulk-out-pipe bulk-out drop + outbuf /boot-cmd packet-out drop wait-cmd-fw-dl-ack if leave then loop ; @@ -118,9 +116,9 @@ : wait-fw-dl-ack ( -- ) d# 500 0 do ( ) - bulk-in-ready? if ( error | buf len 0 ) + got-packet? if ( error | buf len 0 ) 0= if process-dl-resp then ( ) - restart-bulk-in ( ) + recycle-packet ( ) leave then ( ) 1 ms ( ) @@ -134,7 +132,7 @@ dl-seq outbuf >dl-seq le-l! \ Add sequence number to outbuf dup /dl-header + outbuf >dl-data 2 pick >dl-len le-l@ dup >r move \ Move payload to outbuf - outbuf r@ /dl-header + 4 + bulk-out-pipe bulk-out drop + outbuf r@ /dl-header + 4 + packet-out drop \ Send command wait-fw-dl-ack \ Wait for ACK r> + /dl-header + \ Advance pointer @@ -170,18 +168,21 @@ ." Unexpected event while waiting for firmware-started" cr then ; -: download-fw ( adr len -- ) - driver-state ds-not-ready <> if " Firmware downloaded" vtype 2drop exit then - 2dup fw-image-ok? 0= if ." Bad WLAN firmware image" cr exit then +: download-fw ( adr len -- error? ) + 2dup fw-image-ok? 0= if ." Bad WLAN firmware image" cr true exit then download-fw-init (download-fw) wait-fw + false +; - ds-ready to driver-state - marvel-get-mac-address +: load-8388-fw ( -- error? ) + wlan-fw find-fw ( adr len ) + dup if download-fw else 2drop true then ; +' load-8388-fw to load-all-fw \ LICENSE_BEGIN \ Copyright (c) 2007 FirmWorks Modified: dev/usb2/device/wlan/usb8388.bth =================================================================== --- dev/usb2/device/wlan/usb8388.bth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/usb2/device/wlan/usb8388.bth 2009-05-12 22:53:43 UTC (rev 1179) @@ -12,9 +12,10 @@ fload ${BP}/dev/usb2/device/common.fth \ USB device driver common routines fload ${BP}/dev/usb2/device/wlan/common.fth \ Ethernet common variables and routines -fload ${BP}/dev/usb2/device/wlan/usb8388.fth \ Marvel USB 8388 driver -fload ${BP}/dev/usb2/device/wlan/fw8388.fth \ Marvel firmware download -fload ${BP}/dev/usb2/device/wlan/wlan.fth \ USB wireless ethernet driver +fload ${BP}/dev/usb2/device/wlan/usb8388.fth \ USB I/O interface for Marvell 8388 +fload ${BP}/dev/libertas.fth \ Marvell "Libertas" common code +\ fload ${BP}/dev/usb2/device/wlan/wlan.fth \ External interface methods +fload ${BP}/dev/usb2/device/wlan/fw8388.fth \ Marvell firmware download for USB end0 Modified: dev/usb2/device/wlan/usb8388.fth =================================================================== --- dev/usb2/device/wlan/usb8388.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/usb2/device/wlan/usb8388.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -1,19 +1,20 @@ -purpose: Marvel USB 8388 wireless ethernet driver +purpose: USB transport interface for Marvel USB 8388 wireless ethernet driver \ See license at end of file headers hex -\ **************** WPA and WPA2 are not functional yet ****************** +\ Used by cmd-out below and also by firmware download routine +: packet-out ( adr len -- error? ) + " send-out" $call-parent ( qtd ) + " wait-out" $call-parent ( error? ) +; +: packet-out-async ( adr len -- ) + " send-out" $call-parent ( qtd ) + drop +; \ ======================================================================= -\ Usage: -\ -\ Before probe-pci, reset-wlan. -\ Before using the driver, set wlan-* environment variables. -\ ======================================================================= - -\ ======================================================================= \ Wireless environment variables \ wlan-fw e.g., rom:usb8388.bin, disk:\usb8388.bin \ ======================================================================= @@ -22,1506 +23,69 @@ " wlan-fw" " $getenv" evaluate if " rom:usb8388.bin" then ; -\ ======================================================================= -\ Driver variables -\ ======================================================================= - -\ driver-state bit definitions -0000 constant ds-not-ready \ Initial state -0001 constant ds-ready \ Firmware has been downloaded -0010 constant ds-connected-mask \ Associated or joined -0010 constant ds-associated -8000 constant ds-disconnected \ Disconnected - -ds-not-ready value driver-state - -: set-driver-state ( bit-mask -- ) driver-state or to driver-state ; -: reset-driver-state ( bit-mask -- ) invert driver-state and to driver-state ; - -\ bss-type values -1 constant bss-type-managed -2 constant bss-type-adhoc -bss-type-managed value bss-type - -\ WPA/WPA2 keys -0 value ktype \ Key type -0 value ctype-g \ Group (multicast) cipher type -0 value ctype-p \ Pairwise (unicast) cipher type - -\ ktype values -0 constant kt-wep -1 constant kt-wpa -2 constant kt-wpa2 -h# ff constant kt-none - -\ ctype-x values -0 constant ct-none -1 constant ct-tkip -2 constant ct-aes - -\ WEP keys -1 constant TYPE_WEP_40_BIT -2 constant TYPE_WEP_104_BIT - -0 value wep-idx -d# 13 buffer: wep1 0 constant /wep1 -d# 13 buffer: wep2 0 constant /wep2 -d# 13 buffer: wep3 0 constant /wep3 -d# 13 buffer: wep4 0 constant /wep4 -: wep1$ ( -- $ ) wep1 /wep1 ; -: wep2$ ( -- $ ) wep2 /wep2 ; -: wep3$ ( -- $ ) wep3 /wep3 ; -: wep4$ ( -- $ ) wep4 /wep4 ; - -/mac-adr buffer: target-mac -: target-mac$ ( -- $ ) target-mac /mac-adr ; - -0 value #mc-adr \ Actual number of set multicast addresses -d# 32 dup constant #max-mc-adr \ Maximum number of multicast addresses -/mac-adr * dup constant /mc-adrs - buffer: mc-adrs \ Buffer of multicast addresses - -d# 256 buffer: ssid -0 value /ssid -: ssid$ ( -- $ ) ssid /ssid ; - -0 value channel - -d# 80 buffer: wpa-ie \ WPA IE saved for EAPOL phases -0 value /wpa-ie - -external -: wpa-ie$ ( -- adr len ) wpa-ie /wpa-ie ; -headers - -\ Data rates -d# 14 constant #rates -create supported-rates 82 c, 84 c, 8b c, 96 c, 0c c, 12 c, 18 c, 24 c, - 30 c, 48 c, 60 c, 6c c, 00 c, 00 c, -#rates buffer: common-rates - -external -: supported-rates$ ( -- adr len ) supported-rates #rates ; -: set-common-rates ( adr len -- ) - common-rates #rates erase - #rates min common-rates swap move -; -headers - -\ Miscellaneous -0 value preamble \ 0=long, 2=short, 4=auto -0 value auth-mode \ 0: open; 1: shared key; 2: EAP -h# 401 value cap \ Capabilities -3 instance value mac-ctrl \ MAC control - -external -: set-preamble ( preamble -- ) to preamble ; -: set-cap ( cap -- ) to cap ; -: set-auth-mode ( amode -- ) to auth-mode ; -headers - -: marvel-link-up? ( -- flag ) driver-state ds-ready > ; - -' marvel-link-up? to link-up? - -\ ========================================================================= -\ Firmware Command -\ ========================================================================= - struct - 4 field >fw-req \ Command request type - 2 field >fw-cmd \ Start of command header - 2 field >fw-len - 2 field >fw-seq - 2 field >fw-result -dup constant /fw-cmd -dup 4 - constant /fw-cmd-hdr \ Command header len (less >fw-req) - 0 field >fw-data \ Command payload starts here -drop +4 field >fw-transport +constant /fw-transport -\ >fw-req constants -h# f00d.face constant CMD_TYPE_REQUEST -h# bead.c0de constant CMD_TYPE_DATA -h# beef.face constant CMD_TYPE_INDICATION +\ >fw-transport constants for USB/8388 +h# f00d.face constant TYPE_USB_REQUEST +h# bead.c0de constant TYPE_USB_DATA +h# beef.face constant TYPE_USB_INDICATION -0 constant ACTION_GET -1 constant ACTION_SET -2 constant ACTION_ADD -3 constant ACTION_HALT -4 constant ACTION_REMOVE -8 constant ACTION_USE_DEFAULT - --1 value fw-seq - -: fw-seq++ ( -- seq ) fw-seq 1+ dup to fw-seq ; - -d# 30 constant resp-wait-tiny -d# 1,000 constant resp-wait-short -d# 10,000 constant resp-wait-long -resp-wait-short instance value resp-wait - -/inbuf instance buffer: respbuf -0 instance value /respbuf - -\ ========================================================================= -\ Transmit Packet Descriptor -\ ========================================================================= - -struct - 4 + \ >fw-req - 4 field >tx-stat - 4 field >tx-ctrl - 4 field >tx-offset - 2 field >tx-len - 6 field >tx-mac - 1 field >tx-priority - 1 field >tx-pwr - 1 field >tx-delay \ in 2ms - 1+ - 1+ \ tx-mesh must be 0 - 1+ \ tx-mesh must be 0 - 1 field >tx-mesh-ttl - 1+ \ Just for alignment - 0 field >tx-pkt -constant /tx-hdr - -0 constant tx-ctrl \ Tx rates, etc - -\ The Libertas FW is currently abusing the WDS flag to mean "send on the mesh". -\ At some point a separate mesh flag might be defined ... -h# 20000 constant TX_WDS - -: mesh-on? ( -- flag ) tx-ctrl TX_WDS and 0<> ; - -: wrap-pkt ( adr len -- adr' len' ) - outbuf /tx-hdr erase ( adr len ) - over outbuf >tx-mac /mac-adr move ( adr len ) - dup outbuf >tx-len le-w! ( adr len ) - tuck outbuf >tx-pkt swap move ( len ) - - CMD_TYPE_DATA outbuf >fw-req le-l! ( len ) - /tx-hdr 4 - outbuf >tx-offset le-l! ( len ) \ Offset from >tx-ctrl field - tx-ctrl outbuf >tx-ctrl le-l! ( len ) - - mesh-on? if 1 outbuf >tx-mesh-ttl c! then ( len ) - - outbuf swap /tx-hdr + ( adr' len' ) +: cmd-out ( adr len -- error? ) + TYPE_USB_REQUEST 2 pick >fw-transport le-l! ( adr len ) + 2dup vdump ( adr len ) + packet-out ( error? ) ; -' wrap-pkt to wrap-msg -\ ========================================================================= -\ Receive Packet Descriptor -\ ========================================================================= - -true instance value got-data? -0 instance value /data -0 instance value data - -\ Receive packet descriptor -struct - 4 + \ >fw-req - 2 field >rx-stat - 1 field >rx-snr - 1 field >rx-ctrl - 2 field >rx-len - 1 field >rx-nf - 1 field >rx-rate - 4 field >rx-offset - 4 + - 1 field >rx-priority - 3 + -\ dup constant /rx-desc -\ 6 field >rx-dst-mac -\ 6 field >rx-src-mac -\ 0 field >rx-data-no-snap -\ 2 field >rx-pkt-len \ pkt len from >rx-snap-hdr -\ 6 field >rx-snap-hdr -\ 0 field >rx-data -d# 22 + \ Size of an Ethernet header with SNAP -constant /rx-min - -\ >rx-stat constants -1 constant rx-stat-ok -2 constant rx-stat-multicast - -: snap-header " "(aa aa 03 00 00 00)" ; - -: rx-rate$ ( -- adr len ) " 1 25.5 11 ? 6 9 12 18 24 36 48 54 ? ? ?" ; -: .rx-rate ( rate -- ) h# f and 3 * rx-rate$ drop + 3 type ; - -: .rx-desc ( adr -- ) - debug? 0= if drop exit then - ?cr - ." Rx status: " dup >rx-stat le-w@ u. cr - ." Rx offset: " dup >rx-offset le-l@ u. cr - ." Rx len: " dup >rx-len le-w@ u. cr - ." Rx SNR: " dup >rx-snr c@ .d ." dB" cr - ." Rx noise floor: -" dup >rx-nf c@ .d ." dBm" cr - ." Rx rate: " dup >rx-rate c@ .rx-rate ." Mbps" cr - ." Rx priority: " dup >rx-priority c@ u. cr - drop +: data-out ( adr len -- ) + TYPE_USB_DATA 2 pick >fw-transport le-l! ( adr len ) + packet-out-async ; -: unwrap-pkt ( adr len -- data-adr data-len ) - /rx-min < if drop 0 0 then \ Invalid packet: too small - - \ Go to the payload, skipping the descriptor header - dup dup >rx-offset le-l@ + la1+ ( adr data-adr ) - swap >rx-len le-w@ ( data-adr data-len ) - - \ Remove snap header by moving the MAC addresses up - \ That's faster than moving the contents down - over d# 14 + snap-header comp 0= if ( data-adr data-len ) - over dup 8 + d# 12 move ( data-adr data-len ) - 8 /string ( adr' len' ) - then -; - -: process-data ( adr len -- ) - 2dup vdump ( adr len ) - over .rx-desc ( adr len ) - - over >rx-stat le-w@ rx-stat-ok <> if 2drop exit then - - unwrap-pkt to /data to data ( ) - - true to got-data? \ do-process-eapol may unset this - - \ Check the Ethernet type field for EAPOL messages - data d# 12 + be-w@ h# 888e = if \ Pass EAPOL messages to supplicant - data /data ?process-eapol - then -; - -: do-process-eapol ( adr len -- ) false to got-data? process-eapol ; - -\ ========================================================================= -\ Generic commands & responses -\ ========================================================================= - -0 value x \ Temporary variables to assist command creation -0 value /x - -: set-fw-data-x ( -- ) outbuf >fw-data to x 0 to /x ; -: 'x ( -- adr ) x /x + ; -: +x ( n -- ) /x + to /x ; -: +x$ ( $ -- ) 'x swap dup +x move ; -: +xl ( n -- ) 'x le-l! /l +x ; -: +xw ( n -- ) 'x le-w! /w +x ; -: +xb ( n -- ) 'x c! /c +x ; -: +xbl ( n -- ) 'x be-l! /l +x ; -: +xerase ( n -- ) 'x over erase +x ; - -: outbuf-bulk-out ( dlen -- error? ) - /fw-cmd + outbuf swap ( adr len ) - 2dup vdump bulk-out-pipe ( adr len ) - bulk-out ( error? ) -; - -: .cmd ( cmd -- ) - debug? 0= if drop exit then - ?cr - case - 0003 of ." CMD_GET_HW_SPEC" endof - 0005 of ." CMD_802_11_RESET" endof - 0006 of ." CMD_802_11_SCAN" endof - 000b of ." CMD_802_11_GET_LOG" endof - 0010 of ." CMD_MAC_MULTICAST_ADR" endof - 0011 of ." CMD_802_11_AUTHENTICATE" endof - 0013 of ." CMD_802_11_SET_WEP" endof - 0016 of ." CMD_802_11_SNMP_MIB" endof - 0019 of ." CMD_MAC_REG_ACCESS" endof - 001a of ." CMD_BBP_REG_ACCESS" endof - 001b of ." CMD_RF_REG_ACCESS" endof - 001c of ." CMD_802_11_RADIO_CONTROL" endof - 001d of ." CMD_802_11_RF_CHANNEL" endof - 001e of ." CMD_802_11_TX_POWER" endof - 001f of ." CMD_802_11_RSSI" endof - 0020 of ." CMD_802_11_RF_ANTENNA" endof - 0021 of ." CMD_802_11_PS_MODE" endof - 0022 of ." CMD_802_11_DATA_RATE" endof - 0024 of ." CMD_802_11_DEAUTHENTICATE" endof - 0026 of ." CMD_802_11_DISASSOCIATE" endof - 0028 of ." CMD_MAC_CONTROL" endof - 002b of ." CMD_802_11_AD_HOC_START" endof - 002c of ." CMD_802_11_AD_HOC_JOIN" endof - 002f of ." CMD_802_11_ENABLE_RSN" endof - 003e of ." CMD_802_11_DEEP_SLEEP" endof - 0040 of ." CMD_802_11_AD_HOC_STOP" endof - 0043 of ." CMD_802_11_HOST_SLEEP_CFG" endof - 0044 of ." CMD_802_11_WAKEUP_CONFIRM" endof - 004c of ." CMD_802_11_RGN_CODE" endof - 004d of ." CMD_802_11_MAC_ADDR" endof - 0050 of ." CMD_802_11_ASSOCIATE" endof - 0058 of ." CMD_802_11_BAND_CONFIG" endof - 0059 of ." CMD_EEPROM_ACCESS" endof - 005a of ." CMD_GSPI_BUS_CONFIG" endof - 005b of ." CMD_802_11D_DOMAIN_INFO" endof - 005c of ." CMD_WMM_ACK_POLICY" endof - 005e of ." CMD_802_11_KEY_MATERIAL" endof - 005f of ." CMD_802_11H_TPC_INFO" endof - 0060 of ." CMD_802_11H_TPC_ADAPT_REQ" endof - 0061 of ." CMD_802_11H_CHAN_SW_ANN" endof - 0062 of ." CMD_802_11H_MEASUREMENT_REQUEST" endof - 0063 of ." CMD_802_11H_GET_MEASUREMENT_REPORT" endof - 0066 of ." CMD_802_11_SLEEP_PARAMS" endof - 0068 of ." CMD_802_11_SLEEP_PERIOD" endof - 0069 of ." CMD_802_11_BCA_CONFIG_TIMESHARE" endof - 006b of ." CMD_802_11_BG_SCAN_CONFIG" endof - 006c of ." CMD_802_11_BG_SCAN_QUERY" endof - 006d of ." CMD_802_11_CAL_DATA_EXT" endof - 0071 of ." CMD_WMM_GET_STATUS" endof - 0072 of ." CMD_802_11_TPC_CFG" endof - 0073 of ." CMD_802_11_PA_CFG" endof - 0074 of ." CMD_802_11_FW_WAKE_METHOD" endof - 0075 of ." CMD_802_11_SUBSCRIBE_EVENT" endof - 0076 of ." CMD_802_11_RATE_ADAPT_RATESET" endof - 007f of ." CMD_TX_RATE_QUERY" endof - ( default ) ." Unknown command: " dup u. +\ Translate the USB/8388 type codes into more abstract codes, which +\ happen to be the codes used by the 8686 +: packet-type ( adr -- type ) + >fw-transport le-l@ case + TYPE_USB_REQUEST of 0 endof + TYPE_USB_DATA of 1 endof + TYPE_USB_INDICATION of 2 endof endcase - cr ; -: prepare-cmd ( len cmd -- ) - dup .cmd - resp-wait-short to resp-wait - outbuf 2 pick /fw-cmd + erase ( len cmd ) - CMD_TYPE_REQUEST outbuf >fw-req le-l! ( len cmd ) - ( cmd ) outbuf >fw-cmd le-w! ( len ) - ( len ) /fw-cmd-hdr + outbuf >fw-len le-w! ( ) - fw-seq++ outbuf >fw-seq le-w! ( ) - 0 outbuf >fw-result le-w! ( ) - set-fw-data-x ( ) -; -: start-cmd ( cmd -- ) - dup .cmd - resp-wait-short to resp-wait - outbuf to x 0 to /x - CMD_TYPE_REQUEST +xl ( cmd ) - ( cmd ) +xw ( ) - 0 +xw ( ) \ Set len later - fw-seq++ +xw ( ) - 0 +xw ( ) -; -: finish-cmd ( -- len ) - /x 4 - outbuf 6 + le-w! \ Set len field - /x -; +: got-packet? ( -- false | error true | buf len 0 true ) bulk-in-ready? ; +: recycle-packet ( -- ) restart-bulk-in ; -true value got-response? -true value got-indicator? +: end-out-ring ( -- ) " end-out-ring" $call-parent ; -: process-disconnect ( -- ) ds-disconnected set-driver-state ; -: process-wakeup ( -- ) ; -: process-sleep ( -- ) ; -: process-pmic-failure ( -- ) ; -: process-gmic-failure ( -- ) ; +: set-parent-channel ( -- ) device set-target ; -: .event ?cr ." Event: " type cr ; -0 instance value last-event -: process-ind ( adr len -- ) - drop - true to got-indicator? - 4 + le-l@ dup to last-event - case - h# 00 of " Tx PPA Free" .event endof \ n - h# 01 of " Tx DMA Done" .event endof \ n - h# 02 of " Link Loss with scan" .event process-disconnect endof - h# 03 of " Link Loss no scan" .event process-disconnect endof - h# 04 of " Link Sensed" .event endof - h# 05 of " CMD Finished" .event endof - h# 06 of " MIB Changed" .event endof - h# 07 of " Init Done" .event endof - h# 08 of " Deauthenticated" .event process-disconnect endof - h# 09 of " Disassociated" .event process-disconnect endof - h# 0a of " Awake" .event process-wakeup endof - h# 0b of " Sleep" .event process-wakeup endof - h# 0d of " Multicast MIC error" .event process-gmic-failure endof - h# 0e of " Unicast MIC error" .event process-pmic-failure endof - h# 0e of " WM awake" .event endof \ n - h# 11 of " HWAC - adhoc BCN lost" .event endof - h# 19 of " RSSI low" .event endof - h# 1a of " SNR low" .event endof - h# 1b of " Max fail" .event endof - h# 1c of " RSSI high" .event endof - h# 1d of " SNR high" .event endof - h# 23 of endof \ Suppress this; the user doesn't need to see it - \ h# 23 of ." Mesh auto-started" endof - h# 30 of endof \ Handle this silently -\ h# 30 of " Firmware ready" .event endof - ( default ) ." Unknown " dup u. - endcase +: setup-bus-io ( /inbuf /outbuf -- error? ) + 4 bulk-out-pipe " begin-out-ring" $call-parent ( /inbuf ) + h# 40 bulk-in-pipe " begin-in-ring" $call-parent + false ; -: process-request ( adr len -- ) - 2dup vdump ( adr len ) - to /respbuf ( adr ) - respbuf /respbuf move ( ) - true to got-response? ( ) -; +: release-bus-resources ( -- ) end-bulk-in end-out-ring ; -: process-rx ( adr len -- ) - over >fw-req le-l@ case - CMD_TYPE_REQUEST of process-request endof \ Response & request - CMD_TYPE_DATA of process-data endof \ Data - CMD_TYPE_INDICATION of process-ind endof \ Indication - ( default ) >r vdump r> - endcase -; -: check-for-rx ( -- ) - bulk-in-ready? if ( error | buf len 0 ) - 0= if process-rx then ( ) - restart-bulk-in ( ) - then ( ) -; +0 value vid +0 value pid -\ : xcheck-for-rx ( -- ) -\ bulk-in? if ( actual ) -\ drop restart-bulk-in exit \ USB error -\ else ( actual ) -\ ?dup if ( actual ) -\ inbuf respbuf rot dup to /respbuf move -\ restart-bulk-in -\ respbuf /respbuf process-rx -\ then -\ then -\ ; - -\ -1 error, 0 okay, 1 retry -: wait-cmd-resp ( -- -1|0|1 ) - false to got-response? - resp-wait 0 do - check-for-rx - got-response? if leave then - 1 ms - loop - got-response? if - respbuf >fw-result le-w@ case - 0 of 0 endof \ No error - 4 of 1 endof \ Busy, so retry - ( default ) ." Result = " dup u. cr dup - endcase - else -\ ." Timeout or USB error" cr - true +: init ( -- ) + init + " vendor-id" property-or-abort to vid + " device-id" property-or-abort to pid + set-parent-channel + configuration set-config if + ." Failed to set USB configuration for wireless" cr then ; -: wait-event ( -- true | event false ) - false to got-indicator? - d# 1000 0 do - check-for-rx - got-indicator? if last-event false unloop exit then - 1 ms - loop - true -; -: outbuf-wait ( len -- error? ) - outbuf-bulk-out ?dup if exit then - wait-cmd-resp -; +init -\ ========================================================================= -\ Dumps -\ ========================================================================= - -: .fw-cap ( cap -- ) - ." 802.11" - dup h# 400 and if ." a" then - dup h# 100 and if ." b" then - dup h# 200 and if ." g" then ." ;" - dup h# 1 and if ." WPA;" then - dup h# 2 and if ." PS;" then - dup h# 8 and if ." EEPROM does not exit;" then - dup h# 30 and case - h# 00 of ." TX antanna 0;" endof - h# 10 of ." TX antenna 1;" endof - ( default ) ." TX diversity; " - endcase - h# c0 and case - h# 00 of ." RX antenna 0;" endof - h# 40 of ." RX antenna 1;" endof - ( default ) ." RX diversity;" - endcase -; - -: .log ( adr -- ) - dup >fw-len le-w@ /fw-cmd-hdr = if drop exit then - ." Multicast txed: " dup >fw-data le-l@ u. cr - ." Failed: " dup >fw-data 4 + le-l@ u. cr - ." Retry: " dup >fw-data 8 + le-l@ u. cr - ." Multiple retry: " dup >fw-data h# c + le-l@ u. cr - ." Duplicate frame rxed: " dup >fw-data h# 10 + le-l@ u. cr - ." Successful RTS: " dup >fw-data h# 14 + le-l@ u. cr - ." Failed RTS: " dup >fw-data h# 18 + le-l@ u. cr - ." Failed ACK: " dup >fw-data h# 1c + le-l@ u. cr - ." Fragment rxed: " dup >fw-data h# 20 + le-l@ u. cr - ." Multicast rxed: " dup >fw-data h# 24 + le-l@ u. cr - ." FCS error: " dup >fw-data h# 28 + le-l@ u. cr - ." Frame txed: " dup >fw-data h# 2c + le-l@ u. cr - ." WEP undecryptable: " dup >fw-data h# 30 + le-l@ u. cr - drop -; - - -\ ========================================================================= -\ Reset -\ ========================================================================= - -: reset-wlan ( -- ) " wlan-reset" evaluate ; - -: marvel-get-hw-spec ( -- true | adr false ) - d# 38 h# 03 ( CMD_GET_HW_SPEC ) prepare-cmd - d# 38 outbuf-bulk-out ?dup if true exit then - resp-wait-tiny to resp-wait - wait-cmd-resp if true exit then - - respbuf >fw-data false -; - -\ The purpose of this is to work around a problem that I don't fully understand. -\ For some reason, when you reopen the device without re-downloading the -\ firmware, the first command silently fails - you don't get a response. -\ This is a "throwaway" command to handle that case without a long timeout -\ or a warning message. - -: nonce-cmd ( -- ) marvel-get-hw-spec 0= if drop then ; - -\ ========================================================================= -\ MAC address -\ ========================================================================= - -: marvel-get-mac-address ( -- ) - 8 h# 4d ( CMD_802_11_MAC_ADDRESS ) prepare-cmd - ACTION_GET +xw - 8 outbuf-wait if ." marvel-get-mac-address failed" cr exit then - respbuf >fw-data 2 + mac-adr$ move -; - -: marvel-set-mac-address ( -- ) - 8 h# 4d ( CMD_802_11_MAC_ADDRESS ) prepare-cmd - ACTION_SET +xw - mac-adr$ +x$ - 8 outbuf-wait if exit then -; - -: marvel-get-mc-address ( -- ) - 4 /mc-adrs + h# 10 ( CMD_MAC_MULTICAST_ADR ) prepare-cmd - ACTION_GET +xw - 4 /mc-adrs + outbuf-wait if exit then - respbuf >fw-data 2 + le-w@ to #mc-adr - respbuf >fw-data 4 + mc-adrs #mc-adr /mac-adr * move -; - -: marvel-set-mc-address ( adr len -- ) - 4 /mc-adrs + h# 10 ( CMD_MAC_MULTICAST_ADR ) prepare-cmd - ACTION_SET +xw - dup /mac-adr / dup +xw \ Number of multicast addresses - to #mc-adr - ( adr len ) 2dup +x$ \ Multicast addresses - mc-adrs swap move - 4 /mc-adrs + outbuf-wait if exit then -; - -\ ========================================================================= -\ Register access -\ ========================================================================= - -: reg-access@ ( reg cmd -- n ) - 8 swap prepare-cmd - ACTION_GET +xw - ( reg ) +xw - 8 outbuf-wait if 0 exit then - respbuf >fw-data 4 + le-l@ -; - -: bbp-reg@ ( reg -- n ) - 1a ( CMD_BBP_REG_ACCESS ) reg-access@ h# ff and -; -: rf-reg@ ( reg -- n ) - 1b ( CMD_RF_REG_ACCESS ) reg-access@ h# ff and -; -: mac-reg@ ( reg -- n ) - 19 ( CMD_MAC_REG_ACCESS ) reg-access@ -; -: eeprom-l@ ( idx -- n ) - a 59 ( CMD_EEPROM_ACCESS ) prepare-cmd - ACTION_GET +xw - ( idx ) +xw - 4 +xw - a outbuf-wait if 0 exit then - respbuf >fw-data 6 + le-l@ -; - -\ ========================================================================= -\ Miscellaneous control settings -\ ========================================================================= - -: set-radio-control ( -- ) - 4 h# 1c ( CMD_802_11_RADIO_CONTROL ) prepare-cmd - ACTION_SET +xw - preamble 1 or +xw \ Preamble, RF on - 4 outbuf-wait if exit then -; - -: (set-bss-type) ( bsstype -- ok? ) - 6 d# 128 + h# 16 ( CMD_802_11_SNMP_MIB ) prepare-cmd - ACTION_SET +xw - 0 +xw \ Object = desiredBSSType - 1 +xw \ Size of object - ( bssType ) +xb - 6 d# 128 + outbuf-wait 0= -; - -external -: set-bss-type ( bssType -- ok? ) dup to bss-type (set-bss-type) ; -headers - -: (set-mac-control) ( -- error? ) - 4 h# 28 ( CMD_MAC_CONTROL ) prepare-cmd - mac-ctrl +xw \ WEP type, WMM, protection, multicast, promiscous, WEP, tx, rx - 4 outbuf-wait -; - -: set-mac-control ( -- error? ) - (set-mac-control) if - (set-mac-control) drop - then -; - -: set-domain-info ( adr len -- ) - dup 6 + h# 5b ( CMD_802_11D_DOMAIN_INFO ) prepare-cmd - ACTION_SET +xw - 7 +xw \ Type = MrvlIETypes_DomainParam_t - ( len ) dup +xw \ Length of payload - ( adr len ) tuck +x$ \ Country IE - ( len ) 6 + outbuf-wait if exit then -; - -: enable-11d ( -- ) - 6 d# 128 + h# 16 ( CMD_802_11_SNMP_MIB ) prepare-cmd - ACTION_SET +xw - 9 +xw \ Object = enable 11D - 2 +xw \ Size of object - 1 +xw \ Enable 11D - 6 d# 128 + outbuf-wait if exit then -; - -external -: enforce-protection ( -- ) - mac-ctrl h# 400 or to mac-ctrl \ Enforce protection - set-mac-control -; - -: disable-protection ( -- ) - mac-ctrl h# 400 invert and to mac-ctrl - set-mac-control -; - -: set-key-type ( ctp ctg ktype -- ) to ktype to ctype-g to ctype-p ; - -: set-country-info ( adr len -- ) \ IEEE country IE - set-domain-info - enable-11d -; - -: enable-promiscuous ( -- ) - mac-ctrl h# 80 or to mac-ctrl - set-mac-control -; -: disable-promiscuous ( -- ) - mac-ctrl h# 80 invert and to mac-ctrl - set-mac-control -; - -: enable-multicast ( -- ) - mac-ctrl h# 20 or to mac-ctrl - set-mac-control -; -: disable-multicast ( -- ) - mac-ctrl h# 20 invert and to mac-ctrl - set-mac-control -; -: set-multicast ( adr len -- ) marvel-set-mc-address enable-multicast ; - -: mac-off ( -- ) - 0 to mac-ctrl set-mac-control 3 to mac-ctrl -; -headers - -\ ========================================================================= -\ Scan -\ ========================================================================= - -1 constant #probes - -d# 14 constant #channels - -[ifdef] notdef -struct - 2 field >type-id - 2 field >/payload -dup constant /marvel-IE-hdr - 2 field >probes -constant /probes-IE - -struct - 1 field >radio-type - 1 field >channel# - 1 field >scan-type - 2 field >min-scan-time - 2 field >max-scan-time -constant /chan-list - -struct - /marvel-IE-hdr + - #channels /chan-list * field >chan-list -constant /chan-list-IE - -struct - /marvel-IE-hdr + - d# 34 field >ssid -constant /ssid-IE - -struct - 1 field >bss-type - 6 field >bss-id - /chan-list-IE field >chan-list-IE - /probes-IE field >probes-IE -constant /cmd_802_11_scan -[then] - -1 constant BSS_INDEPENDENT -2 constant BSS_INFRASTRUCTURE -3 constant BSS_ANY - -\ OUI values (big-endian) -h# 0050.f201 constant wpa-tag \ WPA tag -h# 0050.f202 constant moui-tkip \ WPA cipher suite TKIP -h# 0050.f204 constant moui-aes \ WPA cipher suite AES -h# 000f.ac02 constant oui-tkip \ WPA2 cipher suite TKIP -h# 000f.ac04 constant oui-aes \ WPA2 cipher suite AES -h# 000f.ac02 constant aoui \ WPA2 authentication suite -h# 0050.f202 constant amoui \ WPA authentication suite - - -d# 34 instance buffer: scan-ssid - -0 value scan-type -: active-scan ( -- ) 0 to scan-type ; -: passive-scan ( -- ) 1 to scan-type ; - -[ifdef] notdef -: make-chan-list-param ( adr -- ) - #channels 0 do - dup i /chan-list * + - 0 over >radio-type c! - i 1+ over >channel# c! - scan-type over >scan-type c! - d# 100 over >min-scan-time le-w! - d# 100 swap >max-scan-time le-w! - loop drop -; - -: (oldscan) ( -- error? | adr len 0 ) - /cmd_802_11_scan scan-ssid c@ if - /marvel-IE-hdr + scan-ssid c@ + - then - 6 ( CMD_802_11_SCAN ) prepare-cmd ( ) - resp-wait-long to resp-wait ( ) - BSS_ANY outbuf >fw-data tuck >bss-type c! ( 'fw-data ) - - dup >chan-list-IE ( 'fw-data 'chan-list ) - h# 101 over >type-id le-w! ( 'fw-data 'chan-list ) - #channels /chan-list * over >/payload le-w! ( 'fw-data 'chan-list ) - >chan-list make-chan-list-param ( 'fw-data ) - - dup >probes-IE ( 'fw-data 'probes ) - h# 102 over >type-id le-w! ( 'fw-data 'probes ) - 2 over >/payload le-w! ( 'fw-data 'probes ) - #probes swap >probes le-w! ( 'fw-data ) - - scan-ssid c@ if ( 'fw-data ) - \ Attach an SSID TLV to filter the result - /cmd_802_11_scan + ( 'ssid ) - h# 000 over >type-id le-w! ( 'ssid ) - scan-ssid c@ over >/payload le-w! ( 'ssid ) - scan-ssid count rot /marvel-IE-hdr + swap move ( ) - /cmd_802_11_scan /marvel-IE-hdr scan-ssid c@ + + ( cmdlen ) - else ( 'fw-data ) - drop - /cmd_802_11_scan ( cmdlen ) - then ( cmdlen ) - - outbuf-wait ( error? ) - dup 0= if ( error? ) - respbuf /respbuf /fw-cmd /string rot ( adr len 0 ) - then -; -[then] - -h# 7ffe instance value channel-mask - -: +chan-list-tlv ( -- ) - h# 101 +xw - 0 +xw 'x >r ( r: 'payload ) - #channels 1+ 1 do - 1 i lshift channel-mask and if - 0 +xb \ Radio type - i +xb \ Channel # - scan-type +xb \ Scan type - 0:active or 1:passive - d# 100 +xw \ Min scan time - d# 100 +xw \ Max scan time - then - loop - 'x r@ - r> 2- le-w! -; - -: +probes-tlv ( -- ) - h# 102 +xw \ Probes TLV - 2 +xw \ length - #probes +xw \ #probes -; - -: +ssid-tlv ( -- ) - scan-ssid c@ if - 0 +xw \ SSID TLV - scan-ssid c@ +xw \ length - scan-ssid count +x$ - then -; - -: (scan) ( -- error? | adr len 0 ) - 6 ( CMD_802_11_SCAN ) start-cmd - resp-wait-long to resp-wait - - BSS_ANY +xb - 6 +xerase \ BSS ID - - +chan-list-tlv - +probes-tlv - +ssid-tlv - - finish-cmd outbuf-wait ( error? ) - dup 0= if ( error? ) - respbuf /respbuf /fw-cmd /string rot ( adr len 0 ) - then -; - - -external -: set-channel-mask ( n -- ) - h# 7ffe and to channel-mask -; - -\ Ask the device to look for the indicated SSID. -: set-ssid ( adr len -- ) - \ This is an optimization for NAND update over the mesh. - \ It prevents listening stations, of which there can be many, - \ from transmitting when they come on-line. - 2dup " olpc-mesh" $= if passive-scan then - - h# 32 min scan-ssid pack drop -; - -: scan ( adr len -- actual ) - begin (scan) dup 1 = while drop d# 1000 ms repeat \ Retry while busy - if 2drop 0 exit then ( adr len scan-adr scan-len ) - rot min >r ( adr scan-adr r: len ) - swap r@ move ( r: len ) - r> -; -headers - -\ ========================================================================= -\ WEP -\ ========================================================================= - -: set-wep-type ( len -- ) - ?dup if - 5 = if TYPE_WEP_40_BIT 8 else TYPE_WEP_104_BIT h# 8008 then - mac-ctrl or to mac-ctrl \ WEPxx on - else - 0 - then - +xb -; - -external -: (set-wep) ( wep4$ wep3$ wep2$ wep1$ idx -- ok? ) - d# 72 h# 13 ( CMD_802_11_SET_WEP ) prepare-cmd - ACTION_ADD +xw - ( idx ) +xw \ TxKeyIndex - dup set-wep-type - 2 pick set-wep-type - 4 pick set-wep-type - 6 pick set-wep-type - 4 0 do - ?dup if x /x + swap move else drop then - d# 16 /x + to /x - loop - d# 72 outbuf-wait 0= -; -: set-wep ( wep4$ wep3$ wep2$ wep1$ idx -- ok? ) - to wep-idx - dup to /wep1 wep1 swap move - dup to /wep2 wep2 swap move - dup to /wep3 wep3 swap move - dup to /wep4 wep4 swap move - true -; -: ?set-wep ( -- ) - ktype kt-wep = if - wep4$ wep3$ wep2$ wep1$ wep-idx (set-wep) drop - then -; - -: disable-wep ( -- ok? ) - mac-ctrl h# 8008 invert and to mac-ctrl \ Disable WEP - d# 72 h# 13 ( CMD_802_11_SET_WEP ) prepare-cmd - ACTION_REMOVE +xw - 0 +xw \ TxKeyIndex - d# 72 outbuf-wait 0= -; -headers - -\ ========================================================================= -\ WPA and WPA2 -\ ========================================================================= - -: set-rsn ( enable? -- ok? ) - 4 h# 2f ( CMD_802_11_ENABLE_RSN ) prepare-cmd - ACTION_SET +xw - ( enable? ) +xw \ 1: enable; 0: disable - 4 outbuf-wait 0= -; - -external -: enable-rsn ( -- ok? ) 1 set-rsn ; -: disable-rsn ( -- ok? ) 0 set-rsn ; -headers - -: set-key-material ( key$ kinfo ct -- ) - /outbuf h# 5e ( CMD_802_11_KEY_MATERIAL ) prepare-cmd - ACTION_SET +xw - h# 100 +xw \ Key param IE type - 2 pick 6 + +xw \ IE payload length - ( ct ) +xw \ Cipher type - ( kinfo ) +xw \ Key info - dup +xw \ Key length - ( key$ ) +x$ \ key$ - /x dup /fw-cmd-hdr + outbuf >fw-len le-w! \ Finally set the length - outbuf-wait if exit then -; - -external -: set-gtk ( gtk$ -- ) 5 ctype-g set-key-material ; -: set-ptk ( ptk$ -- ) 6 ctype-p set-key-material ; -headers - -\ ======================================================================= -\ Adhoc join -\ ======================================================================= - -0 value atim - -: save-associate-params ( ch ssid$ target-mac$ -- ch ssid$ target-mac ) - over target-mac$ move - 2over dup to /ssid - ssid swap move - 4 pick to channel -; - -: (join) ( ch ssid$ target-mac$ -- ok? ) - save-associate-params - /outbuf h# 2c ( CMD_802_11_AD_HOC_JOIN ) prepare-cmd - resp-wait-long to resp-wait - - ( target-mac$ ) +x$ \ Peer MAC address - ( ssid$ ) tuck +x$ \ SSID - ( ssid-len ) d# 32 swap - +x \ 32 bytes of SSID - bss-type-adhoc +xb \ BSS type - d# 100 +xw \ Beacon period - 1 +xb \ DTIM period - - 8 +x \ 8 bytes of time stamp - 8 +x \ 8 bytes of local time - - \ DS param set - 3 +xb \ Elem ID = DS param set - 1 +xb \ Length - ( channel ) +xb \ Channel - 4 +x \ Reserved bytes - - \ IBSS param set - 6 +xb \ Elem ID = IBSS param set - 2 +xb \ Length - atim +xw \ ATIM window - 4 +x \ Reserved bytes - - cap +xw \ Capability info: ESS, short slot, WEP - - \ XXX 14 bytes for 802.11g, 8 bytes for 802.11b - common-rates #rates +x$ \ Common supported data rates - d# 255 +xw \ Association timeout - 0 +xw \ Probe delay time - - /x dup /fw-cmd-hdr + outbuf >fw-len le-w! \ Finally set the length - outbuf-wait if ." Failed to join adhoc network" cr false exit then - true -; - -external -: set-atim-window ( n -- ) d# 50 min to atim ; -headers - -\ ========================================================================= -\ Authenticate -\ ========================================================================= - -: authenticate ( target-mac$ -- ) - 7 h# 11 ( CMD_802_11_AUTHENTICATE ) prepare-cmd - ( target-mac$ ) +x$ \ Peer MAC address - auth-mode +xb \ Authentication mode - 7 outbuf-wait if exit then -; - -: deauthenticate ( mac$ -- ) - 8 h# 24 ( CMD_802_11_DEAUTHENTICATE ) prepare-cmd - ( mac$ ) +x$ \ AP MAC address - 3 +xw \ Reason code: station is leaving - 8 outbuf-wait if exit then - ds-disconnected set-driver-state -; - -\ Mesh - -: mesh-access! ( value cmd -- ) - h# 82 h# 9b ( CMD_MESH_ACCESS ) prepare-cmd ( value cmd ) - +xw +xl ( ) - - h# 82 outbuf-wait if exit then -; -: mesh-access@ ( cmd -- value ) - h# 82 h# 9b ( CMD_MESH_ACCESS ) prepare-cmd ( value cmd ) - +xw ( ) - - h# 82 outbuf-wait if -1 exit then - respbuf >fw-data wa1+ le-l@ -; - -: mesh-config-set ( adr len type channel action -- error? ) - h# 88 h# a3 ( CMD_MESH_CONFIG ) prepare-cmd ( adr len type channel action ) - +xw +xw +xw ( adr len ) - dup +xw +x$ ( ) - - h# 88 outbuf-wait -; -: mesh-config-get ( -- true | buf false ) - h# 88 h# a3 ( CMD_MESH_CONFIG ) prepare-cmd ( ) - 3 +xw 0 +xw 5 +xw ( ) - - h# 88 outbuf-wait if true exit then - respbuf >fw-data false -; -: (mesh-start) ( channel tlv -- error? ) - " "(dd 0e 00 50 43 04 00 00 00 00 00 04)mesh" ( channel tlv adr len ) - 2swap swap 1 ( adr len tlv channel action ) \ 1 is CMD_ACT_MESH_CONFIG_START - mesh-config-set -; - -: mesh-stop ( -- error? ) - mesh-on? if - " " 0 0 0 mesh-config-set ( error? ) - tx-ctrl TX_WDS invert and to tx-ctrl ( error? ) - ds-associated reset-driver-state ( error? ) - else - false ( error? ) - then -; - -: mesh-start ( channel -- error? ) - \ h# 223 (0x100 + 291) is an old value - \ h# 125 (0x100 + 37) is an "official" value that doesn't work - dup h# 223 (mesh-start) if ( channel ) - \ Retry once - h# 223 (mesh-start) ( error? ) - else - drop false ( error? ) - then - - dup 0= if ( error? ) - tx-ctrl TX_WDS or to tx-ctrl ( error? ) - ds-associated set-driver-state ( error? ) - then ( error? ) -; - -instance variable mesh-param -: mesh-set-bootflag ( bootflag -- error? ) - mesh-param le-l! mesh-param 4 1 0 3 mesh-config-set -; -: mesh-set-boottime ( boottime -- error? ) - mesh-param le-w! mesh-param 2 2 0 3 mesh-config-set -; -: mesh-set-def-channel ( boottime -- error? ) - mesh-param le-w! mesh-param 2 3 0 3 mesh-config-set -; -: mesh-set-ie ( adr len -- error? ) 4 0 3 mesh-config-set ; -: mesh-set-ttl ( ttl -- ) 2 mesh-access! ; -: mesh-get-ttl ( -- ttl ) 1 mesh-access@ ; -: mesh-set-bcast ( index -- ) 8 mesh-access! ; -: mesh-get-bcast ( -- index ) 9 mesh-access@ ; - -[ifdef] notdef -: mesh-set-anycast ( mask -- ) 5 mesh-access! ; -: mesh-get-anycast ( -- mask ) 4 mesh-access@ ; - -: mesh-set-rreq-delay ( n -- ) d# 10 mesh-access! ; -: mesh-get-rreq-delay ( -- n ) d# 11 mesh-access@ ; - -: mesh-set-route-exp ( n -- ) d# 12 mesh-access! ; -: mesh-get-route-exp ( -- n ) d# 13 mesh-access@ ; - -: mesh-set-autostart ( n -- ) d# 14 mesh-access! ; -: mesh-get-autostart ( -- n ) d# 15 mesh-access@ ; - -: mesh-set-prb-rsp-retry-limit ( n -- ) d# 17 mesh-access! ; -[then] - -\ ========================================================================= -\ Associate/disassociate -\ ========================================================================= - -0 value assoc-id - -\ The source IE is in the Marvel format: id and len are 2 bytes long. -\ The destination IE is in the 802.11 format: id and len are 1 byte long. -: save-wpa-ie ( boffset eoffset -- ) - over - 2 - to /wpa-ie \ Less extra bytes - x + dup c@ wpa-ie c! \ Copy IE id - 2 + dup c@ wpa-ie 1+ c! \ Copy len - 2 + wpa-ie /wpa-ie 2 /string move \ Copy body of IE -; - -: moui ( ct -- ) ct-tkip = if moui-tkip else moui-aes then ; -: oui ( ct -- ) ct-tkip = if oui-tkip else oui-aes then ; - -: (associate) ( ch ssid$ target-mac$ -- ok? ) - save-associate-params - - /outbuf h# 50 ( CMD_802_11_ASSOCIATE ) prepare-cmd - resp-wait-long to resp-wait - - ( target-mac$ ) +x$ \ Peer MAC address - cap +xw \ Capability info: ESS, short slot, WEP - d# 10 +xw \ Listen interval - d# 100 +xw \ Beacon period - 1 +xb \ DTIM period - - \ SSID - 0 +xw \ element ID = SSID - dup +xw \ len - ( ssid$ ) +x$ \ SSID - - \ DS param - 3 +xw \ element ID = DS param set - 1 +xw \ len - ( ch ) +xb \ channel - - \ CF param - 4 +xw \ element ID = CF param set - 0 +xw \ len - - \ Common supported rates - 1 +xw \ element ID = rates - #rates +xw \ len - common-rates #rates +x$ \ common supported data rates - - \ RSN (WPA2) - ktype kt-wpa2 = if - /x \ Save beginning offset - d# 48 +xw \ element ID = RSN - d# 20 +xw \ len - 1 +xw \ version - ctype-g oui +xbl \ group cipher suite - 1 +xw \ count of pairwise cipher suite - ctype-p oui +xbl \ pairwise cipher suite - 1 +xw \ count of authentication suite - aoui +xbl \ authentication suite - h# 28 +xw \ RSN capabilities - /x save-wpa-ie \ Save IE in wpa-ie - then - - \ WPA param - ktype kt-wpa = if - /x \ Save beginning offset - d# 221 +xw \ element ID = WPA - d# 24 +xw \ len - wpa-tag +xbl \ WPA-specific tag - 1 +xw \ version - ctype-g moui +xbl \ group cipher suite - 1 +xw \ count of pairwise cipher suite - ctype-p moui +xbl \ pairwise cipher suite - 1 +xw \ count of authentication suite - amoui +xbl \ authentication suite - ctype-p ct-tkip = if h# 2a else h# 28 then - ( cap ) +xw \ WPA capabilities - /x save-wpa-ie \ Save IE in wpa-ie - then - - \ XXX power (optional) - \ XXX supported channels set (802.11h only) - \ XXX pass thru IEs (optional) - - /x dup /fw-cmd-hdr + outbuf >fw-len le-w! \ Finally set the length - outbuf-wait if false exit then - - respbuf >fw-data 2 + le-w@ ?dup if \ This is the IEEE Status Code - ." Failed to associate: " u. cr - false - else - respbuf >fw-data 4 + le-w@ to assoc-id - ds-disconnected ds-connected-mask or reset-driver-state - true - then -; - -external -instance defer mesh-default-modes -' noop to mesh-default-modes -: nandcast-mesh-modes ( -- ) - 1 mesh-set-ttl - d# 12 mesh-set-bcast -; -' nandcast-mesh-modes to mesh-default-modes - -: associate ( ch ssid$ target-mac$ -- ok? ) - 2over " olpc-mesh" $= if ( ch ssid$ target-mac$ ) - 2drop 2drop mesh-start 0= ( ok? ) - dup if mesh-default-modes then - exit - then - ?set-wep \ Set WEP keys again, if ktype is WEP - set-mac-control - 2dup authenticate - bss-type bss-type-managed = if (associate) else (join) then -; -headers - -: do-associate ( -- ok? ) - do-associate dup if - ds-disconnected reset-driver-state - ds-associated set-driver-state - then -; - -: ?reassociate ( -- ) - driver-state ds-disconnected and if do-associate drop then -; -' ?reassociate to start-nic - -: disassociate ( mac$ -- ) - 8 h# 26 ( CMD_802_11_DISASSOCIATE ) prepare-cmd - ( mac$ ) +x$ \ AP MAC address - 3 +xw \ Reason code: station is leaving - 8 outbuf-wait if exit then - ds-disconnected set-driver-state -; - - -\ ======================================================================= -\ Miscellaneous -\ ======================================================================= - -: get-rf-channel ( -- ) - d# 40 h# 1d ( CMD_802_11_RF_CHANNEL ) prepare-cmd - ACTION_GET +xw - d# 40 outbuf-wait if exit then - ." Current channel = " respbuf >fw-data 2 + le-w@ .d cr -; - -: get-beacon ( -- interval enabled? ) - 6 h# b0 ( CMD_802_11_BEACON_CTRL ) prepare-cmd - ACTION_GET +xw - 6 outbuf-wait if exit then - respbuf >fw-data dup 2 wa+ le-w@ swap wa1+ le-w@ -; - -: set-beacon ( interval enabled? -- ) - 6 h# b0 ( CMD_802_11_BEACON_CTRL ) prepare-cmd - ACTION_SET +xw ( interval enabled? ) - +xw +xw - 6 outbuf-wait drop -; - - -: get-log ( -- ) - 0 h# b ( CMD_802_11_GET_LOG ) prepare-cmd - 0 outbuf-wait if exit then - respbuf .log -; - -: get-rssi ( -- ) - 2 h# 1f ( CMD_802_11_RSSI ) prepare-cmd - 8 +xw \ Value used for exp averaging - 2 outbuf-wait drop - \ XXX What to do with the result? -; - -: .hw-spec ( -- ) - marvel-get-hw-spec if - ." marvel-get-hw-spec command failed" cr - else - ." HW interface version: " dup le-w@ u. cr - ." HW version: " dup 2 + le-w@ u. cr - ." Max multicast addr: " dup 6 + le-w@ .d cr - ." MAC address: " dup 8 + .enaddr cr - ." Region code: " dup d# 14 + le-w@ u. cr - ." # antenna: " dup d# 16 + le-w@ .d cr - ." FW release: " dup d# 18 + le-l@ u. cr - ." FW capability:" d# 34 + le-l@ .fw-cap cr - then -; - -: set-data-rate ( rate-code -- ) - #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd - - 1 ( CMD_ACT_SET_TX_FIX_RATE ) +xw - 0 +xw \ reserved field - ( rate-code ) +xb - - #rates 4 + outbuf-wait drop -; -: auto-data-rate ( -- ) - #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd - - 0 ( CMD_ACT_SET_TX_FIX_RATE ) +xw - 0 +xw \ reserved field - - #rates 4 + outbuf-wait drop -; - - -: get-data-rates ( -- ) - #rates 4 + h# 22 ( CMD_802_11_DATA_RATE ) prepare-cmd - 2 ( HostCmd_ACT_GET_TX_RATE ) +xw - #rates 4 + outbuf-wait drop -; - -2 constant gpio-pin -d# 20 constant wake-gap -1 constant wake-on-broadcast -2 constant wake-on-unicast -4 constant wake-on-mac-event --1 constant remove-wakeup - -\ LED_GPIO_CTRL - -: host-sleep-activate ( -- ) - 0 h# 45 ( CMD_802_11_HOST_SLEEP_ACTIVATE ) prepare-cmd - 0 outbuf-wait drop -; - -: host-sleep-config ( conditions -- ) - >r - 6 h# 43 ( CMD_802_11_HOST_SLEEP_CFG ) prepare-cmd -\ ACTION_SET +xw - - r> +xl - gpio-pin +xb - wake-gap +xb - - 6 outbuf-wait drop -; - -: unicast-wakeup ( -- ) wake-on-unicast host-sleep-config ; -: broadcast-wakeup ( -- ) wake-on-unicast wake-on-broadcast or host-sleep-config ; -: sleep ( -- ) host-sleep-activate ; - -[ifdef] notdef - CMD_ACT_MESH_... - 1 GET_TTL 2 SET_TTL 3 GET_STATS 4 GET_ANYCAST 5 SET_ANYCAST - 6 SET_LINK_COSTS 7 GET_LINK_COSTS 8 SET_BCAST_RATE 9 GET_BCAST_RATE -10 SET_RREQ_DELAY 11 GET_RREQ_DELAY 12 SET_ROUTE_EXP 13 GET_ROUTE_EXP -14 SET_AUTOSTART_ENABLED 15 GET_AUTOSTART_ENABLED 16 not used -17 SET_PRB_RSP_RETRY_LIMIT - -CMD_TYPE_MESH_ -1 SET_BOOTFLAG 2 SET_BOOTTIME 3 SET_DEF_CHANNEL 4 SET_MESH_IE -5 GET_DEFAULTS 6 GET_MESH_IE /* GET_DEFAULTS is superset of GET_MESHIE */ - -CMD_ACT_MESH_CONFIG_.. 0 STOP 1 START 2 SET 3 GET - -struct cmd_ds_mesh_config { - struct cmd_header hdr; - __le16 action; __le16 channel; __le16 type; __le16 length; - u8 data[128]; /* last position reserved */ -} -struct mrvl_meshie_val { - uint8_t oui[P80211_OUI_LEN]; - uint8_t type; - uint8_t subtype; - uint8_t version; - uint8_t active_protocol_id; - uint8_t active_metric_id; - uint8_t mesh_capability; - uint8_t mesh_id_len; - uint8_t mesh_id[IW_ESSID_MAX_SIZE]; 32 -} -struct ieee80211_info_element { - u8 id; u8 len; u8 data[0]; -} -struct mrvl_meshie { - struct ieee80211_info_element hdr; - struct mrvl_meshie_val val; -} - memset(&cmd, 0, sizeof(cmd)); - cmd.channel = cpu_to_le16(chan); - ie = (struct mrvl_meshie *)cmd.data; - - switch (action) { - case CMD_ACT_MESH_CONFIG_START: -0.b 221 ie->hdr.id = MFIE_TYPE_GENERIC; -2.b h# 00 ie->val.oui[0] = 0x00; -3.b h# 50 ie->val.oui[1] = 0x50; -4.b h# 43 ie->val.oui[2] = 0x43; -5.b 4 ie->val.type = MARVELL_MESH_IE_TYPE; -6.b 0 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE; -7.b 0 ie->val.version = MARVELL_MESH_IE_VERSION; -8.b 0 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP; -9.b 0 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID; -10.b 0 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY; -11.b ssid_len ie->val.mesh_id_len = priv->mesh_ssid_len; -12 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len); -1 10+ssid_len ie->hdr.len = sizeof(struct mrvl_meshie_val) - IW_ESSID_MAX_SIZE + priv->mesh_ssid_len; - - 42 (32+10) cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val)); - -config_start: action is 1 (...CONFIG_START), type = mesh_tlv which is either h# 100 d# 291 + or h# 100 d# 37 + -[then] - -[ifdef] notdef -create mesh_start_cmd - \ MFIE_TYPE_GENERIC ielen (10 + sizeof("mesh")) - d# 221 c, d# 14 c, - - \ OUI.................... type subtyp vers proto metric cap - h# 00 c, h# 50 c, h# 43 c, 4 c, 0 c, 0 c, 0 c, 0 c, 0 c, - - \ ssidlen ssid (set@12) - d# 04 c, here 4 allot " mesh" rot swap move -here mesh_start_cmd - constant /mesh_start_cmd -[then] - -[ifdef] wlan-wackup \ This is test code that only works with a special debug version of the Libertas firmware -: autostart ( -- ) - h# 700000 h# 5 mesh-access! -; -[then] - \ LICENSE_BEGIN -\ Copyright (c) 2007 FirmWorks +\ Copyright (c) 2009 FirmWorks \ \ Permission is hereby granted, free of charge, to any person obtaining \ a copy of this software and associated documentation files (the Modified: dev/usb2/device/wlan/wlan.fth =================================================================== --- dev/usb2/device/wlan/wlan.fth 2009-05-12 22:48:24 UTC (rev 1178) +++ dev/usb2/device/wlan/wlan.fth 2009-05-12 22:53:43 UTC (rev 1179) @@ -29,33 +29,24 @@ ; : init-net ( -- ) + marvel-get-mac-address ?make-mac-address-property ; -: load-fw ( $ -- adr len ) - over " rom:" comp if - " boot-read" evaluate \ Not a dropin - " loaded" evaluate - else - 4 - swap 4 + swap " find-drop-in" evaluate 0= if null$ then - then -; -: ?load-fw ( -- ok? ) +: ?load-fw ( -- error? ) driver-state ds-not-ready = if - wlan-fw load-fw ?dup if download-fw else drop then - driver-state ds-not-ready = if + load-all-fw if ." Failed to download firmware" cr - false exit + true exit then + ds-ready to driver-state then init-net - true + false ; false instance value use-promiscuous? -: end-out-ring ( -- ) " end-out-ring" $call-parent ; - external \ Set to true to force open the driver without association. @@ -75,14 +66,13 @@ : open ( -- ok? ) my-args parse-args - device set-target + set-parent-channel opencount @ 0= if init-buf - /outbuf 4 bulk-out-pipe " begin-out-ring" $call-parent - /inbuf h# 40 bulk-in-pipe " begin-in-ring" $call-parent - ?load-fw 0= if end-bulk-in end-out-ring free-buf false exit then + /inbuf /outbuf setup-bus-io if free-buf false exit then + ?load-fw if release-bus-resources free-buf false exit then my-args " supplicant" $open-package to supplicant-ih - supplicant-ih 0= if end-bulk-in end-out-ring free-buf false exit then + supplicant-ih 0= if release-bus-resources free-buf false exit then nonce-cmd force-open? 0= if link-up? 0= if @@ -111,31 +101,32 @@ ['] 2drop to ?process-eapol stop-nic mac-off - end-bulk-in - end-out-ring - free-buf supplicant-ih ?dup if close-package 0 to supplicant-ih then + release-bus-resources then ; \ Read and write ethernet messages regardless of the associate state. \ Used by the /supplicant support package to perform key handshaking. : write-force ( adr len -- actual ) - tuck wrap-msg ( actual adr' len' ) - " send-out" $call-parent drop ( actual ) + tuck ( actual adr len ) + wrap-msg ( actual adr' len' ) + data-out ( actual ) ; + : read-force ( adr len -- actual ) - bulk-in-ready? 0= if ( adr len ) + got-packet? 0= if ( adr len ) 2drop -2 exit then ( adr len [ error | buf actual 0 ] ) - if ( adr len ) - restart-bulk-in ( adr len ) + if \ receive error ( adr len ) + recycle-packet ( adr len ) 2drop -1 exit then ( adr len buf actual ) false to got-data? ( adr len buf actual ) process-rx ( adr len ) + recycle-packet ( adr len ) got-data? if ( adr len ) /data min tuck data -rot move ( actual ) @@ -143,7 +134,6 @@ 2drop -2 \ No data then ( actual ) - restart-bulk-in ; \ Normal read and write methods. @@ -185,7 +175,7 @@ true to force-open? open false to force-open? - 0= if ." Can't open USB8388 wireless" cr true close exit then + 0= if ." Can't open Marvell wireless" cr true close exit then (scan) if ." Failed to scan" true cr @@ -202,14 +192,6 @@ headers -: init ( -- ) - init - device set-target - configuration set-config if ." Failed to set ethernet configuration" cr then -; - -init - \ LICENSE_BEGIN \ Copyright (c) 2007 FirmWorks \

1 0

r1178 - cpu/x86
by svn＠openfirmware.info 13 May '09

13 May '09

Author: wmb Date: 2009-05-13 00:48:24 +0200 (Wed, 13 May 2009) New Revision: 1178 Modified: cpu/x86/apic.fth Log: apic.fth - Nuked carriage returns in the file. Modified: cpu/x86/apic.fth =================================================================== --- cpu/x86/apic.fth 2009-05-12 22:47:27 UTC (rev 1177) +++ cpu/x86/apic.fth 2009-05-12 22:48:24 UTC (rev 1178) @@ -1,310 +1,310 @@ -purpose: Advanced Programmable Interrupt Controller driver -\ See license at end of file - -0 0 " fee00000" " /" begin-package - -" apic" name - -\ Docs: -\ "Intel Architecture Software Developer's Manual", Volume 3, chapter 7.5: -\ "Advanced Programmable Interrupt Controller (APIC)" -\ See linux/include/asm-i386/i82489.h for further details. - -: apic-base-msr! ( l -- ) 0 h# 1b msr! ; \ High 32 bits are unused -: apic-base-msr@ ( -- l ) h# 1b msr@ drop ; - -: apic-on ( -- ) apic-base-msr@ h# fff and h# 800 or apic-mmio-base or apic-base-msr! ; -: apic-off ( -- ) apic-base-msr@ h# 800 invert and apic-base-msr! ; - -0 value apic-base \ Needs to be mapped and set - -: apic! ( l reg -- ) apic-base + l! ; -: apic@ ( reg -- l ) apic-base + l@ ; -: apic-set ( mask reg -- ) dup apic@ rot or swap apic! ; -: apic-clr ( mask reg -- ) dup apic@ rot invert and swap apic! ; - -\ Support - -code cpu-capabilities ( -- n ) - 1 # ax mov - cpuid - dx push -c; -: apic-present? ( -- flag ) cpu-capabilities h# 200 and 0<> ; - -\ Methods - -: taskpri@ ( -- n ) h# 80 apic@ ; -: taskpri! ( n -- ) h# 80 apic! ; -: arbpri@ ( -- n ) h# 90 apic@ ; -: arbpri! ( n -- ) h# 90 apic! ; -: spiv@ ( -- n ) h# f0 apic@ ; -: spiv! ( n -- ) h# f0 apic! ; - -: id! ( id -- ) d# 24 lshift d# 20 apic! ; -: id@ ( -- id ) d# 20 apic@ d# 24 rshift ; -: lvt0@ ( -- n ) h# 350 apic@ ; -: lvt0! ( n -- ) h# 350 apic@ ; -: lvt1@ ( -- n ) h# 360 apic@ ; -: lvt1! ( n -- ) h# 360 apic@ ; - -: lvt0-disable-irq ( -- ) h# 10000 h# 350 apic-set ; \ Disable LINT0 -: lvt0-enable-irq ( -- ) h# 10000 h# 350 apic-clr ; \ Enable LINT0 -: lvt1-disable-irq ( -- ) h# 10000 h# 360 apic-set ; \ Disable LINT1 -: lvt1-enable-irq ( -- ) h# 10000 h# 360 apic-clr ; \ Enable LINT1 -: timer! ( l -- ) h# 380 apic@ drop h# 380 apic! ; -: timer@ ( -- l ) h# 390 apic@ ; -: timer-disable-irq ( -- ) h# 10000 h# 320 apic-set ; \ Dis IRQ when timer passes 0 -: timer-enable-irq ( -- ) h# 10000 h# 320 apic-clr ; \ Dis IRQ when timer passes 0 -: timer-periodic ( -- ) h# 30000 h# 320 apic-set ; -: timer-one-shot ( -- ) h# 320 apic@ h# 20000 invert and h# 10000 or h# 320 apic! ; -: timer-irq! ( vector -- ) h# 320 apic@ h# ff invert and or h# 10000 or h# 320 apic! ; -: perf-disable-irq ( -- ) h# 10000 h# 340 apic-set ; \ Dis IRQ when perf timer passes 0 -: perf-enable-irq ( -- ) h# 10000 h# 340 apic-clr ; \ Dis IRQ when perf timer passes 0 -: perf-irq! ( vector -- ) h# 340 apic@ h# ff invert and or h# 10000 or h# 340 apic! ; - -: ack-irq ( -- ) h# f0 apic@ drop 0 h# b0 apic! ; \ b0 is eoi - -: soft-on ( -- ) - spiv@ - h# 100 or \ APIC on - h# 200 invert and \ Focus processor checking - h# ff or \ Spurious IRQ vector ff - spiv! -; - - -: open ( -- okay? ) - apic-base 0= if - apic-mmio-base h# 400 " map-in" $call-parent to apic-base - apic-on - taskpri@ h# ff invert and taskpri! \ "Accept All" - soft-on - \ Virtual wire mode - \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_EXTINT (700) - lvt0@ h# 1ff00 invert and h# 5700 or lvt0! - \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_NMI (400) - lvt1@ h# 1ff00 invert and h# 5400 or lvt1! - then - - true -; -: close ( -- ) ; - -end-package - -0 0 " fec00000" " /" begin-package - -" io-apic" name - -0 value io-apic-base -: io-apic@ ( index -- l ) io-apic-base c! io-apic-base h# 10 + l@ ; -: io-apic! ( l index -- ) io-apic-base c! io-apic-base h# 10 + l! ; - -\ Debugging - -: .apic-mode ( low -- ) - 8 rshift 7 and case - 0 of ." Fixed " endof - 1 of ." LowPri " endof - 2 of ." SMI " endof - 3 of ." Res3 " endof - 4 of ." NMI " endof - 5 of ." Init " endof - 6 of ." Res6 " endof - 7 of ." Ext " endof - endcase -; - -: .apic-irq ( int# -- ) - 2* h# 10 + dup io-apic@ - ." Vec: " dup h# ff and 2 u.r space - dup .apic-mode - dup h# 800 and if ." Logical " else ." Physical " then - dup h# 1000 and if ." Pending " else ." Idle " then - dup h# 2000 and if ." Low " else ." High " then - dup h# 8000 and if - ." Level " dup h# 4000 and if ." IRR " else ." EOI " then - else ." Edge " then - h# 10000 and if ." Masked " else ." Open " then - 1+ io-apic@ - ." EDID: " dup d# 16 rshift h# ff and 2 u.r - ." Dest: " d# 24 rshift h# ff and 2 u.r - cr -; -: .apic-irqs ( -- ) - push-hex - 1 io-apic@ d# 16 rshift h# ff and 1+ 0 do - i 2 u.r space i .apic-irq - loop - pop-base -; - -\ Methods - -: trigger-irq ( irq# -- ) io-apic-base h# 20 + c! ; -: eoi ( vector -- ) io-apic-base h# 40 + c! ; - -: open ( -- okay? ) - io-apic-base 0= if - io-apic-mmio-base h# 80 " map-in" $call-parent to io-apic-base - then - true -; -: close ( -- ) ; - -end-package - -0 value apic-ih -0 value io-apic-ih -stand-init: APIC - " /apic" open-dev to apic-ih - " /io-apic" open-dev to io-apic-ih -; - -0 [if] -\ For tdcr (3e0): -\ Divisor: 1 2 4 8 16 32 64 128 -\ Value : b 0 1 2 3 8 9 a - -\ Timer base low bit at bit 18 -\ Timer base div is mask 2 - -\ Other regs: -\ LVR 0x30 -\ GET_APIC_VERSION(x) ((x)&0xFF) - -\ TPR 80 Task Priority, 000000xx only service interrupts higher than this value -\ APR 90 Arbitration Priority, used during bus arbitration -\ PPR a0 Processor Priority, depends complexly on TPR and incoming interrupt - -\ LDR 0xD0 Logical Destination Register II000000 II is logical APIC ID -\ DFR 0xE0 Destination Format Register M0000000 M is the model (F:flat or 0:cluster) -\ LVTERR 0x370 -\ TDCR 0x3E0 -\ ICR 0x310 Generate local interrupt by writing - -\ IRR 200 - 270 (8 registers - 256 bits) Request - bit is set if interrupt pending -\ ISR 100 - 170 (8 registers - 256 bits) Service - INTA latches highest priority bit -\ TMR 180 - 1F0 (8 registers - 256 bits) Bit is set for level, clear for edge. EOI commands sends EOI msg to all IOAPIC - -20 0 -30 50014 -80 f0 -d0 0 -e0 ffffffff -f0 10f -320 10000 Timer Masked off -340 10000 PCINT Masked off -350 700 LINT0 vector 0 mode ExtINT (111) Edge Trigger Active High -360 400 LINT1 vector 0 mode NMI (100) Edge Trigger Active High -370 10000 ERROR Masked off -380 0 -390 0 - -Io apic -259 9 (def 08) bit 0=1 enabe MSI Flat Mode Support - -25c 10 APIC D11 is masked to 1, cluster mode disabled -268-26f 0 .. 0 Priority of all CPUs = 0 -296 a - bit 0 = 0 Assert HDPWR# for both read / write cycles (other bits are enable V4 fast TRDY, dynamic HDPWR#) -297 1 - bit 1 = 0 Don't pipeline APIC requests, bit 0 = 1 enable redirect low priority apic reqs to CPU 0 -386 3f - bit 5 ena apic low interrupt arb, bit 4 io apic fec80000 - fecf.ffff to PCI2, bit 3 host snoop, 2 enable top sm mem, 1 enable sdio support for using system memory 4kbytes, 1 enable compatible smm -485 5 - bit 1 = 0 free-running apic clock (not dynamic) [Reserved in 855] -488 0 - bits 1 and 0 free running apic clocks [Reserved in 855] -4a2 d6 - bit 3 = 0 disable apic interface power management [Reserved in 855] - --- Following registers in D0F5 are [Reserved in 855] -540 4c (default) - bit 7 disable legacy apic, c is irrelevant if disabled -541 0 (def) - irrelevant if 540 disabled -542 3 (def) - bit 3 disable intx transparent mode, bit 2 dis apic nonshare mode, bit 1 ena APIC interrupt disable, bit 0 enabe boot interrupt function -544 0 (def) - bit 7 boring, bit 1 dis pcie dev uses msi cycle wake up system from c3, bit 0 apic data voltage 2.5v --- End reserved - - -io apic regs: fec0.0000 -00 index register for indirect regs -10 data register for indirect regs -20 write the IRQ # -40 EOI WO - -indirect io apic regs -00 1000000 IOAPIC ID is 1 -01 178003 (RO) version -02 1000000 Arb ID is 1 -03 1 Front side bus message delivery -10,11 0100.0000 . 0001.0000 DD00 . 0000 . 000 ooom . tips MVV -.. -3e,3f 0100.0000 . 0001.0000 - DD is destination APIC ID in physical mode (since bit 11 = 0) - m = 1 means masked - - -8848 0 bit 7 = 0 address bit 2 of FSBis not force low (default) -884d 1 bit 3=0 disable some funny thing about APCI Ch0 ext interrupt delivery (def), bit 2=0 dis ser irq always shared in APIC mode (def) - -PnP routing -8854 00 non-inverted PCI INT# -8855 a0 INTA IRQ10 -8856 b9 INTC IRQ11, INTB IRQ9 -8857 a0 INTD IRQ10 - -APIC Mode INTA-H -PIRQ16 A -PIRQ17 B -PIRQ18 C -PIRQ19 D -PIRQ20 E -PIRQ21 F -PIRQ22 G -PIRQ23 H - -8858 60 (def 40) bit 6 ena Internal APIC -885b 53 (def 01) bit 6 port 80 to LPC, bit 4 ena APIC clock gating, bit 3=0 dis bypass apic de-assert Msg, bit 1 res, bit 0 ena dynamic clock stop -886c 00 (def) bit 3 dis apic positive decode -88b0 30 (def 08) bits 5,4 ena uart 2,1, bit 3=0 disable apic C4P State Mode Control -88e7 80 (def 00) bit 7 enable apic cycle reflect to all bus master activity effective signal -88ec 00 (def 00) bits 7:4=0 disable V1 interrupt routing - -PMIO+65 bit 7 set to 1 to enable APIC interrupt wake up system from C4P state - -8f73 01 (def 00) bit4=0 enable APIC cycle block p2c write cycle (def), bit 0=1 enable pci broken master timer -8f74 0c (def 00) bit3=1 lock cycle issued by cpu block p2c cycles, bit2=1 APIC FSB directly up through CCA (not PCI) and 7c[1] must also be set [Bit 2 is reserved in 855] -8f7c 02 (def 02) bit2=1 APIC FSB directly up through CCA (not PCI) and 74[2] must also be set - -8f80 07 (def 00) bit0=1 APIC cycle blocks HDAC upstream write - -8fe0 93 (def 40) various. bit 3=0 dis APIC cycle flush HDAC Upstream Write Cycle [Reserved in 855] -8fe6 3f (def 01) bit5 supposedly reserved, bit4=1 split fecxx.xxxx range btw PCI1 and PCI2, bit3=1 processor MSI support enable, bit2=1 Top SMM enable, bit1=1 High SMM enable, bit0=1 Compatible SMM enable - - - -When enable internal APIC, PCI devices and internal function IRQ routing are: - -IRQ16 HPET IRQ -IRQ17 HPET IRQ -IRQ18 HPET IRQ -IRQ19 HPET IRQ -IRQ20 UHCI Port 0-1 IRQ and Card Boot IRQ -IRQ21 EIDE IRQ and UHCI Port 4-5 IRQ -IRQ22 UHCI Port 2-3 and SDIO -IRQ23 Card Reader, EHCI Port 0-5 - -HPET IRQs - -Mode Timer0 Timer1 Timer2 --------------------------------------------- -Legacy 0(PIC)/2(APIC) 8(PIC)/8(APIC) - -NonLeg 16-19 APIC 16-19 APIC 11,16-19 APIC - - - 83c 0a display IRQ 10 -603c 0a SDIO IRQ 10 -683c 09 card controller IRQ 9 -803c 0a UHCI 01 IRQ 10 INTA -813c 09 UHCI 23 IRQ 9 INTB -823c 0b UHCI 45 IRQ 11 INTC -843c 0a EHCI IRQ 10 INTD -a03c 09 HDAC IRQ 9 - -[then] +purpose: Advanced Programmable Interrupt Controller driver +\ See license at end of file + +0 0 " fee00000" " /" begin-package + +" apic" name + +\ Docs: +\ "Intel Architecture Software Developer's Manual", Volume 3, chapter 7.5: +\ "Advanced Programmable Interrupt Controller (APIC)" +\ See linux/include/asm-i386/i82489.h for further details. + +: apic-base-msr! ( l -- ) 0 h# 1b msr! ; \ High 32 bits are unused +: apic-base-msr@ ( -- l ) h# 1b msr@ drop ; + +: apic-on ( -- ) apic-base-msr@ h# fff and h# 800 or apic-mmio-base or apic-base-msr! ; +: apic-off ( -- ) apic-base-msr@ h# 800 invert and apic-base-msr! ; + +0 value apic-base \ Needs to be mapped and set + +: apic! ( l reg -- ) apic-base + l! ; +: apic@ ( reg -- l ) apic-base + l@ ; +: apic-set ( mask reg -- ) dup apic@ rot or swap apic! ; +: apic-clr ( mask reg -- ) dup apic@ rot invert and swap apic! ; + +\ Support + +code cpu-capabilities ( -- n ) + 1 # ax mov + cpuid + dx push +c; +: apic-present? ( -- flag ) cpu-capabilities h# 200 and 0<> ; + +\ Methods + +: taskpri@ ( -- n ) h# 80 apic@ ; +: taskpri! ( n -- ) h# 80 apic! ; +: arbpri@ ( -- n ) h# 90 apic@ ; +: arbpri! ( n -- ) h# 90 apic! ; +: spiv@ ( -- n ) h# f0 apic@ ; +: spiv! ( n -- ) h# f0 apic! ; + +: id! ( id -- ) d# 24 lshift d# 20 apic! ; +: id@ ( -- id ) d# 20 apic@ d# 24 rshift ; +: lvt0@ ( -- n ) h# 350 apic@ ; +: lvt0! ( n -- ) h# 350 apic@ ; +: lvt1@ ( -- n ) h# 360 apic@ ; +: lvt1! ( n -- ) h# 360 apic@ ; + +: lvt0-disable-irq ( -- ) h# 10000 h# 350 apic-set ; \ Disable LINT0 +: lvt0-enable-irq ( -- ) h# 10000 h# 350 apic-clr ; \ Enable LINT0 +: lvt1-disable-irq ( -- ) h# 10000 h# 360 apic-set ; \ Disable LINT1 +: lvt1-enable-irq ( -- ) h# 10000 h# 360 apic-clr ; \ Enable LINT1 +: timer! ( l -- ) h# 380 apic@ drop h# 380 apic! ; +: timer@ ( -- l ) h# 390 apic@ ; +: timer-disable-irq ( -- ) h# 10000 h# 320 apic-set ; \ Dis IRQ when timer passes 0 +: timer-enable-irq ( -- ) h# 10000 h# 320 apic-clr ; \ Dis IRQ when timer passes 0 +: timer-periodic ( -- ) h# 30000 h# 320 apic-set ; +: timer-one-shot ( -- ) h# 320 apic@ h# 20000 invert and h# 10000 or h# 320 apic! ; +: timer-irq! ( vector -- ) h# 320 apic@ h# ff invert and or h# 10000 or h# 320 apic! ; +: perf-disable-irq ( -- ) h# 10000 h# 340 apic-set ; \ Dis IRQ when perf timer passes 0 +: perf-enable-irq ( -- ) h# 10000 h# 340 apic-clr ; \ Dis IRQ when perf timer passes 0 +: perf-irq! ( vector -- ) h# 340 apic@ h# ff invert and or h# 10000 or h# 340 apic! ; + +: ack-irq ( -- ) h# f0 apic@ drop 0 h# b0 apic! ; \ b0 is eoi + +: soft-on ( -- ) + spiv@ + h# 100 or \ APIC on + h# 200 invert and \ Focus processor checking + h# ff or \ Spurious IRQ vector ff + spiv! +; + + +: open ( -- okay? ) + apic-base 0= if + apic-mmio-base h# 400 " map-in" $call-parent to apic-base + apic-on + taskpri@ h# ff invert and taskpri! \ "Accept All" + soft-on + \ Virtual wire mode + \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_EXTINT (700) + lvt0@ h# 1ff00 invert and h# 5700 or lvt0! + \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_NMI (400) + lvt1@ h# 1ff00 invert and h# 5400 or lvt1! + then + + true +; +: close ( -- ) ; + +end-package + +0 0 " fec00000" " /" begin-package + +" io-apic" name + +0 value io-apic-base +: io-apic@ ( index -- l ) io-apic-base c! io-apic-base h# 10 + l@ ; +: io-apic! ( l index -- ) io-apic-base c! io-apic-base h# 10 + l! ; + +\ Debugging + +: .apic-mode ( low -- ) + 8 rshift 7 and case + 0 of ." Fixed " endof + 1 of ." LowPri " endof + 2 of ." SMI " endof + 3 of ." Res3 " endof + 4 of ." NMI " endof + 5 of ." Init " endof + 6 of ." Res6 " endof + 7 of ." Ext " endof + endcase +; + +: .apic-irq ( int# -- ) + 2* h# 10 + dup io-apic@ + ." Vec: " dup h# ff and 2 u.r space + dup .apic-mode + dup h# 800 and if ." Logical " else ." Physical " then + dup h# 1000 and if ." Pending " else ." Idle " then + dup h# 2000 and if ." Low " else ." High " then + dup h# 8000 and if + ." Level " dup h# 4000 and if ." IRR " else ." EOI " then + else ." Edge " then + h# 10000 and if ." Masked " else ." Open " then + 1+ io-apic@ + ." EDID: " dup d# 16 rshift h# ff and 2 u.r + ." Dest: " d# 24 rshift h# ff and 2 u.r + cr +; +: .apic-irqs ( -- ) + push-hex + 1 io-apic@ d# 16 rshift h# ff and 1+ 0 do + i 2 u.r space i .apic-irq + loop + pop-base +; + +\ Methods + +: trigger-irq ( irq# -- ) io-apic-base h# 20 + c! ; +: eoi ( vector -- ) io-apic-base h# 40 + c! ; + +: open ( -- okay? ) + io-apic-base 0= if + io-apic-mmio-base h# 80 " map-in" $call-parent to io-apic-base + then + true +; +: close ( -- ) ; + +end-package + +0 value apic-ih +0 value io-apic-ih +stand-init: APIC + " /apic" open-dev to apic-ih + " /io-apic" open-dev to io-apic-ih +; + +0 [if] +\ For tdcr (3e0): +\ Divisor: 1 2 4 8 16 32 64 128 +\ Value : b 0 1 2 3 8 9 a + +\ Timer base low bit at bit 18 +\ Timer base div is mask 2 + +\ Other regs: +\ LVR 0x30 +\ GET_APIC_VERSION(x) ((x)&0xFF) + +\ TPR 80 Task Priority, 000000xx only service interrupts higher than this value +\ APR 90 Arbitration Priority, used during bus arbitration +\ PPR a0 Processor Priority, depends complexly on TPR and incoming interrupt + +\ LDR 0xD0 Logical Destination Register II000000 II is logical APIC ID +\ DFR 0xE0 Destination Format Register M0000000 M is the model (F:flat or 0:cluster) +\ LVTERR 0x370 +\ TDCR 0x3E0 +\ ICR 0x310 Generate local interrupt by writing + +\ IRR 200 - 270 (8 registers - 256 bits) Request - bit is set if interrupt pending +\ ISR 100 - 170 (8 registers - 256 bits) Service - INTA latches highest priority bit +\ TMR 180 - 1F0 (8 registers - 256 bits) Bit is set for level, clear for edge. EOI commands sends EOI msg to all IOAPIC + +20 0 +30 50014 +80 f0 +d0 0 +e0 ffffffff +f0 10f +320 10000 Timer Masked off +340 10000 PCINT Masked off +350 700 LINT0 vector 0 mode ExtINT (111) Edge Trigger Active High +360 400 LINT1 vector 0 mode NMI (100) Edge Trigger Active High +370 10000 ERROR Masked off +380 0 +390 0 + +Io apic +259 9 (def 08) bit 0=1 enabe MSI Flat Mode Support + +25c 10 APIC D11 is masked to 1, cluster mode disabled +268-26f 0 .. 0 Priority of all CPUs = 0 +296 a - bit 0 = 0 Assert HDPWR# for both read / write cycles (other bits are enable V4 fast TRDY, dynamic HDPWR#) +297 1 - bit 1 = 0 Don't pipeline APIC requests, bit 0 = 1 enable redirect low priority apic reqs to CPU 0 +386 3f - bit 5 ena apic low interrupt arb, bit 4 io apic fec80000 - fecf.ffff to PCI2, bit 3 host snoop, 2 enable top sm mem, 1 enable sdio support for using system memory 4kbytes, 1 enable compatible smm +485 5 - bit 1 = 0 free-running apic clock (not dynamic) [Reserved in 855] +488 0 - bits 1 and 0 free running apic clocks [Reserved in 855] +4a2 d6 - bit 3 = 0 disable apic interface power management [Reserved in 855] + +-- Following registers in D0F5 are [Reserved in 855] +540 4c (default) - bit 7 disable legacy apic, c is irrelevant if disabled +541 0 (def) - irrelevant if 540 disabled +542 3 (def) - bit 3 disable intx transparent mode, bit 2 dis apic nonshare mode, bit 1 ena APIC interrupt disable, bit 0 enabe boot interrupt function +544 0 (def) - bit 7 boring, bit 1 dis pcie dev uses msi cycle wake up system from c3, bit 0 apic data voltage 2.5v +-- End reserved + + +io apic regs: fec0.0000 +00 index register for indirect regs +10 data register for indirect regs +20 write the IRQ # +40 EOI WO + +indirect io apic regs +00 1000000 IOAPIC ID is 1 +01 178003 (RO) version +02 1000000 Arb ID is 1 +03 1 Front side bus message delivery +10,11 0100.0000 . 0001.0000 DD00 . 0000 . 000 ooom . tips MVV +.. +3e,3f 0100.0000 . 0001.0000 + DD is destination APIC ID in physical mode (since bit 11 = 0) + m = 1 means masked + + +8848 0 bit 7 = 0 address bit 2 of FSBis not force low (default) +884d 1 bit 3=0 disable some funny thing about APCI Ch0 ext interrupt delivery (def), bit 2=0 dis ser irq always shared in APIC mode (def) + +PnP routing +8854 00 non-inverted PCI INT# +8855 a0 INTA IRQ10 +8856 b9 INTC IRQ11, INTB IRQ9 +8857 a0 INTD IRQ10 + +APIC Mode INTA-H +PIRQ16 A +PIRQ17 B +PIRQ18 C +PIRQ19 D +PIRQ20 E +PIRQ21 F +PIRQ22 G +PIRQ23 H + +8858 60 (def 40) bit 6 ena Internal APIC +885b 53 (def 01) bit 6 port 80 to LPC, bit 4 ena APIC clock gating, bit 3=0 dis bypass apic de-assert Msg, bit 1 res, bit 0 ena dynamic clock stop +886c 00 (def) bit 3 dis apic positive decode +88b0 30 (def 08) bits 5,4 ena uart 2,1, bit 3=0 disable apic C4P State Mode Control +88e7 80 (def 00) bit 7 enable apic cycle reflect to all bus master activity effective signal +88ec 00 (def 00) bits 7:4=0 disable V1 interrupt routing + +PMIO+65 bit 7 set to 1 to enable APIC interrupt wake up system from C4P state + +8f73 01 (def 00) bit4=0 enable APIC cycle block p2c write cycle (def), bit 0=1 enable pci broken master timer +8f74 0c (def 00) bit3=1 lock cycle issued by cpu block p2c cycles, bit2=1 APIC FSB directly up through CCA (not PCI) and 7c[1] must also be set [Bit 2 is reserved in 855] +8f7c 02 (def 02) bit2=1 APIC FSB directly up through CCA (not PCI) and 74[2] must also be set + +8f80 07 (def 00) bit0=1 APIC cycle blocks HDAC upstream write + +8fe0 93 (def 40) various. bit 3=0 dis APIC cycle flush HDAC Upstream Write Cycle [Reserved in 855] +8fe6 3f (def 01) bit5 supposedly reserved, bit4=1 split fecxx.xxxx range btw PCI1 and PCI2, bit3=1 processor MSI support enable, bit2=1 Top SMM enable, bit1=1 High SMM enable, bit0=1 Compatible SMM enable + + + +When enable internal APIC, PCI devices and internal function IRQ routing are: + +IRQ16 HPET IRQ +IRQ17 HPET IRQ +IRQ18 HPET IRQ +IRQ19 HPET IRQ +IRQ20 UHCI Port 0-1 IRQ and Card Boot IRQ +IRQ21 EIDE IRQ and UHCI Port 4-5 IRQ +IRQ22 UHCI Port 2-3 and SDIO +IRQ23 Card Reader, EHCI Port 0-5 + +HPET IRQs + +Mode Timer0 Timer1 Timer2 +-------------------------------------------- +Legacy 0(PIC)/2(APIC) 8(PIC)/8(APIC) - +NonLeg 16-19 APIC 16-19 APIC 11,16-19 APIC + + + 83c 0a display IRQ 10 +603c 0a SDIO IRQ 10 +683c 09 card controller IRQ 9 +803c 0a UHCI 01 IRQ 10 INTA +813c 09 UHCI 23 IRQ 9 INTB +823c 0b UHCI 45 IRQ 11 INTC +843c 0a EHCI IRQ 10 INTD +a03c 09 HDAC IRQ 9 + +[then]

1 0

r1177 - cpu/x86
by svn＠openfirmware.info 13 May '09

13 May '09

Author: wmb Date: 2009-05-13 00:47:27 +0200 (Wed, 13 May 2009) New Revision: 1177 Modified: cpu/x86/apic.fth Log: apic.fth - added some init stuff as suggested by the Linux driver. Modified: cpu/x86/apic.fth =================================================================== --- cpu/x86/apic.fth 2009-05-12 22:39:58 UTC (rev 1176) +++ cpu/x86/apic.fth 2009-05-12 22:47:27 UTC (rev 1177) @@ -31,18 +31,23 @@ dx push c; : apic-present? ( -- flag ) cpu-capabilities h# 200 and 0<> ; -: soft-on ( -- ) - h# f0 apic@ - h# 100 or \ APIC on - h# 200 invert and \ Focus processor checking - h# ff or \ Spurious IRQ vector ff - h# f0 apic! -; \ Methods +: taskpri@ ( -- n ) h# 80 apic@ ; +: taskpri! ( n -- ) h# 80 apic! ; +: arbpri@ ( -- n ) h# 90 apic@ ; +: arbpri! ( n -- ) h# 90 apic! ; +: spiv@ ( -- n ) h# f0 apic@ ; +: spiv! ( n -- ) h# f0 apic! ; + : id! ( id -- ) d# 24 lshift d# 20 apic! ; : id@ ( -- id ) d# 20 apic@ d# 24 rshift ; +: lvt0@ ( -- n ) h# 350 apic@ ; +: lvt0! ( n -- ) h# 350 apic@ ; +: lvt1@ ( -- n ) h# 360 apic@ ; +: lvt1! ( n -- ) h# 360 apic@ ; + : lvt0-disable-irq ( -- ) h# 10000 h# 350 apic-set ; \ Disable LINT0 : lvt0-enable-irq ( -- ) h# 10000 h# 350 apic-clr ; \ Enable LINT0 : lvt1-disable-irq ( -- ) h# 10000 h# 360 apic-set ; \ Disable LINT1 @@ -60,11 +65,28 @@ : ack-irq ( -- ) h# f0 apic@ drop 0 h# b0 apic! ; \ b0 is eoi +: soft-on ( -- ) + spiv@ + h# 100 or \ APIC on + h# 200 invert and \ Focus processor checking + h# ff or \ Spurious IRQ vector ff + spiv! +; + + : open ( -- okay? ) apic-base 0= if apic-mmio-base h# 400 " map-in" $call-parent to apic-base apic-on + taskpri@ h# ff invert and taskpri! \ "Accept All" + soft-on + \ Virtual wire mode + \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_EXTINT (700) + lvt0@ h# 1ff00 invert and h# 5700 or lvt0! + \ REMOTE_IRR (4000), SEND_PENDING (1000), DELIVERY_MODE_NMI (400) + lvt1@ h# 1ff00 invert and h# 5400 or lvt1! then + true ; : close ( -- ) ;

1 0

r1176 - cpu/x86/pc/olpc
by svn＠openfirmware.info 13 May '09

13 May '09

Author: wmb Date: 2009-05-13 00:39:58 +0200 (Wed, 13 May 2009) New Revision: 1176 Modified: cpu/x86/pc/olpc/versions.fth Log: OLPC build - changed commit ID of NANDblaster tree to pick up a CFLAGS setting that fixes the build for systems that default to _FORTIFY_SOURCE on. Modified: cpu/x86/pc/olpc/versions.fth =================================================================== --- cpu/x86/pc/olpc/versions.fth 2009-05-08 07:56:10 UTC (rev 1175) +++ cpu/x86/pc/olpc/versions.fth 2009-05-12 22:39:58 UTC (rev 1176) @@ -26,6 +26,6 @@ \ With a specific ID, mcastnand.bth will download a tarball without .git stuff. \ With "test", mcastnand.bth will clone the git head if build/multicast-nand/ \ is not already present, then you can modify the git subtree as needed. -macro: MCNAND_VERSION 0c73b4a084a27f0687b152dd0395c67fdf54b10f +macro: MCNAND_VERSION d2ad2d7714959dd91c0bed3bacb60243b22d7d03 \ macro: MCNAND_VERSION test \ macro: MCNAND_VERSION HEAD

1 0

r1175 - cpu/x86 cpu/x86/pc cpu/x86/pc/biosload cpu/x86/pc/olpc cpu/x86/pc/olpc/via dev/via/unichrome
by svn＠openfirmware.info 08 May '09

08 May '09

Author: wmb Date: 2009-05-08 09:56:10 +0200 (Fri, 08 May 2009) New Revision: 1175 Added: cpu/x86/apic.fth cpu/x86/pc/olpc/via/ioinit.fth cpu/x86/pc/olpc/via/romstart.bth cpu/x86/pc/olpc/via/startcacheasram.fth cpu/x86/pc/olpc/via/startcbgfxinit.fth cpu/x86/pc/olpc/via/startcfgio.fth cpu/x86/pc/olpc/via/startcominit.fth cpu/x86/pc/olpc/via/startdraminit.fth cpu/x86/pc/olpc/via/startgfxinit.fth cpu/x86/pc/olpc/via/starthostctl.fth cpu/x86/pc/olpc/via/startmacros.fth cpu/x86/pc/olpc/via/startmemtop.fth cpu/x86/pc/olpc/via/startmtrrinit.fth cpu/x86/pc/olpc/via/startusdelay.fth dev/via/unichrome/vgamodes.fth Modified: cpu/x86/pc/apic.fth cpu/x86/pc/biosload/config.fth cpu/x86/pc/linux.fth cpu/x86/pc/mmusetup.fth cpu/x86/pc/olpc/versions.fth cpu/x86/pc/olpc/via/addrs.fth cpu/x86/pc/olpc/via/config.fth cpu/x86/pc/olpc/via/devices.fth cpu/x86/pc/olpc/via/fw.bth cpu/x86/pc/olpc/via/olpc.bth cpu/x86/pc/olpc/via/pcinode.fth cpu/x86/pc/olpc/via/rmstart.fth cpu/x86/pc/olpc/via/romreset.bth cpu/x86/pc/olpc/via/versions.fth cpu/x86/pc/report.fth cpu/x86/pc/resetend.fth dev/via/unichrome/loadpkg.fth dev/via/unichrome/unichrome.fth Log: OLPC Via version - Omnibus checkpoint with better Linux support, text mode support for display, and a build option for using coreboot memory init code. Added: cpu/x86/apic.fth =================================================================== --- cpu/x86/apic.fth (rev 0) +++ cpu/x86/apic.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,288 @@ +purpose: Advanced Programmable Interrupt Controller driver +\ See license at end of file + +0 0 " fee00000" " /" begin-package + +" apic" name + +\ Docs: +\ "Intel Architecture Software Developer's Manual", Volume 3, chapter 7.5: +\ "Advanced Programmable Interrupt Controller (APIC)" +\ See linux/include/asm-i386/i82489.h for further details. + +: apic-base-msr! ( l -- ) 0 h# 1b msr! ; \ High 32 bits are unused +: apic-base-msr@ ( -- l ) h# 1b msr@ drop ; + +: apic-on ( -- ) apic-base-msr@ h# fff and h# 800 or apic-mmio-base or apic-base-msr! ; +: apic-off ( -- ) apic-base-msr@ h# 800 invert and apic-base-msr! ; + +0 value apic-base \ Needs to be mapped and set + +: apic! ( l reg -- ) apic-base + l! ; +: apic@ ( reg -- l ) apic-base + l@ ; +: apic-set ( mask reg -- ) dup apic@ rot or swap apic! ; +: apic-clr ( mask reg -- ) dup apic@ rot invert and swap apic! ; + +\ Support + +code cpu-capabilities ( -- n ) + 1 # ax mov + cpuid + dx push +c; +: apic-present? ( -- flag ) cpu-capabilities h# 200 and 0<> ; +: soft-on ( -- ) + h# f0 apic@ + h# 100 or \ APIC on + h# 200 invert and \ Focus processor checking + h# ff or \ Spurious IRQ vector ff + h# f0 apic! +; + +\ Methods + +: id! ( id -- ) d# 24 lshift d# 20 apic! ; +: id@ ( -- id ) d# 20 apic@ d# 24 rshift ; +: lvt0-disable-irq ( -- ) h# 10000 h# 350 apic-set ; \ Disable LINT0 +: lvt0-enable-irq ( -- ) h# 10000 h# 350 apic-clr ; \ Enable LINT0 +: lvt1-disable-irq ( -- ) h# 10000 h# 360 apic-set ; \ Disable LINT1 +: lvt1-enable-irq ( -- ) h# 10000 h# 360 apic-clr ; \ Enable LINT1 +: timer! ( l -- ) h# 380 apic@ drop h# 380 apic! ; +: timer@ ( -- l ) h# 390 apic@ ; +: timer-disable-irq ( -- ) h# 10000 h# 320 apic-set ; \ Dis IRQ when timer passes 0 +: timer-enable-irq ( -- ) h# 10000 h# 320 apic-clr ; \ Dis IRQ when timer passes 0 +: timer-periodic ( -- ) h# 30000 h# 320 apic-set ; +: timer-one-shot ( -- ) h# 320 apic@ h# 20000 invert and h# 10000 or h# 320 apic! ; +: timer-irq! ( vector -- ) h# 320 apic@ h# ff invert and or h# 10000 or h# 320 apic! ; +: perf-disable-irq ( -- ) h# 10000 h# 340 apic-set ; \ Dis IRQ when perf timer passes 0 +: perf-enable-irq ( -- ) h# 10000 h# 340 apic-clr ; \ Dis IRQ when perf timer passes 0 +: perf-irq! ( vector -- ) h# 340 apic@ h# ff invert and or h# 10000 or h# 340 apic! ; + +: ack-irq ( -- ) h# f0 apic@ drop 0 h# b0 apic! ; \ b0 is eoi + +: open ( -- okay? ) + apic-base 0= if + apic-mmio-base h# 400 " map-in" $call-parent to apic-base + apic-on + then + true +; +: close ( -- ) ; + +end-package + +0 0 " fec00000" " /" begin-package + +" io-apic" name + +0 value io-apic-base +: io-apic@ ( index -- l ) io-apic-base c! io-apic-base h# 10 + l@ ; +: io-apic! ( l index -- ) io-apic-base c! io-apic-base h# 10 + l! ; + +\ Debugging + +: .apic-mode ( low -- ) + 8 rshift 7 and case + 0 of ." Fixed " endof + 1 of ." LowPri " endof + 2 of ." SMI " endof + 3 of ." Res3 " endof + 4 of ." NMI " endof + 5 of ." Init " endof + 6 of ." Res6 " endof + 7 of ." Ext " endof + endcase +; + +: .apic-irq ( int# -- ) + 2* h# 10 + dup io-apic@ + ." Vec: " dup h# ff and 2 u.r space + dup .apic-mode + dup h# 800 and if ." Logical " else ." Physical " then + dup h# 1000 and if ." Pending " else ." Idle " then + dup h# 2000 and if ." Low " else ." High " then + dup h# 8000 and if + ." Level " dup h# 4000 and if ." IRR " else ." EOI " then + else ." Edge " then + h# 10000 and if ." Masked " else ." Open " then + 1+ io-apic@ + ." EDID: " dup d# 16 rshift h# ff and 2 u.r + ." Dest: " d# 24 rshift h# ff and 2 u.r + cr +; +: .apic-irqs ( -- ) + push-hex + 1 io-apic@ d# 16 rshift h# ff and 1+ 0 do + i 2 u.r space i .apic-irq + loop + pop-base +; + +\ Methods + +: trigger-irq ( irq# -- ) io-apic-base h# 20 + c! ; +: eoi ( vector -- ) io-apic-base h# 40 + c! ; + +: open ( -- okay? ) + io-apic-base 0= if + io-apic-mmio-base h# 80 " map-in" $call-parent to io-apic-base + then + true +; +: close ( -- ) ; + +end-package + +0 value apic-ih +0 value io-apic-ih +stand-init: APIC + " /apic" open-dev to apic-ih + " /io-apic" open-dev to io-apic-ih +; + +0 [if] +\ For tdcr (3e0): +\ Divisor: 1 2 4 8 16 32 64 128 +\ Value : b 0 1 2 3 8 9 a + +\ Timer base low bit at bit 18 +\ Timer base div is mask 2 + +\ Other regs: +\ LVR 0x30 +\ GET_APIC_VERSION(x) ((x)&0xFF) + +\ TPR 80 Task Priority, 000000xx only service interrupts higher than this value +\ APR 90 Arbitration Priority, used during bus arbitration +\ PPR a0 Processor Priority, depends complexly on TPR and incoming interrupt + +\ LDR 0xD0 Logical Destination Register II000000 II is logical APIC ID +\ DFR 0xE0 Destination Format Register M0000000 M is the model (F:flat or 0:cluster) +\ LVTERR 0x370 +\ TDCR 0x3E0 +\ ICR 0x310 Generate local interrupt by writing + +\ IRR 200 - 270 (8 registers - 256 bits) Request - bit is set if interrupt pending +\ ISR 100 - 170 (8 registers - 256 bits) Service - INTA latches highest priority bit +\ TMR 180 - 1F0 (8 registers - 256 bits) Bit is set for level, clear for edge. EOI commands sends EOI msg to all IOAPIC + +20 0 +30 50014 +80 f0 +d0 0 +e0 ffffffff +f0 10f +320 10000 Timer Masked off +340 10000 PCINT Masked off +350 700 LINT0 vector 0 mode ExtINT (111) Edge Trigger Active High +360 400 LINT1 vector 0 mode NMI (100) Edge Trigger Active High +370 10000 ERROR Masked off +380 0 +390 0 + +Io apic +259 9 (def 08) bit 0=1 enabe MSI Flat Mode Support + +25c 10 APIC D11 is masked to 1, cluster mode disabled +268-26f 0 .. 0 Priority of all CPUs = 0 +296 a - bit 0 = 0 Assert HDPWR# for both read / write cycles (other bits are enable V4 fast TRDY, dynamic HDPWR#) +297 1 - bit 1 = 0 Don't pipeline APIC requests, bit 0 = 1 enable redirect low priority apic reqs to CPU 0 +386 3f - bit 5 ena apic low interrupt arb, bit 4 io apic fec80000 - fecf.ffff to PCI2, bit 3 host snoop, 2 enable top sm mem, 1 enable sdio support for using system memory 4kbytes, 1 enable compatible smm +485 5 - bit 1 = 0 free-running apic clock (not dynamic) [Reserved in 855] +488 0 - bits 1 and 0 free running apic clocks [Reserved in 855] +4a2 d6 - bit 3 = 0 disable apic interface power management [Reserved in 855] + +-- Following registers in D0F5 are [Reserved in 855] +540 4c (default) - bit 7 disable legacy apic, c is irrelevant if disabled +541 0 (def) - irrelevant if 540 disabled +542 3 (def) - bit 3 disable intx transparent mode, bit 2 dis apic nonshare mode, bit 1 ena APIC interrupt disable, bit 0 enabe boot interrupt function +544 0 (def) - bit 7 boring, bit 1 dis pcie dev uses msi cycle wake up system from c3, bit 0 apic data voltage 2.5v +-- End reserved + + +io apic regs: fec0.0000 +00 index register for indirect regs +10 data register for indirect regs +20 write the IRQ # +40 EOI WO + +indirect io apic regs +00 1000000 IOAPIC ID is 1 +01 178003 (RO) version +02 1000000 Arb ID is 1 +03 1 Front side bus message delivery +10,11 0100.0000 . 0001.0000 DD00 . 0000 . 000 ooom . tips MVV +.. +3e,3f 0100.0000 . 0001.0000 + DD is destination APIC ID in physical mode (since bit 11 = 0) + m = 1 means masked + + +8848 0 bit 7 = 0 address bit 2 of FSBis not force low (default) +884d 1 bit 3=0 disable some funny thing about APCI Ch0 ext interrupt delivery (def), bit 2=0 dis ser irq always shared in APIC mode (def) + +PnP routing +8854 00 non-inverted PCI INT# +8855 a0 INTA IRQ10 +8856 b9 INTC IRQ11, INTB IRQ9 +8857 a0 INTD IRQ10 + +APIC Mode INTA-H +PIRQ16 A +PIRQ17 B +PIRQ18 C +PIRQ19 D +PIRQ20 E +PIRQ21 F +PIRQ22 G +PIRQ23 H + +8858 60 (def 40) bit 6 ena Internal APIC +885b 53 (def 01) bit 6 port 80 to LPC, bit 4 ena APIC clock gating, bit 3=0 dis bypass apic de-assert Msg, bit 1 res, bit 0 ena dynamic clock stop +886c 00 (def) bit 3 dis apic positive decode +88b0 30 (def 08) bits 5,4 ena uart 2,1, bit 3=0 disable apic C4P State Mode Control +88e7 80 (def 00) bit 7 enable apic cycle reflect to all bus master activity effective signal +88ec 00 (def 00) bits 7:4=0 disable V1 interrupt routing + +PMIO+65 bit 7 set to 1 to enable APIC interrupt wake up system from C4P state + +8f73 01 (def 00) bit4=0 enable APIC cycle block p2c write cycle (def), bit 0=1 enable pci broken master timer +8f74 0c (def 00) bit3=1 lock cycle issued by cpu block p2c cycles, bit2=1 APIC FSB directly up through CCA (not PCI) and 7c[1] must also be set [Bit 2 is reserved in 855] +8f7c 02 (def 02) bit2=1 APIC FSB directly up through CCA (not PCI) and 74[2] must also be set + +8f80 07 (def 00) bit0=1 APIC cycle blocks HDAC upstream write + +8fe0 93 (def 40) various. bit 3=0 dis APIC cycle flush HDAC Upstream Write Cycle [Reserved in 855] +8fe6 3f (def 01) bit5 supposedly reserved, bit4=1 split fecxx.xxxx range btw PCI1 and PCI2, bit3=1 processor MSI support enable, bit2=1 Top SMM enable, bit1=1 High SMM enable, bit0=1 Compatible SMM enable + + + +When enable internal APIC, PCI devices and internal function IRQ routing are: + +IRQ16 HPET IRQ +IRQ17 HPET IRQ +IRQ18 HPET IRQ +IRQ19 HPET IRQ +IRQ20 UHCI Port 0-1 IRQ and Card Boot IRQ +IRQ21 EIDE IRQ and UHCI Port 4-5 IRQ +IRQ22 UHCI Port 2-3 and SDIO +IRQ23 Card Reader, EHCI Port 0-5 + +HPET IRQs + +Mode Timer0 Timer1 Timer2 +-------------------------------------------- +Legacy 0(PIC)/2(APIC) 8(PIC)/8(APIC) - +NonLeg 16-19 APIC 16-19 APIC 11,16-19 APIC + + + 83c 0a display IRQ 10 +603c 0a SDIO IRQ 10 +683c 09 card controller IRQ 9 +803c 0a UHCI 01 IRQ 10 INTA +813c 09 UHCI 23 IRQ 9 INTB +823c 0b UHCI 45 IRQ 11 INTC +843c 0a EHCI IRQ 10 INTD +a03c 09 HDAC IRQ 9 + +[then] Modified: cpu/x86/pc/apic.fth =================================================================== --- cpu/x86/pc/apic.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/apic.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -1,9 +1,61 @@ -purpose: Advanced Programmable Interrupt Controller (APIC) driver +purpose: Advanced Programmable Interrupt Controller driver \ See license at end of file +\ Docs: +\ "Intel Architecture Software Developer's Manual", Volume 3, chapter 7.5: +\ "Advanced Programmable Interrupt Controller (APIC)" +\ See linux/include/asm-i386/i82489.h for further details. + +h# fee0.0000 constant apic-pa + +: apic-base-msr! ( l -- ) 0 h# 1b msr! ; \ High 32 bits are unused +: apic-base-msr@ ( -- l ) h# 1b msr@ drop ; + +0 value apic-base \ Needs to be mapped and set + +: apic! ( l reg -- ) apic-base + l! ; +: apic@ ( reg -- l ) apic-base + l! ; +: apic-id! ( id -- ) d# 24 lshift d# 20 apic! ; +: apic-id@ ( -- id ) d# 20 apic@ d# 24 rshift ; +: apic-set ( mask reg -- ) dup apic@ rot or swap apic! ; +: apic-clr ( mask reg -- ) dup apic@ rot invert and swap apic! ; +: apic-lvt0-disable-irq ( -- ) h# 10000 h# 350 apic-set ; \ Disable LINT0 +: apic-lvt0-enable-irq ( -- ) h# 10000 h# 350 apic-clr ; \ Enable LINT0 +: apic-lvt1-disable-irq ( -- ) h# 10000 h# 360 apic-set ; \ Disable LINT1 +: apic-lvt1-enable-irq ( -- ) h# 10000 h# 360 apic-clr ; \ Enable LINT1 +: apic-timer! ( l -- ) h# 380 apic@ drop h# 380 apic! ; +: apic-timer@ ( -- l ) h# 390 apic@ ; +: apic-timer-disable-irq ( -- ) h# 10000 h# 320 apic-set ; \ Dis IRQ when timer passes 0 +: apic-timer-enable-irq ( -- ) h# 10000 h# 320 apic-clr ; \ Dis IRQ when timer passes 0 +: apic-timer-periodic ( -- ) h# 30000 h# 320 apic-set ; +: apic-timer-one-shot ( -- ) h# 320 apic@ h# 20000 invert and h# 10000 or h# 320 apic! ; +: apic-timer-irq! ( vector -- ) h# 320 apic@ h# ff invert and or h# 10000 or h# 320 apic! ; +: apic-perf-disable-irq ( -- ) h# 10000 h# 340 apic-set ; \ Dis IRQ when perf timer passes 0 +: apic-perf-enable-irq ( -- ) h# 10000 h# 340 apic-clr ; \ Dis IRQ when perf timer passes 0 +: apic-perf-irq! ( vector -- ) h# 340 apic@ h# ff invert and or h# 10000 or h# 340 apic! ; +: apic-on ( -- ) apic-base-msr@ h# fff and h# 800 or apic-pa or apic-base-msr! ; +: apic-off ( -- ) apic-base-msr@ h# 800 invert and apic-base-msr! ; +code cpu-capabilities ( -- n ) + 1 # ax mov + cpuid + dx push +c; +: apic-present? ( -- flag ) cpu-capabilities h# 200 and 0<> ; +: apic-soft-on ( -- ) + h# f0 apic@ + h# 100 or \ APIC on + h# 200 invert and \ Focus processor checking + h# ff or \ Spurious IRQ vector ff + h# f0 apic! +; + +: apic-ack-irq ( -- ) h# f0 apic@ drop 0 h# b0 apic! ; \ b0 is eoi + +0 [if] : apic@ ( index -- l ) h# fec0.0000 c! h# fec0.0010 l@ ; : apic! ( l index -- ) h# fec0.0000 c! h# fec0.0010 l! ; : apic-eoi ( vector -- ) h# fec0.0040 l! ; +[then] : .apic-mode ( low -- ) 8 rshift 7 and case @@ -42,27 +94,150 @@ pop-base ; -\ LICENSE_BEGIN -\ Copyright (c) 2007 FirmWorks -\ -\ Permission is hereby granted, free of charge, to any person obtaining -\ a copy of this software and associated documentation files (the -\ "Software"), to deal in the Software without restriction, including -\ without limitation the rights to use, copy, modify, merge, publish, -\ distribute, sublicense, and/or sell copies of the Software, and to -\ permit persons to whom the Software is furnished to do so, subject to -\ the following conditions: -\ -\ The above copyright notice and this permission notice shall be -\ included in all copies or substantial portions of the Software. -\ -\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE -\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION -\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION -\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -\ -\ LICENSE_END +0 [if] +\ For tdcr (3e0): +\ Divisor: 1 2 4 8 16 32 64 128 +\ Value : b 0 1 2 3 8 9 a + +\ Timer base low bit at bit 18 +\ Timer base div is mask 2 + +\ Other regs: +\ LVR 0x30 +\ GET_APIC_VERSION(x) ((x)&0xFF) + +\ TPR 80 Task Priority, 000000xx only service interrupts higher than this value +\ APR 90 Arbitration Priority, used during bus arbitration +\ PPR a0 Processor Priority, depends complexly on TPR and incoming interrupt + +\ LDR 0xD0 Logical Destination Register II000000 II is logical APIC ID +\ DFR 0xE0 Destination Format Register M0000000 M is the model (F:flat or 0:cluster) +\ LVTERR 0x370 +\ TDCR 0x3E0 +\ ICR 0x310 Generate local interrupt by writing + +\ IRR 200 - 270 (8 registers - 256 bits) Request - bit is set if interrupt pending +\ ISR 100 - 170 (8 registers - 256 bits) Service - INTA latches highest priority bit +\ TMR 180 - 1F0 (8 registers - 256 bits) Bit is set for level, clear for edge. EOI commands sends EOI msg to all IOAPIC + +20 0 +30 50014 +80 f0 +d0 0 +e0 ffffffff +f0 10f +320 10000 Timer Masked off +340 10000 PCINT Masked off +350 700 LINT0 vector 0 mode ExtINT (111) Edge Trigger Active High +360 400 LINT1 vector 0 mode NMI (100) Edge Trigger Active High +370 10000 ERROR Masked off +380 0 +390 0 + +Io apic +259 9 (def 08) bit 0=1 enabe MSI Flat Mode Support + +25c 10 APIC D11 is masked to 1, cluster mode disabled +268-26f 0 .. 0 Priority of all CPUs = 0 +296 a - bit 0 = 0 Assert HDPWR# for both read / write cycles (other bits are enable V4 fast TRDY, dynamic HDPWR#) +297 1 - bit 1 = 0 Don't pipeline APIC requests, bit 0 = 1 enable redirect low priority apic reqs to CPU 0 +386 3f - bit 5 ena apic low interrupt arb, bit 4 io apic fec80000 - fecf.ffff to PCI2, bit 3 host snoop, 2 enable top sm mem, 1 enable sdio support for using system memory 4kbytes, 1 enable compatible smm +485 5 - bit 1 = 0 free-running apic clock (not dynamic) [Reserved in 855] +488 0 - bits 1 and 0 free running apic clocks [Reserved in 855] +4a2 d6 - bit 3 = 0 disable apic interface power management [Reserved in 855] + +-- Following registers in D0F5 are [Reserved in 855] +540 4c (default) - bit 7 disable legacy apic, c is irrelevant if disabled +541 0 (def) - irrelevant if 540 disabled +542 3 (def) - bit 3 disable intx transparent mode, bit 2 dis apic nonshare mode, bit 1 ena APIC interrupt disable, bit 0 enabe boot interrupt function +544 0 (def) - bit 7 boring, bit 1 dis pcie dev uses msi cycle wake up system from c3, bit 0 apic data voltage 2.5v +-- End reserved + + +io apic regs: fec0.0000 +00 index register for indirect regs +10 data register for indirect regs +20 write the IRQ # +40 EOI WO + +indirect io apic regs +00 1000000 IOAPIC ID is 1 +01 178003 (RO) version +02 1000000 Arb ID is 1 +03 1 Front side bus message delivery +10,11 0100.0000 . 0001.0000 DD00 . 0000 . 000 ooom . tips MVV +.. +3e,3f 0100.0000 . 0001.0000 + DD is destination APIC ID in physical mode (since bit 11 = 0) + m = 1 means masked + + +8848 0 bit 7 = 0 address bit 2 of FSBis not force low (default) +884d 1 bit 3=0 disable some funny thing about APCI Ch0 ext interrupt delivery (def), bit 2=0 dis ser irq always shared in APIC mode (def) + +PnP routing +8854 00 non-inverted PCI INT# +8855 a0 INTA IRQ10 +8856 b9 INTC IRQ11, INTB IRQ9 +8857 a0 INTD IRQ10 + +APIC Mode INTA-H +PIRQ16 A +PIRQ17 B +PIRQ18 C +PIRQ19 D +PIRQ20 E +PIRQ21 F +PIRQ22 G +PIRQ23 H + +8858 60 (def 40) bit 6 ena Internal APIC +885b 53 (def 01) bit 6 port 80 to LPC, bit 4 ena APIC clock gating, bit 3=0 dis bypass apic de-assert Msg, bit 1 res, bit 0 ena dynamic clock stop +886c 00 (def) bit 3 dis apic positive decode +88b0 30 (def 08) bits 5,4 ena uart 2,1, bit 3=0 disable apic C4P State Mode Control +88e7 80 (def 00) bit 7 enable apic cycle reflect to all bus master activity effective signal +88ec 00 (def 00) bits 7:4=0 disable V1 interrupt routing + +PMIO+65 bit 7 set to 1 to enable APIC interrupt wake up system from C4P state + +8f73 01 (def 00) bit4=0 enable APIC cycle block p2c write cycle (def), bit 0=1 enable pci broken master timer +8f74 0c (def 00) bit3=1 lock cycle issued by cpu block p2c cycles, bit2=1 APIC FSB directly up through CCA (not PCI) and 7c[1] must also be set [Bit 2 is reserved in 855] +8f7c 02 (def 02) bit2=1 APIC FSB directly up through CCA (not PCI) and 74[2] must also be set + +8f80 07 (def 00) bit0=1 APIC cycle blocks HDAC upstream write + +8fe0 93 (def 40) various. bit 3=0 dis APIC cycle flush HDAC Upstream Write Cycle [Reserved in 855] +8fe6 3f (def 01) bit5 supposedly reserved, bit4=1 split fecxx.xxxx range btw PCI1 and PCI2, bit3=1 processor MSI support enable, bit2=1 Top SMM enable, bit1=1 High SMM enable, bit0=1 Compatible SMM enable + + + +When enable internal APIC, PCI devices and internal function IRQ routing are: + +IRQ16 HPET IRQ +IRQ17 HPET IRQ +IRQ18 HPET IRQ +IRQ19 HPET IRQ +IRQ20 UHCI Port 0-1 IRQ and Card Boot IRQ +IRQ21 EIDE IRQ and UHCI Port 4-5 IRQ +IRQ22 UHCI Port 2-3 and SDIO +IRQ23 Card Reader, EHCI Port 0-5 + +HPET IRQs + +Mode Timer0 Timer1 Timer2 +-------------------------------------------- +Legacy 0(PIC)/2(APIC) 8(PIC)/8(APIC) - +NonLeg 16-19 APIC 16-19 APIC 11,16-19 APIC + + + 83c 0a display IRQ 10 +603c 0a SDIO IRQ 10 +683c 09 card controller IRQ 9 +803c 0a UHCI 01 IRQ 10 INTA +813c 09 UHCI 23 IRQ 9 INTB +823c 0b UHCI 45 IRQ 11 INTC +843c 0a EHCI IRQ 10 INTD +a03c 09 HDAC IRQ 9 + +[then] Modified: cpu/x86/pc/biosload/config.fth =================================================================== --- cpu/x86/pc/biosload/config.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/biosload/config.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -1,27 +1,34 @@ \ See license at end of file -purpose: Establish configuration definitions +purpose: Configuration for loading from a USB key via Syslinux \ --- The environment that "boots" OFW --- \ - Image Format - Example Media - previous stage bootloader -\ Load and run in VirtualBox (also works for other emulators) -create virtualbox-loaded +\ - (Syslinux) COM32 format - USB Key w/ FAT FS - Syslinux +create syslinux-loaded -\ create debug-startup +create via-demo + +create debug-startup + +create virtual-mode +create linux-support \ create serial-console +\ create use-usb-debug-port +create pc + +\ create pseudo-nvram create resident-packages create addresses-assigned \ Don't reassign PCI addresses \ create virtual-mode -\ create use-root-isa -create use-timestamp-counter -create use-pci-isa -create use-isa-ide +create use-root-isa +\ create use-isa-ide create use-ega create use-elf -\ create use-ne2000 create use-watch-all -create use-null-nvram -\ create no-floppy-node +\ create use-null-nvram +create pseudo-nvram +create no-floppy-node fload ${BP}/cpu/x86/pc/biosload/addrs.fth Modified: cpu/x86/pc/linux.fth =================================================================== --- cpu/x86/pc/linux.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/linux.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -97,6 +97,17 @@ : set-parameters ( cmdline$ -- ) screen-info linux-params /screen-info move \ Ostensibly screen info + h# 40 +lp h# 14 erase \ apm_bios_info (APM BIOS info) + h# 54 +lp h# 0c erase \ pad2 + h# 60 +lp h# 10 erase \ ist_info (Intel SpeedStep BIOS info) + h# 70 +lp h# 10 erase \ pad3 + h# 80 +lp h# 10 erase \ hd0_info (obsolete) + h# 90 +lp h# 10 erase \ hd1_info (obsolete) + h# a0 +lp h# 10 erase \ sys_desc_table (from MCA - Microchannel) + h# b0 +lp h# 90 erase \ pad4 + h# 140 +lp h# 80 erase \ edid_info + h# 1c0 +lp h# 20 erase \ efi_info + linux-memtop ( #bytes ) d# 1023 invert and d# 1024 / ( #kbytes ) d# 1024 - h# 002 +lp w! \ Kbytes of extended (not the 1st meg) memory Modified: cpu/x86/pc/mmusetup.fth =================================================================== --- cpu/x86/pc/mmusetup.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/mmusetup.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -5,11 +5,18 @@ \ established by initmmu.fth [ifdef] total-ram -: (memory?) ( adr -- flag ) total-ram u< ; +: in-ram? ( adr -- flag ) total-ram u< ; [else] h# 8000.0000 value ram-boundary -: (memory?) ( adr -- flag ) ram-boundary u< ; +: in-ram? ( adr -- flag ) ram-boundary u< ; [then] +: (memory?) ( adr -- flag ) + dup in-ram? if ( adr ) + h# a0000 h# 100000 within 0= \ Don't cache the DOS Hole + else ( adr ) + drop false + then +; ' (memory?) is memory? dev /mmu Modified: cpu/x86/pc/olpc/versions.fth =================================================================== --- cpu/x86/pc/olpc/versions.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/versions.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -2,7 +2,7 @@ \ The overall firmware revision macro: FW_MAJOR E -macro: FW_MINOR 41 +macro: FW_MINOR 41a \ The EC microcode macro: EC_VERSION e34 Modified: cpu/x86/pc/olpc/via/addrs.fth =================================================================== --- cpu/x86/pc/olpc/via/addrs.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/addrs.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -50,7 +50,7 @@ h# fe01.b000 constant ehci-pci-base h# fe02.4000 constant sd-pci-base h# fe02.8000 constant camera-pci-base -h# fec0.0000 constant ioapic-mmio-base +h# fec0.0000 constant io-apic-mmio-base h# fed0.0000 constant hpet-mmio-base h# fed3.0000 constant spi-mmio-base h# fed4.0000 constant wdt-mmio-base Modified: cpu/x86/pc/olpc/via/config.fth =================================================================== --- cpu/x86/pc/olpc/via/config.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/config.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -11,6 +11,8 @@ \ - OBMD format - ROM - direct boot from ROM create rom-loaded +create coreboot-loaded + create virtual-mode create addresses-assigned \ Define if base addresses are already assigned \ create serial-console \ Define to default to serial port for console Modified: cpu/x86/pc/olpc/via/devices.fth =================================================================== --- cpu/x86/pc/olpc/via/devices.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/devices.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -19,6 +19,7 @@ fload ${BP}/cpu/x86/acpitimer.fth fload ${BP}/cpu/x86/pc/olpc/via/smbus.fth \ SMBUS driver +fload ${BP}/cpu/x86/apic.fth \ APIC driver stand-init: CPU node d# 1,500,000,000 " VIA,C7" @@ -33,7 +34,8 @@ warning @ warning off : stand-init-io ( -- ) stand-init-io - acpi-calibrate-tsc +\ acpi-calibrate-tsc + d# 800 to us-factor d# 800000 to ms-factor ; warning ! @@ -128,6 +130,7 @@ devalias d disk devalias n nand devalias sd /sd/disk +devalias c /ide@0/disk [ifndef] demo-board .( Removing ctlr-selftest from 8042 open !!!) cr @@ -161,6 +164,8 @@ fload ${BP}/ofw/core/filecmds.fth \ File commands: dir, del, ren, etc. fload ${BP}/cpu/x86/pc/olpc/cmos.fth \ CMOS RAM indices are 1f..ff , above RTC +.( XXX Not clearing CMOS) cr +patch noop init-bios-cmos stand-init devalias nand /nandflash devalias mtd /nandflash Modified: cpu/x86/pc/olpc/via/fw.bth =================================================================== --- cpu/x86/pc/olpc/via/fw.bth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/fw.bth 2009-05-08 07:56:10 UTC (rev 1175) @@ -383,6 +383,17 @@ \needs ramdisk " " d# 128 config-string ramdisk " " ' boot-file set-config-string-default \ Let the boot script set the cmdline +: upup + " u:\irdpup.gz" to ramdisk + " console=ttyS0,115200 ide=nodma pmedia=ataflash nosmp noacpi" to boot-file + " u:\vmlpup" to boot-device +; +: cpup + " c:\initrd.gz" to ramdisk + " console=ttyS0,115200 ide=nodma pmedia=ataflash nosmp noacpi" to boot-file + " c:\vmlinuz" to boot-device +; + [ifdef] Later : dimmer ( -- ) screen-ih if " dimmer" screen-ih $call-method then ; : brighter ( -- ) screen-ih if " brighter" screen-ih $call-method then ; Added: cpu/x86/pc/olpc/via/ioinit.fth =================================================================== --- cpu/x86/pc/olpc/via/ioinit.fth (rev 0) +++ cpu/x86/pc/olpc/via/ioinit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,241 @@ +\ Also from FinalSetting.c + + 0 4 devfunc \ PM_table + a0 80 80 mreg \ Enable dynamic power management (coreboot for vx800 uses f0; 70 bits are reserved on vx855) + a1 e0 e0 mreg \ Dynamic power management for DRAM + a2 d6 d6 mreg \ Dynamic clock stop controls (coreboot for vx8000 uses ff fe; 29 bits are reserved on vx800) + a3 80 80 mreg \ Toggle reduction on + a5 81 81 mreg \ "Reserved" + end-table + +\ cache_as_ram_auto.c : enable_shadow_ram + + 0 3 devfunc +\ Initial DOS hole settings, so the firmware can set things up + 80 ff ff mreg \ Enable R/W memory access to Cxxxx bank + 81 ff ff mreg \ Enable R/W memory access to Dxxxx bank + 82 ff ff mreg \ Enable R/W memory access to Exxxx bank + 83 30 30 mreg \ Enable R/W memory access to Fxxxx bank (30), no memory hole (0c), SMM switching of Axxxx bank (03) + +\ Final DOS hole settings, after stuff has been copied in, for reference +\ 80 ff 2a mreg \ CC000-CFFFF off, C0000-C7FFF RO +\ 81 ff 00 mreg \ D0000-DFFFF off +\ 82 ff aa mreg \ E0000-EFFFF RO +\ 83 ff 20 mreg \ Enable R/W memory access to Fxxxx bank (20), no memory hole (0c), SMM switching of Axxxx bank (03) + end-table + + 0 3 devfunc + 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) + end-table + + \ Additional Power Management Setup not in coreboot + 0 2 devfunc + 76 08 08 mreg \ AGTL Power down buffers in S3 + 92 ff 40 mreg \ ACPI IO Base address + end-table + + 0 4 devfunc + 84 ff db mreg \ Dynamic clocks + 85 ff 05 mreg \ Dynamic clocks + 89 ff f8 mreg \ Dynamic clocks + 8b ff bf mreg \ Dynamic clocks + 8d ff 30 mreg \ Self-refresh in C3 and C4 + 90 ff ff mreg \ Gate clocks + 91 ff ff mreg \ Gate clocks + 92 cc cc mreg \ Dynamic buffer control, power down comparators + a8 20 20 mreg \ Central traffic controller dynamic clock stop + end-table + + \ Bus tuning + 0 5 devfunc + 54 8f 80 mreg \ SM request gets high priority, PCCA occupancy timer off + 55 0f 04 mreg \ PCCA P2C Promote Timer value 4 + 59 0f 02 mreg \ IGFX Promote Timer value 2 + 5f 0f 06 mreg \ IPI Promote Timer value 6 + 64 20 00 mreg \ Upstream MSI doesn't flush queued P2C Write Data + 80 0b 08 mreg \ Upstream Request 1T earlier + 83 ff 81 mreg \ P2PW down arb timer timer 8, P2PR down arb timer timer 1 + 84 7f 28 mreg \ Downstream arbitration Timeout timer for C2P + 85 c0 c0 mreg \ Abort P2P cycle to PCI1, CPU to PCI1 cycle blocks next C2P cycle + a3 01 01 mreg \ 01 res be like Phx + end-table + + d# 12 0 devfunc \ SDIO tuning + 44 01 01 mreg \ Enable backdoor + 8b 05 01 mreg \ Do not report 1.8V support + 8c c3 03 mreg \ Falling edge trigger for Slots 1 and 2 data in high speed + 8e ff 7e mreg \ Delay host clock for Slots 1, 2, 3 by 4.8 nS + 8f 09 01 mreg \ Falling edge trigger on slot 3 output clock under high speed +[ifdef] demo-board + 99 ff f9 mreg \ Two slots +[else] + 99 ff fa mreg \ Three slots +[then] + end-table + + d# 15 0 devfunc \ EIDE tuning + 40 02 02 mreg \ Enable primary channel + 4a ff 5e mreg \ Drive1 timing + 4b ff 20 mreg \ Drive0 timing + 4c f0 60 mreg \ Address setup time + 52 df 0e mreg \ Ultra dma wait strobe timing + 53 df c6 mreg \ Ultra DMA mode control + c4 1d 18 mreg \ Config 1 +\ d4 ac 24 mreg \ Config 3 + d4 bc 34 mreg \ Config 3 - 10 res be like Phx + end-table + + \ USB Tuning + d# 16 0 devfunc \ UHCI Ports 0,1 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 1 devfunc \ UHCI Ports 2,3 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 2 devfunc \ UHCI Ports 4,5 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 4 devfunc \ EHCI + 42 40 40 mreg \ Enable Check PRESOF of ITDOUT Transaction during Fetching Data from DRAM + 43 c0 c0 mreg \ Enable Dynamic Clock Scheme - 66MHz (80) & 33MHz (40) + 48 20 00 mreg \ Disable DMA bursts + 4c 03 03 mreg \ Squelch detector fine tune - 01 is 112.5 mV + 4d 10 10 mreg \ 10 res be like Phx + 4e 03 03 mreg \ reserved bit - setting is appropriate for vx800 03 res be like Phx + 4f 10 10 mreg \ Enable Clear RUN Bit when EHCI_IDLE + 50 80 80 mreg \ Fetch one more QH before de-asserting Doorbell + 52 ff 11 mreg \ be like Phx + 53 ff 3f mreg \ be like Phx + 55 ff ff mreg \ Disconnect level fine tune - 575 mV for ports 0-3 + 56 0f 0f mreg \ Disconnect level fine tune - 575 mV for ports 4-5 + 5a ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 0,1 + 5b ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 2,3 + 5c 0f 00 mreg \ DPLL Track Speed 2, DPLL Lock Speed 2 + 5d ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 4,5 + 64 05 05 mreg \ Bump NULL-SOF valid time to 8 micro frames (04), Inhibit C4 state on USB 1.1 ISO activity (01) + end-table + + d# 17 0 devfunc \ Bus control and power management + 40 44 44 mreg \ Enable I/O Recovery time (40), Enable ports 4d0/4d1 for edge/level setting (04) + 42 fc f0 mreg \ Various setting related to DMA line buffers + 43 0f 0b mreg \ Enable PCI delayed transactions (08), Write transaction timer (02), Read transaction timer (01) +\ 4d 01 01 mreg \ Enable LPC TPM +\ 4e 08 08 mreg \ Enable ports 74/75 for CMOS RAM access + 4e 18 18 mreg \ Enable ports 74/75 for CMOS RAM access - 10 res be like Phx +\ 50 40 40 mreg \ Disable USB device mode + 50 c0 c0 mreg \ Disable USB device mode - 80 res be like Phx + 52 1b 19 mreg \ No wait state between SIRQ transactions (10), Enable SIRQ (08), SIRQ frame is 6 clocks (3>1) + 53 80 80 mreg \ Enable PC/PCI DMA + 55 ff a0 mreg \ INTA and External General interrupt routing - INTA:IRQ10 + 56 ff b9 mreg \ INTB,C routing - INTC:IRQ11, INTB:IRQ9 + 57 f0 a0 mreg \ INTD routing - INTD:IRQ10 + 58 40 40 mreg \ Enable Internal APIC +\ 5b 10 10 mreg \ Enable APIC Clock Gating + 5b 53 53 mreg \ Enable APIC Clock Gating - 43 res be like Phx + 68 80 80 mreg \ Enable HPETs + 69 ff 00 mreg \ HPET base low + 6a ff d0 mreg \ HPET base mid + 6b ff fe mreg \ HPET base high + 6e ff 18 mreg \ COMB not pos decoded but otherwise set to 2f8, COMA pos decoded at 3f8 + 70 ff 06 mreg \ SVID backdoor + 71 ff 11 mreg \ SVID backdoor + 72 ff 37 mreg \ SVID backdoor + 73 ff 33 mreg \ SVID backdoor + 80 20 20 mreg \ Debounce power button + 81 08 08 mreg \ 32-bit ACPI timer +\ 81 08 00 mreg \ 24-bit ACPI timer - why? + 84 ff da mreg \ IRQs 7,6,4,3,1 are primary wakeups + 85 ff 40 mreg \ IRQ 14 is primary wakeup + 8a 9f 1f mreg \ C-state auto switching with normal latencies +[ifdef] demo-board + 8d 18 18 mreg \ fast clock as throttle timer tick, hold SMI# low until event status cleared (FIXME for OLPC) +[else] + 8d 18 10 mreg \ fast clock as throttle timer tick, do not hold SMI# low +[then] + + 94 ff 68 mreg \ be like Phx + 95 ff c1 mreg \ be like Phx + 97 ff 80 mreg \ be like Phx + + 9b ff 88 mreg \ 80 res be like Phx + 9f ff ad mreg \ be like Phx (slot 3 is Card Reader not SDIO) + + b4 80 00 mreg \ No positive decoding for UART1 ??? + b7 40 40 mreg \ 40 res be like Phx + b8 fc 80 mreg \ UART DMA Control Registers Base low (port is 4080) + b9 ff 40 mreg \ UART DMA Control Registers Base high + ba 77 44 mreg \ COM1 DMA Channel Selects - DMA0 for both Transmit and Receive + bc ff 00 mreg \ SPI MMIO Base Address 15:8 (address is fed30000) + bd ff d3 mreg \ SPI MMIO Base Address 23:16 + be ff fe mreg \ SPI MMIO Base Address 31:24 + d0 f0 00 mreg \ SMBUS IO Base Address low (port is 4100) + d1 ff 41 mreg \ SMBUS IO Base Address high + d2 0f 01 mreg \ Enable SMBUS and set other characteristics + e2 80 80 mreg \ Inhibit C4 during USB isochronous transaction + e4 ff a0 mreg \ Enable short C3/C4 (80), select various multi-function pins + e5 60 60 mreg \ Enable NM bus master as source of bus master status, enable NB int to wakeup from Cx + e6 20 20 mreg \ Enable USB Device Mode Bus Master as Break Event + e7 80 80 mreg \ Enable APIC Cycle Reflect to ALL Bus Master Activity Effective Signal + fc 06 04 mreg \ DPSLP# to SLP# Latency Adjustment - 22.5 us + end-table + + d# 17 7 devfunc \ South-North Module Interface Control + 50 df 08 mreg \ SM priorities - HDAC high priority, others low + 51 80 80 mreg \ Enable subtractive decode for P2P cycle + 54 7b 02 mreg \ CCA REQ timing - synchronize USB REQ but not others +0 [if] + 61 ff 2a mreg \ Page C ROM shadow - C0000-CBFFF RO, CC000-CFFFF off + 62 ff 00 mreg \ Page D ROM shadow - D0000-DFFFF off + 63 f3 a0 mreg \ Page E/F ROM shadow - E0000-EFFFF RO, F0000-FFFFF RO, no memory hole + 64 ff aa mreg \ Page E ROM shadow - E0000-EFFFF RO +[then] + 70 fb 82 mreg \ CPU to PCI flow control - CPU to PCI posted write, Enable Delay Transaction + 72 af ee mreg \ Read caching and prefix - various knobs (40 bit is reserved) + 73 79 01 mreg \ Enable PCI broken master timer & various knobs +\ 74 d8 08 mreg \ Lock Cycle Issued by CPU Blocks P2C Cycles (04 bit is reserved) + 74 dc 0c mreg \ Lock Cycle Issued by CPU Blocks P2C Cycles - 04 res be like Phx + 75 ff 0f mreg \ Use New grant mechanism for PCI arbitration, PCI Master Bus Timeout is 7x16 PCI clock + 76 fd 50 mreg \ Enable PCI parking, Grant to CPU after 2 PC master grants + 77 58 48 mreg \ PCI1 FIFO empty blocks CPU to PCI read, Read FIFO times out after 1 ms + 80 07 07 mreg \ PCI1 and HDAC upstream read does not pass write, APCI blocks upstream write +\ 82 3e 20 mreg \ Monitor CCA and SDIO2 + 82 3f 21 mreg \ Monitor CCA and SDIO2 - 01 res be like Phx +\ e0 e0 80 mreg \ Dynamic CCA clock + e0 f3 93 mreg \ Dynamic CCA clock - 13 res be like Phx +\ e2 1e 00 mreg \ Use dynamic clocks for Downstream Interface, PCI1, Downstream HDAC, Downstream SM Internal PCI device + e2 1f 00 mreg \ Use dynamic clocks for Downstream Interface, PCI1, Downstream HDAC, Downstream SM Internal PCI device 01 res be like Phx + e3 ff 5e mreg \ PCI1 dynamic clock, PCI clock on when GRANT# asserted, Enable P2CR data timeout at 7*8 PCI clocks +\ e6 1f 1f mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) + e6 1f 19 mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) +\ fc 40 40 mreg \ Enable CCA Read Clock When MTXCTL state machine is not idle + fc 48 48 mreg \ Enable CCA Read Clock When MTXCTL state machine is not idle - 08 res be like Phx + end-table + + d# 20 0 devfunc + 41 01 01 mreg \ Dynamic clock for HDAC + end-table + + \ APIC setup + 0 2 devfunc + 59 01 01 mreg \ MSI Flat model support + 5c 10 10 mreg \ Data bit 11 mask for MSI + 97 01 01 mreg \ Redirect lowest priority MSI requests to APIC 00 + end-table + + 0 3 devfunc + 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) + end-table + + \ Low 2 bits of 86: + \ x1 to write to SMM shadow memory behind VGA + \ 00 to run - Axxxxx hits VGA in normal mode, hits shadow DRAM in SMM + \ 01 to access VGA when in SMM (data cycles only) Modified: cpu/x86/pc/olpc/via/olpc.bth =================================================================== --- cpu/x86/pc/olpc/via/olpc.bth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/olpc.bth 2009-05-08 07:56:10 UTC (rev 1175) @@ -3,6 +3,7 @@ command: &builder &this in: ${BP}/cpu/x86/pc/olpc/via/build/ec.img in: ${BP}/cpu/x86/pc/olpc/via/build/romreset.di +in: ${BP}/cpu/x86/pc/olpc/via/build/romstart.di in: ${BP}/cpu/x86/pc/olpc/via/build/resume.di in: ${BP}/cpu/x86/pc/olpc/via/build/rmstart.img in: ${BP}/cpu/x86/pc/olpc/via/build/paging.di @@ -59,8 +60,11 @@ dropin-base rom-pa - pad-file +[ifdef] coreboot-loaded + " romstart.di" $add-file +[else] " romreset.di" $add-file -\ " romstart.di" $add-file +[then] [ifdef] Later " resume.di" $add-file @@ -82,6 +86,7 @@ " ${BP}/dev/usb2/device/storage/build/usbstorage.fc" " usbstorage" $add-deflated-dropin \ " mrv8686.bin" " mrv8686.bin" $add-deflated-dropin + " ${BP}/dev/pci/build/pcibridg.fc" " class060400" $add-deflated-dropin " ${BP}/dev/ide/build/leghier.fc" " class01018a" $add-deflated-dropin " ${BP}/dev/mmc/sdhci/build/sdhci.fc" " class080501" $add-deflated-dropin " ${BP}/dev/mmc/sdhci/build/sdmmc.fc" " sdmmc" $add-deflated-dropin @@ -145,6 +150,10 @@ " ${BP}/cpu/x86/pc/olpc/via/build/nandblaster_tx.bin" " nb_tx" $add-deflated-dropin [then] +[ifdef] coreboot-loaded + /rom h# 10000 - pad-file \ coreboot init image must be in last FLASH block + " coreboot.img" $add-file +[else] /rom h# 400 - pad-file \ rmstart image must start 0x400 from end " rmstart.img" $add-file @@ -184,6 +193,7 @@ /rom h# 80 - ofd @ fseek sipbuf /sipbuf ofd @ fputs +[then] ofd @ fclose Modified: cpu/x86/pc/olpc/via/pcinode.fth =================================================================== --- cpu/x86/pc/olpc/via/pcinode.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/pcinode.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -67,7 +67,7 @@ also forth definitions : pci-probe-list ( -- adr len ) - " 1,c,f,10,13,14" + " 1,2,3,4,5,6,7,8,9,a,b,c,d,e,f,10,11,12,13,14" ; \ " c,f" dup config-string pci-probe-list @@ -85,6 +85,16 @@ h# 0000.8000 to first-io \ Avoid mappings established by BIOS [then] +: pirq@ ( n -- irq ) + case + 0 of h# 8855 config-b@ 4 rshift endof + 1 of h# 8856 config-b@ h# f and endof + 2 of h# 8856 config-b@ 4 rshift endof + 3 of h# 8857 config-b@ 4 rshift endof + ( default ) 0 swap + endcase +; + \ Determine the parent interrupt information (the "interrupt line" in PCI \ parlance) from the child's "interrupt pin" and the child's address, \ returning "int-line true" if the child's interrupt line register should @@ -92,7 +102,18 @@ : assign-int-line ( phys.hi.func INTx -- irq true ) \ Reiterate the value that is already in the int line register, \ which was placed there by lower level init code - drop h# 3c + config-b@ true + drop case + h# 5800 of 1 pirq@ true exit endof \ USB device - PIRQB + h# 6000 of 0 pirq@ true exit endof \ SDIO - PIRQA + h# 6800 of 0 pirq@ true exit endof \ SDC - PIRQA + h# 7800 of 1 pirq@ true exit endof \ EIDE - PIRQB + h# 8000 of 0 pirq@ true exit endof \ UHCI01 - PIRQ A + h# 8100 of 1 pirq@ true exit endof \ UHCI23 - PIRQ B + h# 8200 of 2 pirq@ true exit endof \ UHCI45 - PIRQ C + h# 8400 of 3 pirq@ true exit endof \ EHCI - PIRQ D + h# a000 of 1 pirq@ true exit endof \ HDAudio - PIRQ B + ( default ) dup h# 3c + config-b@ true rot \ Reiterate previous setting + endcase ; 0 value interrupt-parent Modified: cpu/x86/pc/olpc/via/rmstart.fth =================================================================== --- cpu/x86/pc/olpc/via/rmstart.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/rmstart.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -98,11 +98,8 @@ 16-bit - \ PLL startup? + h# 01 port80 - \ Return to here after the reset - h# 02 port80 - \ Invalidate TLB op: ax ax xor op: ax cr3 mov @@ -166,7 +163,6 @@ h# 0f port80 -ResetBase .x cr op: ad: ResetBase h# 10 #) far jmp \ Jump to Forth startup \ Pad the startup code so that the main entry point ends up at the Modified: cpu/x86/pc/olpc/via/romreset.bth =================================================================== --- cpu/x86/pc/olpc/via/romreset.bth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/romreset.bth 2009-05-08 07:56:10 UTC (rev 1175) @@ -53,249 +53,53 @@ h# 10.0000 constant ramtest-start h# 20.0000 constant ramtest-end -create uart-debug-startup -: devfunc ( dev func -- ) - h# 100 * swap h# 800 * or h# 8000.0000 or - [ also assembler ] - # ebp mov " masked-config-writes" evaluate #) call - [ previous ] -; -: end-table 0 c, ; +fload ${BP}/cpu/x86/pc/olpc/via/startmacros.fth \ Via-oriented startup macros -: mreg ( reg# and or -- ) rot c, swap c, c, ; -: wait-us ( us -- ) - " # ax mov usdelay #) call" evaluate -; - -: showreg ( reg# -- ) - " h# ff port80 d# 200000 wait-us" eval - " config-rb al 80 # out d# 1000000 wait-us" eval -; - start-assembling +hex + label my-entry e9 c, 0 , \ To be patched later end-code -[ifdef] uart-debug-startup -fload ${BP}/cpu/x86/pc/dot.fth \ Numeric output -[then] +fload ${BP}/cpu/x86/pc/romfind.fth \ find-dropin subroutine -fload ${BP}/cpu/x86/pc/romfind.fth \ find-dropin +fload ${BP}/cpu/x86/pc/olpc/via/startusdelay.fth \ microsecond delay subroutine +fload ${BP}/cpu/x86/pc/olpc/via/startcfgio.fth \ masked config write subroutine +fload ${BP}/cpu/x86/pc/olpc/via/startdraminit.fth \ DDRinit subroutine -hex - -\ %ebp contains the config address -\ %ebp used for merging config write data - -label masked-config-writes \ return address points to the table - esi pop - cld - begin - al lods \ al: register offset - al al or 0<> while - al bl mov \ bl: register offset - -[ifdef] config-to-port80 - h# 77 # al mov al h# 80 # out - ebp eax mov ah al mov al h# 80 # out - bl al mov al h# 80 # out +[ifdef] debug-startup +fload ${BP}/cpu/x86/pc/dot.fth \ Numeric output subroutine +fload ${BP}/cpu/x86/pc/olpc/via/startcominit.fth \ cominit subroutine [then] - ebp eax mov \ Config address base - bl al mov \ Merge in register number - h# ffff.fffc # ax and \ Remove low bits - h# cf8 # dx mov \ Config address register port # - ax dx out \ Write to config address register - - 4 # dl add \ DX: cfc - 3 # bl and \ Byte offset - bl dl add \ Config data register port # - - al lods al not \ Get AND mask - al al or 0<> if \ Do we need to read-modify-write? - al ah mov \ Save mask - dx al in \ Get existing value -[ifdef] config-to-port80 - al h# 80 # out -[then] - ah al and \ Apply AND mask - al ah mov - al lods \ Get OR mask - ah al or \ Now we have the final value - else \ AND mask is 0 so we don't have to R-M-W - al lods \ Get final value (== OR mask) - then - -[ifdef] config-to-port80 - al h# 80 # out -[then] - - al dx out \ Write final value to config data register - repeat - esi push - ret -end-code - -[ifdef] uart-debug-startup -label cominit - \ Turn on frame buffer - 0 3 devfunc - a1 ff 80 mreg \ Not sure why this is needed, the PM says it's the default - a7 ff 08 mreg \ Internal GFX allocation - end-table - - \ Turn on I/O and memory space access for display controller - 1 0 devfunc - 04 ff 07 mreg - end-table - - 01 3c3 port-wb \ Graphics Chip IO port access on - 10 3c4 port-wb 01 3c5 port-wb \ Graphics Chip register protection off - 78 3c4 port-wb 86 3c5 port-wb \ South module pad share enable on (80) - - d# 17 0 devfunc - \ The following is for UART on VCP port - 46 3f 40 mreg - \ The following is for UART on DVP port - \ 46 3f c0 mreg - - \ Standard COM2 and COM1 IRQ routing - b2 00 34 mreg - - \ For COM1 - 3f8 (ff below is 3f8 3 >> 80 or ) - - b0 cf 10 mreg - b4 00 ff mreg \ 3f8 3 >> 80 or - com base port - - \ For COM2 - 2f8 (df below is 2f8 3 >> 80 or ) - \ b0 cf 20 mreg - \ b5 00 df mreg - end-table - - \ The usual setup dance for a PC UART... - 01 3fc port-wb \ DTR on - 80 3fb port-wb \ Switch to bank 1 to program baud rate - 01 3f8 port-wb \ Baud rate divisor low - 115200 baud - 00 3f9 port-wb \ Baud rate divisor high - 115200 baud - 03 3fb port-wb \ 8 bits, no parity, switch to bank 0 - 00 3f9 port-wb \ Interrupts off - 00 3fa port-wb - - ret -end-code -[then] - -\ Delay N microseconds, N in ax -label usdelay - cx push - - ax cx mov - begin h# 80 # al in loopa - - cx pop - ret -end-code - -\ This is the dance you have to do for each DDR rank to turn on the RAM chips -label DDRinit - 11 36b config-wb \ SDRAM NOP - 0 #) ax mov \ Access RAM - d# 200 wait-us - - 12 36b config-wb \ SDRAM Precharge All - 0 #) ax mov \ Access RAM - - 13 36b config-wb \ SDRAM MRS Enable - 20200 #) ax mov \ Access RAM for DLL enable - 150 ohm (20020 for 75 ohm) - 800 #) ax mov \ Access RAM for DLL reset - - 12 36b config-wb \ SDRAM Precharge All - 0 #) ax mov \ Access RAM - - 14 36b config-wb \ SDRAM CBR Cycle Enable - - 8 # cx mov - begin - 0 #) ax mov - d# 100 wait-us - loopa - - 13 36b config-wb \ SDRAM MRS Enable - 101258 #) ax mov \ Depends on Twr, CL, and Burst Length - - 21e00 #) ax mov \ For 150 ohm; 75 ohm is 21c20 - 20200 #) ax mov \ For 150 ohm; 75 ohm is 21c20 - - 10 36b config-wb \ SDRAM Normal - - ret -end-code - - label startup -\ h# 10 port80 + h# 10 port80 + 2 92 port-wb \ Enable A20 \ External A20GATE is disabled automatically because the internal KBC is on by default (cfg reg 8851 bit 0) -\ Enable cache as RAM - cr0 ax mov h# 4000.0000 bitset ax cr0 mov invd \ Disable cache + fload ${BP}/cpu/x86/pc/olpc/via/startcacheasram.fth - 00000000.00000c00. 2ff set-msr \ Enable fixed and variable MTRRs in DefType - 00000000.00000000. 250 set-msr \ Clear fixed MTRR - 258 wmsr 259 wmsr 268 wmsr 269 wmsr 26a wmsr \ Fixed MTRRs - 26b wmsr 26c wmsr 26d wmsr 26e wmsr 26f wmsr \ Fixed MTRRs - 200 wmsr 201 wmsr 202 wmsr 203 wmsr 204 wmsr \ Variable MTRRs - 205 wmsr 206 wmsr 207 wmsr 208 wmsr 209 wmsr \ Variable MTRRs - 20a wmsr 20b wmsr 20c wmsr 20d wmsr 20e wmsr \ Variable MTRRs - 20f wmsr \ Last variable one + \ We are now running from cache and can use the stack - dcached-base 6 + 0 200 set-msr \ Dcache base address, write back - /dcached negate h# 800 + f 201 set-msr \ Dcache size - dropin-base 6 + 0 202 set-msr \ ROM base address - /icached negate h# 800 + f 203 set-msr \ Icache size - - 00000000.00000800. 2ff set-msr \ Enable variable MTRRs in DefType - - - cr0 ax mov h# 6000.0000 bitclr ax cr0 mov invd \ Cache on - - cld - - \ Access ROM to load it into the dcache - dropin-base # esi mov - /icached 4 / # ecx mov - rep eax lods - - \ Access "RAM" area to load it into the dcache - dcached-base # esi mov - /dcached 4 / # ecx mov - rep eax lods - - \ Put the stack pointer at the top of the dcached area - dcached-base /dcached + 4 - # esp mov - ds ax mov ax ss mov - -\ We are now running from cache, and can use the stack - -\ h# 20 port80 d# 300000 wait-us - \ cache_as_ram_auto.c: amd64_main() 01 004f config-wb \ Enable device 0 multiple functions -\ 8898 config-rb al 80 # out d# 300000 wait-us - 00 8898 config-wb \ Disable BIOS init timer GP3 -[ifdef] uart-debug-startup - cominit #) call - carret report - linefeed report +[ifdef] debug-startup + cominit #) call [then] + carret report + linefeed report + char F report + h# 1d port80 + \ This is a device ID backdoor to fake out the ID so Ubuntu will install \ 8879 config-rb h# 40 # al or al dx out \ I don't know what this is, but coreboot does it @@ -311,377 +115,29 @@ then [then] - \ enable_mainboard_devices() -\ 41 8f4f config-wb \ Enable P2P Bridge Header for External PCI Bus (coreboot value) - 43 8f4f config-wb \ As above, plus support extended PCIe config space + fload ${BP}/cpu/x86/pc/olpc/via/starthostctl.fth + fload ${BP}/cpu/x86/pc/olpc/via/demodram.fth -\ 4f6 config-rb \ Get Northbridge revision ... don't need it because the - \ init table contains no revision-specific entries - - \ via_pci_inittable(NBrevision,mNbStage1InitTbl) - - \ Enable extended config space for PCIe - 0 5 devfunc \ NB_APIC - 61 ff 0e mreg \ Set Exxxxxxx as PCIe MMIO config range - 60 f4 13 mreg \ Support extended cfg address of PCIe (preserve 28 bits) (coreboot used vx800 bit resv in vx855) - end-table - - 0 2 devfunc \ HOST CPU CTL - 50 1f 08 mreg \ Request phase ctrl: Dynamic Defer Snoop Stall Count = 8 - 51 ff 78 mreg \ CPU I/F Ctrl-1: Disable Fast DRDY and RAW (coreboot uses 7c) - 52 cb cb mreg \ CPU I/F Ctrl-2: Enable all for performance - 53 ff 44 mreg \ Arbitration: Host/Master Occupancy timer = 4*4 HCLK - 54 1e 1c mreg \ Misc Ctrl: Enable 8QW burst Mem Access - - 55 06 04 mreg \ Miscellaneous Control 2 - 56 f7 63 mreg \ Write Policy 1 - 5d ff a2 mreg \ Write Policy - 5e ff 88 mreg \ Bandwidth Timer - 5f 46 46 mreg \ CPU Misc Ctrl - - 96 0b 0a mreg \ Write Policy - 98 c1 41 mreg \ Bandwidth Timer - 99 0e 06 mreg \ CPU Misc Ctrl - 97 ff 00 mreg \ APIC Related Control - end-table - -fload ${BP}/cpu/x86/pc/olpc/via/demodram.fth - - 0 3 devfunc - 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) - end-table - - -\ Also from FinalSetting.c - - 0 4 devfunc \ PM_table - a0 80 80 mreg \ Enable dynamic power management (coreboot for vx800 uses f0; 70 bits are reserved on vx855) - a1 e0 e0 mreg \ Dynamic power management for DRAM - a2 d6 d6 mreg \ Dynamic clock stop controls (coreboot for vx8000 uses ff fe; 29 bits are reserved on vx800) - a3 80 80 mreg \ Toggle reduction on - a5 81 81 mreg \ "Reserved" - end-table - -\ UMARamSetting.c -\ SetUMARam - 0 3 devfunc - a1 00 80 mreg \ Enable internal GFX - a2 ff ee mreg \ Set GFX timers - a4 ff 01 mreg \ GFX Data Delay to Sync with Clock - a6 ff 76 mreg \ Page register life timer - a7 ff 8c mreg \ Internal GFX allocation - b3 ff 9a mreg \ Disable read past write -\ de ff 06 mreg \ Enable CHA and CHB merge mode (but description says this value disable merging!) 00 for compatibility - end-table - - 0 3 devfunc - a1 70 40 mreg \ Set frame buffer size to 64M (8M:10, 16M:20, 32M:30, etc) - fbsize - end-table - - 1 0 devfunc - \ Reg 1b2 controls the number of writable bits in the BAR at 810 - b2 ff 70 mreg \ Offset of frame buffer, depends on size - fbsize - 04 ff 07 mreg \ Enable IO and memory access to display - end-table - - d000.0000 810 config-wl \ S.L. Base address - f000.0000 814 config-wl \ MMIO Base address - cd01 3a0 config-ww \ Set frame buffer size and CPU-relative address and enable - - 0 0 devfunc - c6 02 02 mreg \ Enable MDA forwarding (not in coreboot) - d4 00 03 mreg \ Enable MMIO and S.L. access in Host Control device - fe 00 10 mreg \ 16-bit I/O port decoding for VGA (no aliases) - end-table - - 1 0 devfunc - b0 07 03 mreg \ VGA memory selection (coreboot uses 03, Phoenix 01. I think 03 is correct) - end-table - - 01 3c3 port-wb \ Graphics chip IO port access on - 10 3c4 port-wb 01 3c5 port-wb \ Turn off register protection - 67 3c2 port-wb \ Enable CPU Display Memory access (2), use color not mono port (1) - - 68 3c4 port-wb e0 3c5 port-wb \ Size of System Local Frame Buffer - Value depends on frame buffer size - fbsize - \ 00:512MB 80:256MB c0:128MB e0:64MB f0:32MB f8:16MB fc:8MB fe:4MB ff:2MB - - \ These 2 are scratch registers that communicate with the VGA BIOS - 3d 3d4 port-wb 74 3d5 port-wb \ Value depends on DIMM frequency - used by VGA BIOS - 39 3c4 port-wb 10 3c5 port-wb \ BIOS Reserved Register 0 - FBsize_MiB/4 - fbsize - VGA BIOS - - 5a 3c4 port-wb 01 3c5 port-wb \ Point to secondary registers - 4c 3c4 port-wb 83 3c5 port-wb \ LCDCK Clock Synthesizer Value 2 - 5a 3c4 port-wb 00 3c5 port-wb \ Point back to primary registers - - 6d 3c4 port-wb e0 3c5 port-wb \ Base address [28:21] of SL in System Memory - base is 1c00.0000 - fbsize, memsize - 6e 3c4 port-wb 00 3c5 port-wb \ Base address [36:29] of SL in System Memory - 6f 3c4 port-wb 00 3c5 port-wb \ Base address [47:37] of SL in System Memory - - 36 3c4 port-wb 11 3c5 port-wb \ Subsystem Vendor ID 1 - 35 3c4 port-wb 06 3c5 port-wb \ Subsystem Vendor ID 0 - 38 3c4 port-wb 51 3c5 port-wb \ Subsystem ID 1 - 37 3c4 port-wb 22 3c5 port-wb \ Subsystem ID 0 - - f3 3c4 port-wb 00 3c5 port-wb \ 1a for snapshot mode - f3 3d4 port-wb 12 3c5 port-wb \ Snapshot mode control - 1a for snapshot mode - -\ cache_as_ram_auto.c : enable_shadow_ram - - 0 3 devfunc -\ Initial DOS hole settings, so the firmware can set things up - 80 ff ff mreg \ Enable R/W memory access to Cxxxx bank - 81 ff ff mreg \ Enable R/W memory access to Dxxxx bank - 82 ff ff mreg \ Enable R/W memory access to Exxxx bank - 83 30 30 mreg \ Enable R/W memory access to Fxxxx bank (30), no memory hole (0c), SMM switching of Axxxx bank (03) - -\ Final DOS hole settings, after stuff has been copied in, for reference -\ 80 ff 2a mreg \ CC000-CFFFF off, C0000-C7FFF RO -\ 81 ff 00 mreg \ D0000-DFFFF off -\ 82 ff aa mreg \ E0000-EFFFF RO -\ 83 ff 20 mreg \ Enable R/W memory access to Fxxxx bank (20), no memory hole (0c), SMM switching of Axxxx bank (03) - end-table - - \ Additional Power Management Setup not in coreboot - 0 2 devfunc - 76 08 08 mreg \ AGTL Power down buffers in S3 - 92 ff 40 mreg \ ACPI IO Base address - end-table - - 0 4 devfunc - 84 ff db mreg \ Dynamic clocks - 85 ff 05 mreg \ Dynamic clocks - 89 ff f8 mreg \ Dynamic clocks - 8b ff bf mreg \ Dynamic clocks - 8d ff 30 mreg \ Self-refresh in C3 and C4 - 90 ff ff mreg \ Gate clocks - 91 ff ff mreg \ Gate clocks - 92 cc cc mreg \ Dynamic buffer control, power down comparators - a8 20 20 mreg \ Central traffic controller dynamic clock stop - end-table - - \ Bus tuning - 0 5 devfunc - 54 8f 80 mreg \ SM request gets high priority, PCCA occupancy timer off - 55 0f 04 mreg \ PCCA P2C Promote Timer value 4 - 59 0f 02 mreg \ IGFX Promote Timer value 2 - 5f 0f 06 mreg \ IPI Promote Timer value 6 - 64 20 00 mreg \ Upstream MSI doesn't flush queued P2C Write Data - 80 0b 08 mreg \ Upstream Request 1T earlier - 83 ff 81 mreg \ P2PW down arb timer timer 8, P2PR down arb timer timer 1 - 84 7f 28 mreg \ Downstream arbitration Timeout timer for C2P - 85 c0 c0 mreg \ Abort P2P cycle to PCI1, CPU to PCI1 cycle blocks next C2P cycle - end-table - - d# 12 0 devfunc \ SDIO tuning - 44 01 01 mreg \ Enable backdoor - 8b 05 01 mreg \ Do not report 1.8V support - 8c c3 03 mreg \ Falling edge trigger for Slots 1 and 2 data in high speed - 8e ff 7e mreg \ Delay host clock for Slots 1, 2, 3 by 4.8 nS - 8f 09 01 mreg \ Falling edge trigger on slot 3 output clock under high speed -[ifdef] demo-board - 99 ff f9 mreg \ Two slots -[else] - 99 ff fa mreg \ Three slots -[then] - end-table - - d# 15 0 devfunc \ EIDE tuning - 40 02 02 mreg \ Enable primary channel - 4a ff 5e mreg \ Drive1 timing - 4b ff 20 mreg \ Drive0 timing - 4c f0 60 mreg \ Address setup time - 52 df 0e mreg \ Ultra dma wait strobe timing - 53 df c6 mreg \ Ultra DMA mode control - c4 1d 18 mreg \ Config 1 - d4 ac 24 mreg \ Config 3 - end-table - - \ USB Tuning - d# 16 0 devfunc \ UHCI Ports 0,1 - 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted - 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) - c1 20 00 mreg \ Disable USB PIRQ - end-table - - d# 16 1 devfunc \ UHCI Ports 2,3 - 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted - 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) - c1 20 00 mreg \ Disable USB PIRQ - end-table - - d# 16 2 devfunc \ UHCI Ports 4,5 - 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted - 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) - c1 20 00 mreg \ Disable USB PIRQ - end-table - - d# 16 4 devfunc \ EHCI - 42 40 40 mreg \ Enable Check PRESOF of ITDOUT Transaction during Fetching Data from DRAM - 43 c0 c0 mreg \ Enable Dynamic Clock Scheme - 66MHz (80) & 33MHz (40) - 48 20 00 mreg \ Disable DMA bursts - 4c 03 03 mreg \ Squelch detector fine tune - 01 is 112.5 mV -\ 4d 01 01 mreg \ reserved bit -\ 4e 03 03 mreg \ reserved bit - setting is appropriate for vx800 - 4f 10 10 mreg \ Enable Clear RUN Bit when EHCI_IDLE - 50 80 80 mreg \ Fetch one more QH before de-asserting Doorbell - 55 ff ff mreg \ Disconnect level fine tune - 575 mV for ports 0-3 - 56 0f 0f mreg \ Disconnect level fine tune - 575 mV for ports 4-5 - 5a ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 0,1 - 5b ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 2,3 - 5c 0f 00 mreg \ DPLL Track Speed 2, DPLL Lock Speed 2 - 5d ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 4,5 - 64 05 05 mreg \ Bump NULL-SOF valid time to 8 micro frames (04), Inhibit C4 state on USB 1.1 ISO activity (01) - end-table - - d# 17 0 devfunc \ Bus control and power management - 40 44 44 mreg \ Enable I/O Recovery time (40), Enable ports 4d0/4d1 for edge/level setting (04) - 42 fc f0 mreg \ Various setting related to DMA line buffers - 43 0f 0b mreg \ Enable PCI delayed transactions (08), Write transaction timer (02), Read transaction timer (01) -\ 4d 01 01 mreg \ Enable LPC TPM - 4e 08 08 mreg \ Enable ports 74/75 for CMOS RAM access - 52 1b 19 mreg \ No wait state between SIRQ transactions (10), Enable SIRQ (08), SIRQ frame is 6 clocks (3>1) - 53 80 80 mreg \ Enable PC/PCI DMA - 55 ff a0 mreg \ INTA and External General interrupt routing - INTA:IRQ10 - 56 ff b9 mreg \ INTB,C routing - INTC:IRQ11, INTB:IRQ9 - 57 f0 a0 mreg \ INTD routing - INTD:IRQ10 - 58 40 40 mreg \ Enable Internal APIC - 5b 10 10 mreg \ Enable APIC Clock Gating - 68 80 80 mreg \ Enable HPETs - 69 ff 00 mreg \ HPET base low - 6a ff d0 mreg \ HPET base mid - 6b ff fe mreg \ HPET base high - 6e ff 18 mreg \ COMB not pos decoded but otherwise set to 2f8, COMA pos decoded at 3f8 - 70 ff 06 mreg \ SVID backdoor - 71 ff 11 mreg \ SVID backdoor - 72 ff 37 mreg \ SVID backdoor - 73 ff 33 mreg \ SVID backdoor - 80 20 20 mreg \ Debounce power button -\ 81 08 00 mreg \ 24-bit ACPI timer - why? - 84 ff da mreg \ IRQs 7,6,4,3,1 are primary wakeups - 85 ff 40 mreg \ IRQ 14 is primary wakeup - 8a 9f 1f mreg \ C-state auto switching with normal latencies -[ifdef] demo-board - 8d 18 18 mreg \ fast clock as throttle timer tick, hold SMI# low until event status cleared (FIXME for OLPC) -[else] - 8d 18 10 mreg \ fast clock as throttle timer tick, do not hold SMI# low -[then] -\ 9b 80 80 mreg \ reserved bit - b4 80 00 mreg \ No positive decoding for UART1 ??? - b8 fc 80 mreg \ UART DMA Control Registers Base low (port is 4080) - b9 ff 40 mreg \ UART DMA Control Registers Base high - ba 77 44 mreg \ COM1 DMA Channel Selects - DMA0 for both Transmit and Receive - bc ff 00 mreg \ SPI MMIO Base Address 15:8 (address is fed30000) - bd ff d3 mreg \ SPI MMIO Base Address 23:16 - be ff fe mreg \ SPI MMIO Base Address 31:24 - d0 f0 00 mreg \ SMBUS IO Base Address low (port is 4100) - d1 ff 41 mreg \ SMBUS IO Base Address high - d2 0f 01 mreg \ Enable SMBUS and set other characteristics - e2 80 80 mreg \ Inhibit C4 during USB isochronous transaction - e4 ff a0 mreg \ Enable short C3/C4 (80), select various multi-function pins - e5 60 60 mreg \ Enable NM bus master as source of bus master status, enable NB int to wakeup from Cx - e6 20 20 mreg \ Enable USB Device Mode Bus Master as Break Event - e7 80 80 mreg \ Enable APIC Cycle Reflect to ALL Bus Master Activity Effective Signal - fc 06 04 mreg \ DPSLP# to SLP# Latency Adjustment - 22.5 us - end-table - - d# 17 7 devfunc \ South-North Module Interface Control - 50 df 08 mreg \ SM priorities - HDAC high priority, others low - 51 80 80 mreg \ Enable subtractive decode for P2P cycle - 54 7b 02 mreg \ CCA REQ timing - synchronize USB REQ but not others -0 [if] - 61 ff 2a mreg \ Page C ROM shadow - C0000-CBFFF RO, CC000-CFFFF off - 62 ff 00 mreg \ Page D ROM shadow - D0000-DFFFF off - 63 f3 a0 mreg \ Page E/F ROM shadow - E0000-EFFFF RO, F0000-FFFFF RO, no memory hole - 64 ff aa mreg \ Page E ROM shadow - E0000-EFFFF RO -[then] - 70 fb 82 mreg \ CPU to PCI flow control - CPU to PCI posted write, Enable Delay Transaction - 72 af ee mreg \ Read caching and prefix - various knobs (40 bit is reserved) - 73 79 01 mreg \ Enable PCI broken master timer & various knobs - 74 d8 08 mreg \ Lock Cycle Issued by CPU Blocks P2C Cycles (04 bit is reserved) - 75 ff 0f mreg \ Use New grant mechanism for PCI arbitration, PCI Master Bus Timeout is 7x16 PCI clock - 76 fd 50 mreg \ Enable PCI parking, Grant to CPU after 2 PC master grants - 77 58 48 mreg \ PCI1 FIFO empty blocks CPU to PCI read, Read FIFO times out after 1 ms - 80 07 07 mreg \ PCI1 and HDAC upstream read does not pass write, APCI blocks upstream write - 82 3e 20 mreg \ Monitor CCA and SDIO2 - e0 e0 80 mreg \ Dynamic CCA clock - e2 1e 00 mreg \ Use dynamic clocks for Downstream Interface, PCI1, Downstream HDAC, Downstream SM Internal PCI device - e3 ff 5e mreg \ PCI1 dynamic clock, PCI clock on when GRANT# asserted, Enable P2CR data timeout at 7*8 PCI clocks -\ e6 1f 1f mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) - e6 1f 19 mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) - fc 40 40 mreg \ Enable CCA Read Clock When MTXCTL state machine is not idle - end-table - - d# 20 0 devfunc - 41 01 01 mreg \ Dynamic clock for HDAC - end-table - - \ APIC setup - 0 2 devfunc - 59 01 01 mreg \ MSI Flat model support - 5c 10 10 mreg \ Data bit 11 mask for MSI - 97 01 01 mreg \ Redirect lowest priority MSI requests to APIC 00 - end-table - - 0 3 devfunc - 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) - end-table - - \ Low 2 bits of 86: - \ x1 to write to SMM shadow memory behind VGA - \ 00 to run - Axxxxx hits VGA in normal mode, hits shadow DRAM in SMM - \ 01 to access VGA when in SMM (data cycles only) - - h# 1c00.0000 # mem-info-pa 4 + #) mov \ Top of memory - - long-offsets on - + char o report h# 1e port80 -\ Fix the MTRRs so the real RAM is cacheable, instead of the fake nonexistent area - cr0 ax mov h# 6000.0000 bitset ax cr0 mov \ Cache off - - 0000.0000.0000.0c00. 2ff set-msr \ Enable fixed and variable MTRRs in DefType + fload ${BP}/cpu/x86/pc/olpc/via/startmtrrinit.fth + \ Cache is now setup normally, backed by memory + 'ebda # sp mov \ Move stack to real memory - 0000.0000.0000.0006. 200 set-msr \ RAM starting at 0 - 0000.000f.c000.0800. 201 set-msr \ 1 GiB - 0000.0000.ff00.0006. 202 set-msr \ ROM in last meg - 0000.000f.ff00.0800. 203 set-msr \ 1 MiB - 0000.0000.d000.0001. 204 set-msr \ Frame buffer - Write Combining mode - 0000.000f.f000.0800. 205 set-msr \ 256 MB + fload ${BP}/cpu/x86/pc/olpc/via/startgfxinit.fth + fload ${BP}/cpu/x86/pc/olpc/via/ioinit.fth - 0606.0606.0606.0606. 250 set-msr \ Cache 00000-7FFFF - 0606.0606.0606.0606. 258 set-msr \ Cache 80000-9FFFF - 0000.0000.0000.0000. 259 set-msr \ Don't Cache VGA range from A0000 to BFFFF - 0606.0606.0606.0606. 268 set-msr \ Cache C0000-C7FFF - 0606.0606.0606.0606. 269 set-msr \ Cache C8000-CFFFF - 0606.0606.0606.0606. 26a set-msr \ Cache D0000-D7FFF - 0606.0606.0606.0606. 26b set-msr \ Cache D8000-DFFFF - 0606.0606.0606.0606. 26c set-msr \ Cache E0000-E7FFF - 0606.0606.0606.0606. 26d set-msr \ Cache E8000-EFFFF - 0606.0606.0606.0606. 26e set-msr \ Cache F0000-F7FFF - 0606.0606.0606.0606. 26f set-msr \ Cache F8000-FFFFF - - cr0 ax mov h# 6000.0000 bitclr ax cr0 mov \ Cache on - h# 10.0000 # sp mov \ Move stack to real memory - -\ Cache is now back on, with the final MTRR setup - - \ Now we can use the stack and do conventional subroutine calls - \ Enable the keyboard controller \ 8851 config-rb 2 # ax or ax bx mov \ 8851 config-setup bx ax mov al dx out \ Enable the keyboard configuration port \ e2 2e port-wb 7 2f port-wb -\ XXX need to set some registers in D17F7 "SNMIC" per chapter 21 of the BIOS Porting Guide + fload ${BP}/cpu/x86/pc/olpc/via/startmemtop.fth h# 1f port80 -[ifdef] uart-debug-startup - char F report - char o report - char r report -[then] + char r report fload ${BP}/cpu/x86/pc/resetend.fth end-code Added: cpu/x86/pc/olpc/via/romstart.bth =================================================================== --- cpu/x86/pc/olpc/via/romstart.bth (rev 0) +++ cpu/x86/pc/olpc/via/romstart.bth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,117 @@ +\ See license at end of file +purpose: Build file for dropin dispatcher - version for direct ROM startup + +command: &builder &this +build-now + +create debug-startup + +fload ${BP}/cpu/x86/pc/olpc/via/config.fth \ Address configuration + + +\needs start-assembling fload ${BP}/cpu/x86/asmtools.fth +\needs write-dropin fload ${BP}/forth/lib/mkdropin.fth + +fload ${BP}/cpu/x86/mmuparam.fth + +\ startmacros.fth defines some assembler macros that make MSR and I/O port +\ access very easy by hiding the details of register use. + +fload ${BP}/cpu/x86/startmacros.fth +fload ${BP}/cpu/x86/pc/port80.fth + +hex + +fload ${BP}/cpu/x86/pc/finddi.fth \ find-dropin and other tools + +fload ${BP}/cpu/x86/pc/olpc/via/startmacros.fth \ Via-oriented startup macros + +start-assembling + +label my-entry + e9 c, 0 , \ To be patched later +end-code + +[ifdef] debug-startup +fload ${BP}/cpu/x86/pc/dot.fth \ Numeric output +[then] + +fload ${BP}/cpu/x86/pc/romfind.fth \ find-dropin + +hex + +fload ${BP}/cpu/x86/pc/olpc/via/startcfgio.fth \ masked config write subroutine + +[ifdef] debug-startup +fload ${BP}/cpu/x86/pc/olpc/via/startcominit.fth \ cominit subroutine +[then] + +label startup + 00 8898 config-wb \ Disable BIOS init timer GP3 + 'ebda # sp mov \ Move stack to real memory + +[ifdef] debug-startup + cominit #) call +[then] + + carret report + linefeed report + char F report + h# 1d port80 + char o report + h# 1e port80 + + fload ${BP}/cpu/x86/pc/olpc/via/startmtrrinit.fth + fload ${BP}/cpu/x86/pc/olpc/via/ioinit.fth + +1 [if] + 0 3 devfunc + 86 c4 84 mreg \ Enable top SMM memory (04) of size 4 MB (80 in c0 field) + end-table + + d# 17 7 devfunc + e6 04 04 mreg \ Enable top SMM memory in North/South module + end-table +[then] + + fload ${BP}/cpu/x86/pc/olpc/via/startmemtop.fth + + h# 1f port80 + char r report + + fload ${BP}/cpu/x86/pc/resetend.fth +end-code + +also 386-assembler +startup my-entry put-branch +previous + +end-assembling + +writing romstart.di +asm-base here over - 0 " start" write-dropin +ofd @ fclose + +\ LICENSE_BEGIN +\ Copyright (c) 2009 FirmWorks +\ +\ Permission is hereby granted, free of charge, to any person obtaining +\ a copy of this software and associated documentation files (the +\ "Software"), to deal in the Software without restriction, including +\ without limitation the rights to use, copy, modify, merge, publish, +\ distribute, sublicense, and/or sell copies of the Software, and to +\ permit persons to whom the Software is furnished to do so, subject to +\ the following conditions: +\ +\ The above copyright notice and this permission notice shall be +\ included in all copies or substantial portions of the Software. +\ +\ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +\ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +\ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +\ NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +\ LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +\ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +\ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +\ +\ LICENSE_END Added: cpu/x86/pc/olpc/via/startcacheasram.fth =================================================================== --- cpu/x86/pc/olpc/via/startcacheasram.fth (rev 0) +++ cpu/x86/pc/olpc/via/startcacheasram.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,37 @@ +\ Enable cache as RAM + cr0 ax mov h# 4000.0000 bitset ax cr0 mov invd \ Disable cache + + 00000000.00000c00. 2ff set-msr \ Enable fixed and variable MTRRs in DefType + 00000000.00000000. 250 set-msr \ Clear fixed MTRR + 258 wmsr 259 wmsr 268 wmsr 269 wmsr 26a wmsr \ Fixed MTRRs + 26b wmsr 26c wmsr 26d wmsr 26e wmsr 26f wmsr \ Fixed MTRRs + 200 wmsr 201 wmsr 202 wmsr 203 wmsr 204 wmsr \ Variable MTRRs + 205 wmsr 206 wmsr 207 wmsr 208 wmsr 209 wmsr \ Variable MTRRs + 20a wmsr 20b wmsr 20c wmsr 20d wmsr 20e wmsr \ Variable MTRRs + 20f wmsr \ Last variable one + + dcached-base 6 + 0 200 set-msr \ Dcache base address, write back + /dcached negate h# 800 + f 201 set-msr \ Dcache size + dropin-base 6 + 0 202 set-msr \ ROM base address + /icached negate h# 800 + f 203 set-msr \ Icache size + + 00000000.00000800. 2ff set-msr \ Enable variable MTRRs in DefType + + + cr0 ax mov h# 6000.0000 bitclr ax cr0 mov invd \ Cache on + + cld + + \ Access ROM to load it into the dcache + dropin-base # esi mov + /icached 4 / # ecx mov + rep eax lods + + \ Access "RAM" area to load it into the dcache + dcached-base # esi mov + /dcached 4 / # ecx mov + rep eax lods + + \ Put the stack pointer at the top of the dcached area + dcached-base /dcached + 4 - # esp mov + ds ax mov ax ss mov Added: cpu/x86/pc/olpc/via/startcbgfxinit.fth =================================================================== --- cpu/x86/pc/olpc/via/startcbgfxinit.fth (rev 0) +++ cpu/x86/pc/olpc/via/startcbgfxinit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,37 @@ + fb-pci-base 810 config-wl \ S.L. Base address + gfx-pci-base 814 config-wl \ MMIO Base address + +[ifdef] notdef + \ Determine the frame buffer size from the register that controls + \ the GFX base address register size bits + 8b2 config-rb \ Mask bits in al + h# 80 al or \ Insert high mask bit which isn't implemented + d# 24 # ax shl \ Move bits up so they can be sign-extended down + d# 2 # ax sar \ Shift into place with sign extension + ax not \ invert bitmask + ax inc \ Frame buffer size now in ax + + \ Now convert it to the log2 of the size, starting at 4M + bx bx xor \ Initial value + h# 40.0000 # cx mov \ Test size + begin + cx ax test + 0= while + bx inc + 1 # cx shl \ Bump test size by a factor of 2 + repeat + + \ bx now contains the code that goes in bits 14:12 of D0F3 a0-a1 + + d# 12 # bx shl \ Move it into place + h# 8d01 # bx or \ Set GFX enable (8000), Framebuf enable (1), and Address (d000.0000 shifted) + h# 3a0 config-setup bx ax mov op: ax dx out \ Stuff it in the register +[then] + + h# 3a0 config-rw \ Get old value of config reg 3a0.w (D0F3 RxA0) + h# ffe invert # ax and \ Clear Frame Buffer Address bits + fb-pci-base d# 20 rshift # ax or \ Insert new value + ax bx mov + h# 3a0 config-setup bx ax mov op: ax dx out \ Stuff it in the register + +\ cd01 3a0 config-ww \ Set frame buffer size and CPU-relative address and enable Added: cpu/x86/pc/olpc/via/startcfgio.fth =================================================================== --- cpu/x86/pc/olpc/via/startcfgio.fth (rev 0) +++ cpu/x86/pc/olpc/via/startcfgio.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,81 @@ +purpose: Early-startup subroutine for masked PCI configuration writes + +\ masked-config-writes is a specialized subroutine that scans a +\ compact in-line table of PCI configuration register entries. +\ The characteristics of this table are optimized for setting up +\ Via chipsets, in which the setup registers are in PCI configuration +\ space. Each PCI device/function has numerous registers, so it +\ is worthwhile to optimize for groups of writes to the same +\ device/function. +\ +\ Each entry is three bytes - register#, clear_mask, set_mask +\ The register number is the low 8 bits of a PCI configuration +\ register address. The high bits must already be in %ebp. +\ +\ The calculation for each entry is: +\ temp = read_config_byte(address); +\ temp &= ~clear_mask; +\ temp |= set_mask; +\ write_config_byte(address, temp); +\ +\ As an optimization, if clear_mask is 0, so that no bits would +\ be cleared, the calculation reduces to: +\ write_config_byte(address, set_mask); +\ +\ The last table entry is denoted by a 0 register#. +\ When the table has been completely processed, the subroutine +\ returns to the address just after the table. +\ +\ The table is created by macros defined in via/startmacros.fth + +\ %ebp contains the config address + +label masked-config-writes \ return address points to the table + esi pop + cld + begin + al lods \ al: register offset + al al or 0<> while + al bl mov \ bl: register offset + +[ifdef] config-to-port80 + h# 77 # al mov al h# 80 # out + ebp eax mov ah al mov al h# 80 # out + bl al mov al h# 80 # out +[then] + + ebp eax mov \ Config address base + bl al mov \ Merge in register number + h# ffff.fffc # ax and \ Remove low bits + h# cf8 # dx mov \ Config address register port # + ax dx out \ Write to config address register + + 4 # dl add \ DX: cfc + 3 # bl and \ Byte offset + bl dl add \ Config data register port # + + al lods al not \ Get AND mask + al al or 0<> if \ Do we need to read-modify-write? + al ah mov \ Save mask + dx al in \ Get existing value +[ifdef] config-to-port80 + al h# 80 # out +[then] + ah al and \ Apply AND mask + al ah mov + al lods \ Get OR mask + ah al or \ Now we have the final value + else \ AND mask is 0 so we don't have to R-M-W + al lods \ Get final value (== OR mask) + then + +[ifdef] config-to-port80 + al h# 80 # out +[then] + + al dx out \ Write final value to config data register + repeat + esi push + ret +end-code + Added: cpu/x86/pc/olpc/via/startcominit.fth =================================================================== --- cpu/x86/pc/olpc/via/startcominit.fth (rev 0) +++ cpu/x86/pc/olpc/via/startcominit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,46 @@ +label cominit + \ Turn on frame buffer + 0 3 devfunc + a1 80 80 mreg \ This bit must be on so you can talk to the Graphics registers below + a7 08 08 mreg \ This one too + end-table + + \ Turn on I/O space access for display controller + 1 0 devfunc + 04 01 01 mreg + end-table + + 01 3c3 port-wb \ Graphics Chip IO port access on + 10 3c4 port-wb 01 3c5 port-wb \ Graphics Chip register protection off + + \ The preceding setup was all so that we can write the following bit. + \ It seems silly to have a bit that controls the UART in the graphics + \ chip sequencer register block (additional editorializing elided...). + + 78 3c4 port-wb 3c5 port-rb \ Old value in al + h# 80 # al or al bl mov \ Set south module pad share enable + 78 3c4 port-wb 3c5 # dx mov bl al mov al dx out + + d# 17 0 devfunc + \ The following is for UART on VCP port + 46 c0 40 mreg + \ The following is for UART on DVP port + \ 46 c0 c0 mreg + + \ Standard COM2 and COM1 IRQ routing + b2 ff 34 mreg + + \ For COM1 - 3f8 (ff below is 3f8 3 >> 80 or ) + + b0 30 10 mreg + b4 ff ff mreg \ 3f8 3 >> 80 or - com base port + + \ For COM2 - 2f8 (df below is 2f8 3 >> 80 or ) + \ b0 30 20 mreg + \ b5 ff df mreg + end-table + + init-com1 \ The usual setup dance for a PC UART... + + ret +end-code Added: cpu/x86/pc/olpc/via/startdraminit.fth =================================================================== --- cpu/x86/pc/olpc/via/startdraminit.fth (rev 0) +++ cpu/x86/pc/olpc/via/startdraminit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,34 @@ +\ This is the dance you have to do for each DDR rank to turn on the RAM chips +label DDRinit + 11 36b config-wb \ SDRAM NOP + 0 #) ax mov \ Access RAM + d# 200 wait-us + + 12 36b config-wb \ SDRAM Precharge All + 0 #) ax mov \ Access RAM + + 13 36b config-wb \ SDRAM MRS Enable + 20200 #) ax mov \ Access RAM for DLL enable - 150 ohm (20020 for 75 ohm) + 800 #) ax mov \ Access RAM for DLL reset + + 12 36b config-wb \ SDRAM Precharge All + 0 #) ax mov \ Access RAM + + 14 36b config-wb \ SDRAM CBR Cycle Enable + + 8 # cx mov + begin + 0 #) ax mov + d# 100 wait-us + loopa + + 13 36b config-wb \ SDRAM MRS Enable + 101258 #) ax mov \ Depends on Twr, CL, and Burst Length + + 21e00 #) ax mov \ For 150 ohm; 75 ohm is 21c20 + 20200 #) ax mov \ For 150 ohm; 75 ohm is 21c20 + + 10 36b config-wb \ SDRAM Normal + + ret +end-code Added: cpu/x86/pc/olpc/via/startgfxinit.fth =================================================================== --- cpu/x86/pc/olpc/via/startgfxinit.fth (rev 0) +++ cpu/x86/pc/olpc/via/startgfxinit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,63 @@ +\ UMARamSetting.c +\ SetUMARam + 0 3 devfunc + 99 ff 73 mreg \ 61 res be like Phx + a1 00 80 mreg \ Enable internal GFX + a2 ff ee mreg \ Set GFX timers + a4 ff 01 mreg \ GFX Data Delay to Sync with Clock + a6 ff 76 mreg \ Page register life timer + a7 ff 8c mreg \ Internal GFX allocation + b3 ff 9a mreg \ Disable read past write +\ de ff 06 mreg \ Enable CHA and CHB merge mode (but description says this value disable merging!) 00 for compatibility + end-table + +\ 0 3 devfunc +\ a1 70 40 mreg \ Set frame buffer size to 64M (8M:10, 16M:20, 32M:30, etc) - fbsize +\ end-table + + 1 0 devfunc + \ Reg 1b2 controls the number of writable bits in the BAR at 810 + b2 ff 70 mreg \ Offset of frame buffer, depends on size - fbsize + 04 ff 07 mreg \ Enable IO and memory access to display + end-table + + d000.0000 810 config-wl \ S.L. Base address + f000.0000 814 config-wl \ MMIO Base address + cd01 3a0 config-ww \ Set frame buffer size and CPU-relative address and enable + + 0 0 devfunc + c6 02 02 mreg \ Enable MDA forwarding (not in coreboot) + d4 00 03 mreg \ Enable MMIO and S.L. access in Host Control device + fe 00 10 mreg \ 16-bit I/O port decoding for VGA (no aliases) + end-table + + 1 0 devfunc + b0 07 03 mreg \ VGA memory selection (coreboot uses 03, Phoenix 01. I think 03 is correct) + end-table + + 01 3c3 port-wb \ Graphics chip IO port access on + 10 3c4 port-wb 01 3c5 port-wb \ Turn off register protection + 67 3c2 port-wb \ Enable CPU Display Memory access (2), use color not mono port (1) + + 68 3c4 port-wb e0 3c5 port-wb \ Size of System Local Frame Buffer - Value depends on frame buffer size - fbsize + \ 00:512MB 80:256MB c0:128MB e0:64MB f0:32MB f8:16MB fc:8MB fe:4MB ff:2MB + + \ These 2 are scratch registers that communicate with the VGA BIOS + 3d 3d4 port-wb 74 3d5 port-wb \ Value depends on DIMM frequency - used by VGA BIOS + 39 3c4 port-wb 10 3c5 port-wb \ BIOS Reserved Register 0 - FBsize_MiB/4 - fbsize - VGA BIOS + + 5a 3c4 port-wb 01 3c5 port-wb \ Point to secondary registers + 4c 3c4 port-wb 83 3c5 port-wb \ LCDCK Clock Synthesizer Value 2 + 5a 3c4 port-wb 00 3c5 port-wb \ Point back to primary registers + + 6d 3c4 port-wb e0 3c5 port-wb \ Base address [28:21] of SL in System Memory - base is 1c00.0000 - fbsize, memsize + 6e 3c4 port-wb 00 3c5 port-wb \ Base address [36:29] of SL in System Memory + 6f 3c4 port-wb 00 3c5 port-wb \ Base address [47:37] of SL in System Memory + + 36 3c4 port-wb 11 3c5 port-wb \ Subsystem Vendor ID 1 + 35 3c4 port-wb 06 3c5 port-wb \ Subsystem Vendor ID 0 + 38 3c4 port-wb 51 3c5 port-wb \ Subsystem ID 1 + 37 3c4 port-wb 22 3c5 port-wb \ Subsystem ID 0 + + f3 3c4 port-wb 00 3c5 port-wb \ 1a for snapshot mode + f3 3d4 port-wb 12 3c5 port-wb \ Snapshot mode control - 1a for snapshot mode Added: cpu/x86/pc/olpc/via/starthostctl.fth =================================================================== --- cpu/x86/pc/olpc/via/starthostctl.fth (rev 0) +++ cpu/x86/pc/olpc/via/starthostctl.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,34 @@ + \ enable_mainboard_devices() +\ 41 8f4f config-wb \ Enable P2P Bridge Header for External PCI Bus (coreboot value) +\ 43 8f4f config-wb \ As above, plus support extended PCIe config space + 1 8f4f config-wb \ Disable P2P bridge + +\ 4f6 config-rb \ Get Northbridge revision ... don't need it because the + \ init table contains no revision-specific entries + + \ via_pci_inittable(NBrevision,mNbStage1InitTbl) + + \ Enable extended config space for PCIe + 0 5 devfunc \ NB_APIC + 61 ff 0e mreg \ Set Exxxxxxx as PCIe MMIO config range + 60 f4 13 mreg \ Support extended cfg address of PCIe (preserve 28 bits) (coreboot used vx800 bit resv in vx855) + end-table + + 0 2 devfunc \ HOST CPU CTL + 50 1f 08 mreg \ Request phase ctrl: Dynamic Defer Snoop Stall Count = 8 + 51 ff 78 mreg \ CPU I/F Ctrl-1: Disable Fast DRDY and RAW (coreboot uses 7c) + 52 cb cb mreg \ CPU I/F Ctrl-2: Enable all for performance + 53 ff 44 mreg \ Arbitration: Host/Master Occupancy timer = 4*4 HCLK + 54 1e 1c mreg \ Misc Ctrl: Enable 8QW burst Mem Access + + 55 06 04 mreg \ Miscellaneous Control 2 + 56 f7 63 mreg \ Write Policy 1 + 5d ff a2 mreg \ Write Policy + 5e ff 88 mreg \ Bandwidth Timer + 5f 46 46 mreg \ CPU Misc Ctrl + + 96 0b 0a mreg \ Write Policy + 98 c1 41 mreg \ Bandwidth Timer + 99 0e 06 mreg \ CPU Misc Ctrl + 97 ff 00 mreg \ APIC Related Control + end-table Added: cpu/x86/pc/olpc/via/startmacros.fth =================================================================== --- cpu/x86/pc/olpc/via/startmacros.fth (rev 0) +++ cpu/x86/pc/olpc/via/startmacros.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,17 @@ +: devfunc ( dev func -- ) + h# 100 * swap h# 800 * or h# 8000.0000 or + [ also assembler ] + # ebp mov " masked-config-writes" evaluate #) call + [ previous ] +; +: end-table 0 c, ; + +: mreg ( reg# and or -- ) rot c, swap c, c, ; +: wait-us ( us -- ) + " # ax mov usdelay #) call" evaluate +; + +: showreg ( reg# -- ) + " h# ff port80 d# 200000 wait-us" eval + " config-rb al 80 # out d# 1000000 wait-us" eval +; Added: cpu/x86/pc/olpc/via/startmemtop.fth =================================================================== --- cpu/x86/pc/olpc/via/startmemtop.fth (rev 0) +++ cpu/x86/pc/olpc/via/startmemtop.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,21 @@ + \ Determine the top of usable memory. + \ Start with the bottom address of the area used for the frame buffer. + + bx bx xor + h# 6d h# 3c4 port-wb h# 3c5 port-rb al bl mov \ Sequencer register 6d + h# 6e h# 3c4 port-wb h# 3c5 port-rb al bh mov \ Sequencer register 6e + d# 21 # bx shl + \ There are some higher bits in 6f but we only support 32-bit addresses + + \ Then subtract the top SMM memory size, if it is enabled + h# 386 config-rb + 4 # ax test 0<> if + 6 # ax shr \ Top SMM memory size field + ax cx mov \ Move to cx + h# 10.0000 # ax mov \ Field==0 means 1M + ax cl shl \ Now ax contains SMM memory size + ax bx sub \ Adjust bx + then + + bx mem-info-pa 4 + #) mov \ Top of memory + Added: cpu/x86/pc/olpc/via/startmtrrinit.fth =================================================================== --- cpu/x86/pc/olpc/via/startmtrrinit.fth (rev 0) +++ cpu/x86/pc/olpc/via/startmtrrinit.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,27 @@ + +\ Fix the MTRRs so the real RAM is cacheable, instead of the fake nonexistent area + cr0 ax mov h# 6000.0000 bitset ax cr0 mov \ Cache off + + 0000.0000.0000.0006. 200 set-msr \ RAM starting at 0 + 0000.0000.0000.0c00. 2ff set-msr \ Enable fixed and variable MTRRs in DefType + 0000.000f.c000.0800. 201 set-msr \ 1 GiB + 0000.0000.ff00.0006. 202 set-msr \ ROM in last meg + 0000.000f.ff00.0800. 203 set-msr \ 1 MiB + 0000.0000.d000.0001. 204 set-msr \ Frame buffer - Write Combining mode + 0000.000f.f000.0800. 205 set-msr \ 256 MB + + 0606.0606.0606.0606. 250 set-msr \ Cache 00000-7FFFF + 0606.0606.0606.0606. 258 set-msr \ Cache 80000-9FFFF + 0000.0000.0000.0000. 259 set-msr \ Don't Cache VGA range from A0000 to BFFFF + 0606.0606.0606.0606. 268 set-msr \ Cache C0000-C7FFF + 0606.0606.0606.0606. 269 set-msr \ Cache C8000-CFFFF + 0606.0606.0606.0606. 26a set-msr \ Cache D0000-D7FFF + 0606.0606.0606.0606. 26b set-msr \ Cache D8000-DFFFF + 0606.0606.0606.0606. 26c set-msr \ Cache E0000-E7FFF + 0606.0606.0606.0606. 26d set-msr \ Cache E8000-EFFFF + 0606.0606.0606.0606. 26e set-msr \ Cache F0000-F7FFF + 0606.0606.0606.0606. 26f set-msr \ Cache F8000-FFFFF + + 0000.0000.0000.0c00. 2ff set-msr \ Enable fixed and variable MTRRs in DefType + + cr0 ax mov h# 6000.0000 bitclr ax cr0 mov \ Cache on Added: cpu/x86/pc/olpc/via/startusdelay.fth =================================================================== --- cpu/x86/pc/olpc/via/startusdelay.fth (rev 0) +++ cpu/x86/pc/olpc/via/startusdelay.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,10 @@ +\ Delay N microseconds, N in ax +label usdelay + cx push + + ax cx mov + begin h# 80 # al in loopa + + cx pop + ret +end-code Modified: cpu/x86/pc/olpc/via/versions.fth =================================================================== --- cpu/x86/pc/olpc/via/versions.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/olpc/via/versions.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -2,7 +2,7 @@ \ The overall firmware revision macro: FW_MAJOR A -macro: FW_MINOR 00 +macro: FW_MINOR 01 \ The EC microcode macro: EC_VERSION e34 Modified: cpu/x86/pc/report.fth =================================================================== --- cpu/x86/pc/report.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/report.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -11,6 +11,8 @@ h# 01 h# 3f8 isa-c! \ Baud rate divisor low - 115200 baud h# 0 h# 3f9 isa-c! \ Baud rate divisor high - 115200 baud h# 3 h# 3fb isa-c! \ 8 bits, no parity + h# 0 h# 3f9 isa-c! \ Interrupts off + h# 1 h# 3fa isa-c! \ Enable FIFO ; \ Assembler macro to assemble code to send the character "char" to COM1 @@ -23,6 +25,7 @@ : init-com1 ( -- ) ; : report ( char -- ) drop ; [then] + \ LICENSE_BEGIN \ Copyright (c) 2006 FirmWorks \ Modified: cpu/x86/pc/resetend.fth =================================================================== --- cpu/x86/pc/resetend.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ cpu/x86/pc/resetend.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -7,7 +7,7 @@ \ Beginning of "switch to new GDT" section \ Move GDT to low memory. We use the first location at gdt-pa as - \ the pointer, so you can't use description 0. + \ the pointer since 0 is an invalid descriptor number anyway. gdt-pa # ax mov 0 [ax] sgdt \ Read GDT 2 [ax] si mov \ GDT base Modified: dev/via/unichrome/loadpkg.fth =================================================================== --- dev/via/unichrome/loadpkg.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ dev/via/unichrome/loadpkg.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -4,9 +4,20 @@ " display" device-name fload ${BP}/dev/via/unichrome/pci.fth \ PCI interfaces +defer idac@ \ Indexed DAC read +defer idac! \ Indexed DAC write +defer rmr@ \ Pixel read mask read +defer rmr! \ Pixel read mask write +defer plt@ \ Palette read +defer plt! \ Palette write +defer rindex! \ Read index for palette read +defer windex! \ Write index for palatte write +defer index! \ Index for generic IO +defer video-on +fload ${BP}/dev/video/controlr/vga.fth \ Standard VGA interfaces fload ${BP}/dev/via/unichrome/unichrome.fth \ Controller code \ fload ${BP}/dev/via/unichrome/accel2d.fth \ Accelerator -\ fload ${BP}/dev/via/unichrome/gxvga.fth \ Text mode support +fload ${BP}/dev/via/unichrome/vgamodes.fth \ Text mode support fload ${BP}/dev/video/common/rectangle16.fth \ Rectangular graphics fload ${BP}/cpu/x86/pc/olpc/expand16.fth \ Expand image by 2x Modified: dev/via/unichrome/unichrome.fth =================================================================== --- dev/via/unichrome/unichrome.fth 2009-05-06 18:54:58 UTC (rev 1174) +++ dev/via/unichrome/unichrome.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -41,28 +41,28 @@ ; -\ VGA register access +\ \ VGA register access +\ +\ \ reset attribute address flip-flop +\ : reset-attr-addr ( -- ) h# 3da ( input-status1 ) pc@ drop ; +\ +\ : video-mode! ( b -- ) reset-attr-addr h# 03c0 pc! ; +\ : attr! ( b index -- ) reset-attr-addr h# 03c0 pc! h# 03c0 pc! ; +\ : attr@ ( index -- b ) +\ reset-attr-addr h# 03c0 pc! h# 03c1 pc@ reset-attr-addr +\ ; +\ : grf! ( b index -- ) h# 03ce pc! h# 03cf pc! ; +\ : grf@ ( index -- b ) h# 03ce pc! h# 03cf pc@ ; +\ +\ : crt@ ( index -- byte ) h# 3d4 pc! h# 3d5 pc@ ; +\ : crt! ( byte index -- ) h# 3d4 pc! h# 3d5 pc! ; +\ +\ : seq@ ( index -- byte ) h# 3c4 pc! h# 3c5 pc@ ; +\ : seq! ( byte index -- ) h# 3c4 pc! h# 3c5 pc! ; +\ +\ : misc@ ( -- byte ) h# 3cc pc@ ; +\ : misc! ( byte -- ) h# 3c2 pc! ; -\ reset attribute address flip-flop -: reset-attr-addr ( -- ) h# 3da ( input-status1 ) pc@ drop ; - -: video-mode! ( b -- ) reset-attr-addr h# 03c0 pc! ; -: attr! ( b index -- ) reset-attr-addr h# 03c0 pc! h# 03c0 pc! ; -: attr@ ( index -- b ) - reset-attr-addr h# 03c0 pc! h# 03c1 pc@ reset-attr-addr -; -: grf! ( b index -- ) h# 03ce pc! h# 03cf pc! ; -: grf@ ( index -- b ) h# 03ce pc! h# 03cf pc@ ; - -: crt@ ( index -- byte ) h# 3d4 pc! h# 3d5 pc@ ; -: crt! ( byte index -- ) h# 3d4 pc! h# 3d5 pc! ; - -: seq@ ( index -- byte ) h# 3c4 pc! h# 3c5 pc@ ; -: seq! ( byte index -- ) h# 3c4 pc! h# 3c5 pc! ; - -: misc@ ( -- byte ) h# 3cc pc@ ; -: misc! ( byte -- ) h# 3c2 pc! ; - : pll, ( v44 v45 v46 misc -- ) bljoin l, ; \ Timing table for various resolutions @@ -88,7 +88,8 @@ \ width height htotal hsync hsyncend vtotal vsync vsyncend --pll-- misc create mode3-table - 640 w, 400 w, 800 w, 680 w, 776 w, 449 w, 412 w, 430 w, hex 35 04 05 67 pll, decimal +\ 640 w, 400 w, 800 w, 680 w, 776 w, 449 w, 412 w, 430 w, hex 35 04 05 67 pll, decimal + 640 w, 400 w, 800 w, 680 w, 776 w, 449 w, 412 w, 430 w, hex 54 90 03 67 pll, decimal \ width height htotal hsync hsyncend vtotal vsync vsyncend --pll-- misc create mode12-table @@ -99,7 +100,13 @@ : mode-3? ( -- flag ) res-entry mode3-table = ; : mode-12? ( -- flag ) res-entry mode12-table = ; -: find-timing-table ( width height -- error? ) +: find-timing-table ( width height depth -- error? ) + \ Mode12 check + 4 = if 2drop mode12-table to res-entry false exit then ( width height ) + + \ Text mode 3 check + dup d# 400 = if 2drop mode3-table to res-entry false exit then ( width height ) + res-table /res-table bounds ?do ( width height ) over i w@ = if ( width height ) dup i wa1+ w@ = if ( width height ) @@ -132,7 +139,10 @@ mode-12? if 8 + then ; : hblankend ( -- n ) - mode-3? mode-12? or if d# 792 else htotal then +\ mode-3? if d# 288 exit then + mode-3? if d# 792 exit then + mode-12? if d# 792 exit then + htotal ; : vdisplay ( -- n ) height ; : vblank ( -- n ) @@ -205,8 +215,9 @@ : seq-set ( mask reg# -- ) tuck seq@ or swap seq! ; : seq-clr ( mask reg# -- ) tuck seq@ swap invert and swap seq! ; -: crt-set ( mask reg# -- ) tuck crt@ or swap crt! ; -: crt-clr ( mask reg# -- ) tuck crt@ swap invert and swap crt! ; +\ : crt-set ( mask reg# -- ) tuck crt@ or swap crt! ; +\ : crt-clr ( mask reg# -- ) tuck crt@ swap invert and swap crt! ; +: crt-clr crt-clear ; : pixels>bytes ( pixels -- bytes ) depth d# 24 = if d# 32 else depth then * 3 >> ( bytes ) @@ -237,17 +248,23 @@ : legacy-settings ( -- ) \ Some EGA legacy mode settings 03 00 seq! \ Release reset bits - 01 01 seq! \ 8/9 timing (0 for mode 3) - 0f 02 seq! \ Enable map planes 0 and 1 (3 for mode 3) + mode-3? if 00 else 01 then + 01 seq! \ 8/9 timing (0 for mode 3) + mode-3? if 03 else 0f then + 02 seq! \ Enable map planes 0 and 1 (3 for mode 3) 00 03 seq! \ Character map select - 0e 04 seq! \ Extended memory present (2 for mode 3) + mode-3? if 02 else 0e then + 04 seq! \ Extended memory present (2 for mode 3) 0d 0a crt! \ Cursor start (text mode) 0e 0b crt! \ Cursor end (text mode) 00 0e crt! \ Cursor loc (text mode) 00 0f crt! \ Cursor loc (text mode) - 10 11 crt! \ Refreshes per line, disable vertical interrupt (60 in mode 3, 70 in mode 12) - 23 17 crt! \ address wrap, sequential access, not CGA compat mode (63 in mode 12) + mode-3? if 60 else mode-12? if 70 else 10 then then + 11 crt! \ Refreshes per line, disable vertical interrupt (60 in mode 3, 70 in mode 12) + mode-12? if 63 else 23 then + 17 crt! \ address wrap, sequential access, not CGA compat mode (63 in mode 12) + 04 0e crt! \ Make the register dump match the snapshots 60 0f crt! 01 49 crt! @@ -273,8 +290,10 @@ \ SRs set in romreset: 35-38,39,4c,68,6d-6f,78,f3 : tune-fifos ( -- ) - 20 3f 16 seq-mask \ FIFO threshold (VX855 value) (value is c in modes 3 and 12) - 7f ff 17 seq-mask \ FIFO depth (VX855 value) (value is 1f in modes 3 and 12) + mode-3? mode-12? or if 0c else 20 then + 3f 16 seq-mask \ FIFO threshold (VX855 value) (value is c in modes 3 and 12) + mode-3? mode-12? or if 1f else 7f then + ff 17 seq-mask \ FIFO depth (VX855 value) (value is 1f in modes 3 and 12) 60 ff 18 seq-mask \ Display Arbiter (VX855 value) 18 21 seq! \ (typical request track FIFO number channel 0 @@ -323,17 +342,24 @@ dup c@ i grf! 1+ loop drop + \ For mode 3, add: 10 5 grf! 0e 6 grf! 0 7 grf! + mode-3? if + 10 5 grf! + 0e 6 grf! + 00 7 grf! + then \ For mode 13, add: 40 5 grf! -\ For mode 3, add: 10 5 grf! 0e 6 grf! 0 7 grf! 0 20 grf! 0 21 grf! 0 22 grf! \ AT6 is 6 not 14, AT8-f is 8-f, not 38-3f (different intensities) 10 0 do i i attr! loop - 01 10 attr! \ mode control (0c for text mode 3) + mode-3? if 0c else 01 then + 10 attr! \ mode control (0c for text mode 3) 00 11 attr! \ overscan color 0f 12 attr! \ color plane enable - 00 13 attr! \ horizontal pixel pan - (08 for text mode 3) + mode-3? if 08 else 00 then + 13 attr! \ horizontal pixel pan - (08 for text mode 3) 00 14 attr! \ high bits of color palette index htotal 3 >> 5 - dup 00 crt! 5 >> 08 36 crt-mask @@ -359,10 +385,12 @@ ff 18 crt! 10 7 crt-set 40 9 crt-set 10 35 crt-set \ HSYNC adjust - 06 07 33 crt-mask \ 01 for text mode 3, 00 for mode 12 + mode-3? if 01 else mode-12? if 00 else 06 then then + 07 33 crt-mask \ 01 for text mode 3, 00 for mode 12 \ Max scan line value 0 - 1f 9 crt-clr 1f 14 crt! + mode-3? if 0f else 00 then 1f 9 crt-mask + 1f 14 crt! \ Underline location vblank 1- dup 15 crt! dup 5 >> 08 07 crt-mask dup 4 >> 20 09 crt-mask 7 >> 08 35 crt-mask vblankend 1- 16 crt! @@ -372,8 +400,13 @@ c8 33 crt-clr \ Gamma, interlace, prefetch, HSYNC shift \ Offset - width pixels>bytes to /scanline - /scanline bytes>chunks dup 13 crt! 3 >> e0 35 crt-mask + mode-3? if + d# 40 + else + width pixels>bytes to /scanline + /scanline bytes>chunks + then + dup 13 crt! 3 >> e0 35 crt-mask \ fetch count hdisplay pixels>bytes bytes>chunks 8 + dup 1 >> 1c seq! 9 >> 03 1d seq-mask @@ -383,7 +416,7 @@ : set-primary-mode ( width height depth -- error? ) to depth to height to width - width height find-timing-table ?dup if exit then + width height depth find-timing-table ?dup if exit then 80 17 crt-clr \ Assert reset @@ -404,10 +437,10 @@ \ depth 8 <> set-gamma \ No gamma for 8bpp palette mode false set-gamma - \ Maybe do some power-up thingy here - pll set-primary-dotclock - - use-ext-clock + mode-3? 0= if + pll set-primary-dotclock + use-ext-clock + then \ 01 6b crt-clr \ Appears to be reserved RO bit Added: dev/via/unichrome/vgamodes.fth =================================================================== --- dev/via/unichrome/vgamodes.fth (rev 0) +++ dev/via/unichrome/vgamodes.fth 2009-05-08 07:56:10 UTC (rev 1175) @@ -0,0 +1,68 @@ +\ XXX get these from video/common/defer.fth +\ false instance value 6-bit-primaries? \ Indicate if DAC only supports 6bpp +\ defer ext-textmode ' noop to ext-textmode +\ These are just to make vga.fth happy. They are ba +\ defer rs@ defer rs! +\ defer idac@ defer idac! +\ defer xvideo-on +\ From graphics.fth + +\ defer plt@ +\ defer plt! +\ defer rindex! +\ defer windex! + +: ext-textmode + use-vga-dac + h# ff h# e crt! h# ff h# f crt! \ Move the hardware cursor off-screen + h# 04 h# 33 crt! \ Hsync adjustment + h# 10 h# 35 crt! \ Clear extended bits that can't be on for this mode's size + h# 00 h# 15 seq! \ Not using graphics modes + h# 0c h# 16 seq! \ FIFO + h# 1f h# 17 seq! \ FIFO + h# 4e h# 18 seq! \ FIFO + h# 20 h# 1a seq! \ Extended mode memory access disable + h# 54 h# 1c seq! \ Hdisp fetch count low + h# 00 h# 1d seq! \ Hdisp fetch count high + h# 00 h# 51 seq! \ FIFO + h# 06 h# 58 seq! \ FIFO + h# 00 h# 71 seq! \ FIFO + h# 00 h# 73 seq! \ FIFO +; +\ defer rmr@ defer rmr! + +: (set-colors) ( adr index #indices -- ) + swap windex! + 3 * bounds ?do i c@ plt! loop +; + +\ fload ${BP}/dev/video/controlr/vga.fth +fload ${BP}/dev/video/common/textmode.fth + +0 value pc-font-adr +: (pc-font) ( -- fontparams ) + pc-font-adr 0= if + " pcfont" " find-drop-in" evaluate if ( adr len ) + drop to pc-font-adr + else + default-font exit + then + then + + " /packages/terminal-emulator" find-package if ( phandle ) + " decode-font" rot find-method if ( xt ) + pc-font-adr swap execute ( font-params ) + exit + then + then + + \ Fallback + default-font +; +' (pc-font) to pc-font + +warning @ warning off +: text-mode3 ( -- ) + text-mode3 +; +warning on

1 0

r1174 - cpu/x86/pc/olpc
by svn＠openfirmware.info 06 May '09

06 May '09

Author: wmb Date: 2009-05-06 20:54:58 +0200 (Wed, 06 May 2009) New Revision: 1174 Modified: cpu/x86/pc/olpc/rmstart.fth Log: OLPC - fixed rmstart to setup the GDT consistently with the new version of resetend.fth Modified: cpu/x86/pc/olpc/rmstart.fth =================================================================== --- cpu/x86/pc/olpc/rmstart.fth 2009-05-06 07:08:33 UTC (rev 1173) +++ cpu/x86/pc/olpc/rmstart.fth 2009-05-06 18:54:58 UTC (rev 1174) @@ -29,6 +29,7 @@ \needs start-assembling fload ${BP}/cpu/x86/asmtools.fth \needs write-dropin fload ${BP}/forth/lib/mkdropin.fth +fload ${BP}/cpu/x86/pc/port80.fth hex @@ -58,7 +59,6 @@ " h# 9 # ah cmp > if h# 57 # ah add else h# 30 # ah add then " evaluate " al bl mov ah al mov bl ah mov " evaluate - ; [ifdef] debug-reset @@ -106,26 +106,21 @@ \ ffff.fc00 GDT - 0 w, 0 l, 0 w, \ 0 Mandatory null descriptor - 0 w, 0 l, 0 w, \ * Another null descriptor + 1f w, ffff.fc00 l, 0 w, \ 0 Pointer to GDT in first slot + 0 w, 0 l, 0 w, \ * Null descriptor ffff w, 9b.000000 l, 00.c.f w, \ 10 Code, linear=physical, full 4Gbytes ffff w, 93.000000 l, 00.c.f w, \ 18 Data, linear=physical, full 4Gbytes - \ ffff.fc20 GDT limit + address - - 1f w, ffff.fc00 l, \ # slots (4 * 8 - 1) , starting address - 0 w, \ Padding - \ ------->>>>> Startup code, reached by branch from main entry point below \ - \ ffff.fc28 + \ ffff.fc20 here \ Mark the beginning of this code so its size may be determined \ and so that a jump to it may be assembled later. 16-bit - h# 01 # al mov al h# 80 # out + h# 01 port80 \ The following code sequence is a workaround for a hardware situation. \ The MIC-on LED defaults to "on", because the CODEC chip powers on with @@ -220,7 +215,7 @@ then \ Return to here after the reset - h# 02 # al mov al h# 80 # out + h# 02 port80 op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34 @@ -243,7 +238,7 @@ \ above is reachable with a 16-bit address and through the "boosted" \ code segment. - op: cs: 0f c, 01 c, 16 c, fc20 w, \ lgdte cs:[fc20] Setup GDT + op: cs: 0f c, 01 c, 16 c, fc00 w, \ lgdte cs:[fc00] Setup GDT op: cr0 bx mov \ Get existing CR0 value @@ -253,7 +248,7 @@ eb c, 0 c, \ jmp to next location to flush prefetch queue \ note: CPL is now 0 - h# 03 # al mov al h# 80 # out + h# 03 port80 op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34 @@ -288,7 +283,7 @@ ascii h report [then] - h# 0f # al mov al h# 80 # out + h# 0f port80 op: h# 1430 # dx mov op: dx ax in op: h# 9999 # ax cmp = if h# 34 # al mov al h# 70 # out \ Write to CMOS 0x34 @@ -302,8 +297,8 @@ here over - ( adr , size-of-preceding-code ) - \ ffff.fc28 is the location of the code that follows the GDT - ffff.fff0 ffff.fc28 - swap - ( address #bytes-to-pad ) + \ ffff.fc20 is the location of the code that follows the GDT + ffff.fff0 ffff.fc20 - swap - ( address #bytes-to-pad ) \ The code mustn't extend past ffff.ffc0, because that is where PC \ manufacturers put the 0x10-byte BIOS version string. @@ -318,9 +313,8 @@ \ when it comes out of reset 16-bit - cli cld \ Turn off interrupts (does not affect NMI) - #) jmp \ Relative jump back to ffff.fc28 + #) jmp \ Relative jump back to ffff.fc20 0 w, 0 c, \ align "pad" to end of ROM loader-version# l, \ version# loader-format# w, \ "format" (>1 when crc present)

1 0

r1173 - in ofw: inet inetv6
by svn＠openfirmware.info 06 May '09

06 May '09

Author: wmb Date: 2009-05-06 09:08:33 +0200 (Wed, 06 May 2009) New Revision: 1173 Modified: ofw/inet/tcp.fth ofw/inetv6/tcp.fth ofw/inetv6/tcpv6.fth Log: TCP - bump the local port number on each open. Tip 'o the Hat to Luke Gorrie. Modified: ofw/inet/tcp.fth =================================================================== --- ofw/inet/tcp.fth 2009-05-04 17:05:54 UTC (rev 1172) +++ ofw/inet/tcp.fth 2009-05-06 07:08:33 UTC (rev 1173) @@ -231,6 +231,14 @@ then ; +h# 555 value next-tcp-local-port + +: alloc-next-tcp-local-port ( -- port ) + next-tcp-local-port 1+ ( port ) + h# ffff and h# 555 max ( port ) + dup to next-tcp-local-port ( port ) +; + \ send sequence variables 0 instance value snd_una \ send unacknowledged 0 instance value snd_nxt \ send next @@ -2339,7 +2347,7 @@ ['] protocol-tick d# 500 alarm - h# 555 to my-tcp-port \ XXX + alloc-next-tcp-local-port to my-tcp-port true to alive? true Modified: ofw/inetv6/tcp.fth =================================================================== --- ofw/inetv6/tcp.fth 2009-05-04 17:05:54 UTC (rev 1172) +++ ofw/inetv6/tcp.fth 2009-05-06 07:08:33 UTC (rev 1173) @@ -231,6 +231,14 @@ then ; +h# 555 value next-tcp-local-port + +: alloc-next-tcp-local-port ( -- port ) + next-tcp-local-port 1+ ( port ) + h# ffff and h# 555 max ( port ) + dup to next-tcp-local-port ( port ) +; + \ send sequence variables 0 instance value snd_una \ send unacknowledged 0 instance value snd_nxt \ send next @@ -2337,7 +2345,7 @@ ['] protocol-tick d# 500 alarm - h# 555 to my-tcp-port \ XXX + alloc-next-tcp-local-port to my-tcp-port true to alive? true Modified: ofw/inetv6/tcpv6.fth =================================================================== --- ofw/inetv6/tcpv6.fth 2009-05-04 17:05:54 UTC (rev 1172) +++ ofw/inetv6/tcpv6.fth 2009-05-06 07:08:33 UTC (rev 1173) @@ -248,6 +248,14 @@ ; [ifndef] include-ipv4 +h# 555 value next-tcp-local-port + +: alloc-next-tcp-local-port ( -- port ) + next-tcp-local-port 1+ ( port ) + h# ffff and h# 555 max ( port ) + dup to next-tcp-local-port ( port ) +; + \ send sequence variables 0 instance value snd_una \ send unacknowledged 0 instance value snd_nxt \ send next @@ -2442,7 +2450,7 @@ ['] protocol-tick d# 500 alarm - h# 555 to my-tcp-port \ XXX + alloc-next-tcp-local-port to my-tcp-port true to alive? true

1 0

r1172 - cpu/x86/pc/biosload
by svn＠openfirmware.info 04 May '09

04 May '09

Author: wmb Date: 2009-05-04 19:05:54 +0200 (Mon, 04 May 2009) New Revision: 1172 Modified: cpu/x86/pc/biosload/config-via.fth Log: Biosload - updated config-via settings so Linux will boot. Modified: cpu/x86/pc/biosload/config-via.fth =================================================================== --- cpu/x86/pc/biosload/config-via.fth 2009-05-04 17:04:44 UTC (rev 1171) +++ cpu/x86/pc/biosload/config-via.fth 2009-05-04 17:05:54 UTC (rev 1172) @@ -11,6 +11,8 @@ create debug-startup +create virtual-mode +create linux-support \ create serial-console \ create use-usb-debug-port create pc @@ -20,7 +22,7 @@ create addresses-assigned \ Don't reassign PCI addresses \ create virtual-mode create use-root-isa -create use-isa-ide +\ create use-isa-ide create use-ega create use-elf create use-watch-all

1 0

r1171 - cpu/x86/pc/olpc/via
by svn＠openfirmware.info 04 May '09

04 May '09

Author: wmb Date: 2009-05-04 19:04:44 +0200 (Mon, 04 May 2009) New Revision: 1171 Modified: cpu/x86/pc/olpc/via/romreset.bth Log: Via romreset.bth - added tuning settings for various devices, enabling power control and APIC. Modified: cpu/x86/pc/olpc/via/romreset.bth =================================================================== --- cpu/x86/pc/olpc/via/romreset.bth 2009-05-03 15:45:53 UTC (rev 1170) +++ cpu/x86/pc/olpc/via/romreset.bth 2009-05-04 17:04:44 UTC (rev 1171) @@ -452,7 +452,7 @@ 85 ff 05 mreg \ Dynamic clocks 89 ff f8 mreg \ Dynamic clocks 8b ff bf mreg \ Dynamic clocks - 8d ff 20 mreg \ Self-refresh in C3 and C4 + 8d ff 30 mreg \ Self-refresh in C3 and C4 90 ff ff mreg \ Gate clocks 91 ff ff mreg \ Gate clocks 92 cc cc mreg \ Dynamic buffer control, power down comparators @@ -474,15 +474,19 @@ d# 12 0 devfunc \ SDIO tuning 44 01 01 mreg \ Enable backdoor - 8b 05 05 mreg \ Report both 1.8V and 3.3V + 8b 05 01 mreg \ Do not report 1.8V support 8c c3 03 mreg \ Falling edge trigger for Slots 1 and 2 data in high speed 8e ff 7e mreg \ Delay host clock for Slots 1, 2, 3 by 4.8 nS - 8f 09 0a mreg \ Falling edge trigger on slot 3 output clock under high speed - 99 ff f9 mreg \ Two slots not 3 (FIXME for OLPC) + 8f 09 01 mreg \ Falling edge trigger on slot 3 output clock under high speed +[ifdef] demo-board + 99 ff f9 mreg \ Two slots +[else] + 99 ff fa mreg \ Three slots +[then] end-table d# 15 0 devfunc \ EIDE tuning - 40 02 01 mreg \ Enable primary channel + 40 02 02 mreg \ Enable primary channel 4a ff 5e mreg \ Drive1 timing 4b ff 20 mreg \ Drive0 timing 4c f0 60 mreg \ Address setup time @@ -492,6 +496,125 @@ d4 ac 24 mreg \ Config 3 end-table + \ USB Tuning + d# 16 0 devfunc \ UHCI Ports 0,1 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 1 devfunc \ UHCI Ports 2,3 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 2 devfunc \ UHCI Ports 4,5 + 4a 02 02 mreg \ Enable Stop Bus Master Cycle if HALT Bit is Asserted + 4b 60 60 mreg \ Enable New UHCI Dynamic Scheme - 66MHz (40) & 33MHz (20) + c1 20 00 mreg \ Disable USB PIRQ + end-table + + d# 16 4 devfunc \ EHCI + 42 40 40 mreg \ Enable Check PRESOF of ITDOUT Transaction during Fetching Data from DRAM + 43 c0 c0 mreg \ Enable Dynamic Clock Scheme - 66MHz (80) & 33MHz (40) + 48 20 00 mreg \ Disable DMA bursts + 4c 03 03 mreg \ Squelch detector fine tune - 01 is 112.5 mV +\ 4d 01 01 mreg \ reserved bit +\ 4e 03 03 mreg \ reserved bit - setting is appropriate for vx800 + 4f 10 10 mreg \ Enable Clear RUN Bit when EHCI_IDLE + 50 80 80 mreg \ Fetch one more QH before de-asserting Doorbell + 55 ff ff mreg \ Disconnect level fine tune - 575 mV for ports 0-3 + 56 0f 0f mreg \ Disconnect level fine tune - 575 mV for ports 4-5 + 5a ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 0,1 + 5b ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 2,3 + 5c 0f 00 mreg \ DPLL Track Speed 2, DPLL Lock Speed 2 + 5d ff cc mreg \ HS termination resistor fine tune - 45 ohm, 48 ohm for ports 4,5 + 64 05 05 mreg \ Bump NULL-SOF valid time to 8 micro frames (04), Inhibit C4 state on USB 1.1 ISO activity (01) + end-table + + d# 17 0 devfunc \ Bus control and power management + 40 44 44 mreg \ Enable I/O Recovery time (40), Enable ports 4d0/4d1 for edge/level setting (04) + 42 fc f0 mreg \ Various setting related to DMA line buffers + 43 0f 0b mreg \ Enable PCI delayed transactions (08), Write transaction timer (02), Read transaction timer (01) +\ 4d 01 01 mreg \ Enable LPC TPM + 4e 08 08 mreg \ Enable ports 74/75 for CMOS RAM access + 52 1b 19 mreg \ No wait state between SIRQ transactions (10), Enable SIRQ (08), SIRQ frame is 6 clocks (3>1) + 53 80 80 mreg \ Enable PC/PCI DMA + 55 ff a0 mreg \ INTA and External General interrupt routing - INTA:IRQ10 + 56 ff b9 mreg \ INTB,C routing - INTC:IRQ11, INTB:IRQ9 + 57 f0 a0 mreg \ INTD routing - INTD:IRQ10 + 58 40 40 mreg \ Enable Internal APIC + 5b 10 10 mreg \ Enable APIC Clock Gating + 68 80 80 mreg \ Enable HPETs + 69 ff 00 mreg \ HPET base low + 6a ff d0 mreg \ HPET base mid + 6b ff fe mreg \ HPET base high + 6e ff 18 mreg \ COMB not pos decoded but otherwise set to 2f8, COMA pos decoded at 3f8 + 70 ff 06 mreg \ SVID backdoor + 71 ff 11 mreg \ SVID backdoor + 72 ff 37 mreg \ SVID backdoor + 73 ff 33 mreg \ SVID backdoor + 80 20 20 mreg \ Debounce power button +\ 81 08 00 mreg \ 24-bit ACPI timer - why? + 84 ff da mreg \ IRQs 7,6,4,3,1 are primary wakeups + 85 ff 40 mreg \ IRQ 14 is primary wakeup + 8a 9f 1f mreg \ C-state auto switching with normal latencies +[ifdef] demo-board + 8d 18 18 mreg \ fast clock as throttle timer tick, hold SMI# low until event status cleared (FIXME for OLPC) +[else] + 8d 18 10 mreg \ fast clock as throttle timer tick, do not hold SMI# low +[then] +\ 9b 80 80 mreg \ reserved bit + b4 80 00 mreg \ No positive decoding for UART1 ??? + b8 fc 80 mreg \ UART DMA Control Registers Base low (port is 4080) + b9 ff 40 mreg \ UART DMA Control Registers Base high + ba 77 44 mreg \ COM1 DMA Channel Selects - DMA0 for both Transmit and Receive + bc ff 00 mreg \ SPI MMIO Base Address 15:8 (address is fed30000) + bd ff d3 mreg \ SPI MMIO Base Address 23:16 + be ff fe mreg \ SPI MMIO Base Address 31:24 + d0 f0 00 mreg \ SMBUS IO Base Address low (port is 4100) + d1 ff 41 mreg \ SMBUS IO Base Address high + d2 0f 01 mreg \ Enable SMBUS and set other characteristics + e2 80 80 mreg \ Inhibit C4 during USB isochronous transaction + e4 ff a0 mreg \ Enable short C3/C4 (80), select various multi-function pins + e5 60 60 mreg \ Enable NM bus master as source of bus master status, enable NB int to wakeup from Cx + e6 20 20 mreg \ Enable USB Device Mode Bus Master as Break Event + e7 80 80 mreg \ Enable APIC Cycle Reflect to ALL Bus Master Activity Effective Signal + fc 06 04 mreg \ DPSLP# to SLP# Latency Adjustment - 22.5 us + end-table + + d# 17 7 devfunc \ South-North Module Interface Control + 50 df 08 mreg \ SM priorities - HDAC high priority, others low + 51 80 80 mreg \ Enable subtractive decode for P2P cycle + 54 7b 02 mreg \ CCA REQ timing - synchronize USB REQ but not others +0 [if] + 61 ff 2a mreg \ Page C ROM shadow - C0000-CBFFF RO, CC000-CFFFF off + 62 ff 00 mreg \ Page D ROM shadow - D0000-DFFFF off + 63 f3 a0 mreg \ Page E/F ROM shadow - E0000-EFFFF RO, F0000-FFFFF RO, no memory hole + 64 ff aa mreg \ Page E ROM shadow - E0000-EFFFF RO +[then] + 70 fb 82 mreg \ CPU to PCI flow control - CPU to PCI posted write, Enable Delay Transaction + 72 af ee mreg \ Read caching and prefix - various knobs (40 bit is reserved) + 73 79 01 mreg \ Enable PCI broken master timer & various knobs + 74 d8 08 mreg \ Lock Cycle Issued by CPU Blocks P2C Cycles (04 bit is reserved) + 75 ff 0f mreg \ Use New grant mechanism for PCI arbitration, PCI Master Bus Timeout is 7x16 PCI clock + 76 fd 50 mreg \ Enable PCI parking, Grant to CPU after 2 PC master grants + 77 58 48 mreg \ PCI1 FIFO empty blocks CPU to PCI read, Read FIFO times out after 1 ms + 80 07 07 mreg \ PCI1 and HDAC upstream read does not pass write, APCI blocks upstream write + 82 3e 20 mreg \ Monitor CCA and SDIO2 + e0 e0 80 mreg \ Dynamic CCA clock + e2 1e 00 mreg \ Use dynamic clocks for Downstream Interface, PCI1, Downstream HDAC, Downstream SM Internal PCI device + e3 ff 5e mreg \ PCI1 dynamic clock, PCI clock on when GRANT# asserted, Enable P2CR data timeout at 7*8 PCI clocks +\ e6 1f 1f mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) + e6 1f 19 mreg \ Split APIC decoding, Snoop FEEx.xxxx, Enable top SMM, High SMM, Compat SMM (20 bit is reserved) + fc 40 40 mreg \ Enable CCA Read Clock When MTXCTL state machine is not idle + end-table + + d# 20 0 devfunc + 41 01 01 mreg \ Dynamic clock for HDAC + end-table + \ APIC setup 0 2 devfunc 59 01 01 mreg \ MSI Flat model support @@ -508,8 +631,6 @@ \ 00 to run - Axxxxx hits VGA in normal mode, hits shadow DRAM in SMM \ 01 to access VGA when in SMM (data cycles only) - \ USB Tuning - h# 1c00.0000 # mem-info-pa 4 + #) mov \ Top of memory long-offsets on

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r1170 - cpu/x86/pc/olpc/via
by svn＠openfirmware.info 03 May '09

03 May '09

Author: wmb Date: 2009-05-03 17:45:53 +0200 (Sun, 03 May 2009) New Revision: 1170 Modified: cpu/x86/pc/olpc/via/romreset.bth Log: Via romreset.bth - reorder and fixed some formatting inconsistencies. No functional change. Modified: cpu/x86/pc/olpc/via/romreset.bth =================================================================== --- cpu/x86/pc/olpc/via/romreset.bth 2009-05-03 08:48:11 UTC (rev 1169) +++ cpu/x86/pc/olpc/via/romreset.bth 2009-05-03 15:45:53 UTC (rev 1170) @@ -354,35 +354,112 @@ \ Also from FinalSetting.c - 0 4 devfunc \ PM_table - a0 80 80 mreg \ Enable dynamic power management (coreboot for vx800 uses f0; 70 bits are reserved on vx855) - a1 e0 e0 mreg \ Dynamic power management for DRAM - a2 d6 d6 mreg \ Dynamic clock stop controls (coreboot for vx8000 uses ff fe; 29 bits are reserved on vx800) - a3 80 80 mreg \ Toggle reduction on - a5 81 81 mreg \ "Reserved" + 0 4 devfunc \ PM_table + a0 80 80 mreg \ Enable dynamic power management (coreboot for vx800 uses f0; 70 bits are reserved on vx855) + a1 e0 e0 mreg \ Dynamic power management for DRAM + a2 d6 d6 mreg \ Dynamic clock stop controls (coreboot for vx8000 uses ff fe; 29 bits are reserved on vx800) + a3 80 80 mreg \ Toggle reduction on + a5 81 81 mreg \ "Reserved" + end-table - \ Additional PM settings not in coreboot - 84 ff db mreg \ Dynamic clocks - 85 ff 05 mreg \ Dynamic clocks - 89 ff f8 mreg \ Dynamic clocks - 8b ff bf mreg \ Dynamic clocks - 8d ff 20 mreg \ Self-refresh in C3 and C4 - 90 ff ff mreg \ Gate clocks - 91 ff ff mreg \ Gate clocks - 92 cc cc mreg \ Dynamic buffer control, power down comparators - a8 20 20 mreg \ Central traffic controller dynamic clock stop +\ UMARamSetting.c +\ SetUMARam + 0 3 devfunc + a1 00 80 mreg \ Enable internal GFX + a2 ff ee mreg \ Set GFX timers + a4 ff 01 mreg \ GFX Data Delay to Sync with Clock + a6 ff 76 mreg \ Page register life timer + a7 ff 8c mreg \ Internal GFX allocation + b3 ff 9a mreg \ Disable read past write +\ de ff 06 mreg \ Enable CHA and CHB merge mode (but description says this value disable merging!) 00 for compatibility end-table - + + 0 3 devfunc + a1 70 40 mreg \ Set frame buffer size to 64M (8M:10, 16M:20, 32M:30, etc) - fbsize + end-table + + 1 0 devfunc + \ Reg 1b2 controls the number of writable bits in the BAR at 810 + b2 ff 70 mreg \ Offset of frame buffer, depends on size - fbsize + 04 ff 07 mreg \ Enable IO and memory access to display + end-table + + d000.0000 810 config-wl \ S.L. Base address + f000.0000 814 config-wl \ MMIO Base address + cd01 3a0 config-ww \ Set frame buffer size and CPU-relative address and enable + + 0 0 devfunc + c6 02 02 mreg \ Enable MDA forwarding (not in coreboot) + d4 00 03 mreg \ Enable MMIO and S.L. access in Host Control device + fe 00 10 mreg \ 16-bit I/O port decoding for VGA (no aliases) + end-table + + 1 0 devfunc + b0 07 03 mreg \ VGA memory selection (coreboot uses 03, Phoenix 01. I think 03 is correct) + end-table + + 01 3c3 port-wb \ Graphics chip IO port access on + 10 3c4 port-wb 01 3c5 port-wb \ Turn off register protection + 67 3c2 port-wb \ Enable CPU Display Memory access (2), use color not mono port (1) + + 68 3c4 port-wb e0 3c5 port-wb \ Size of System Local Frame Buffer - Value depends on frame buffer size - fbsize + \ 00:512MB 80:256MB c0:128MB e0:64MB f0:32MB f8:16MB fc:8MB fe:4MB ff:2MB + + \ These 2 are scratch registers that communicate with the VGA BIOS + 3d 3d4 port-wb 74 3d5 port-wb \ Value depends on DIMM frequency - used by VGA BIOS + 39 3c4 port-wb 10 3c5 port-wb \ BIOS Reserved Register 0 - FBsize_MiB/4 - fbsize - VGA BIOS + + 5a 3c4 port-wb 01 3c5 port-wb \ Point to secondary registers + 4c 3c4 port-wb 83 3c5 port-wb \ LCDCK Clock Synthesizer Value 2 + 5a 3c4 port-wb 00 3c5 port-wb \ Point back to primary registers + + 6d 3c4 port-wb e0 3c5 port-wb \ Base address [28:21] of SL in System Memory - base is 1c00.0000 - fbsize, memsize + 6e 3c4 port-wb 00 3c5 port-wb \ Base address [36:29] of SL in System Memory + 6f 3c4 port-wb 00 3c5 port-wb \ Base address [47:37] of SL in System Memory + + 36 3c4 port-wb 11 3c5 port-wb \ Subsystem Vendor ID 1 + 35 3c4 port-wb 06 3c5 port-wb \ Subsystem Vendor ID 0 + 38 3c4 port-wb 51 3c5 port-wb \ Subsystem ID 1 + 37 3c4 port-wb 22 3c5 port-wb \ Subsystem ID 0 + + f3 3c4 port-wb 00 3c5 port-wb \ 1a for snapshot mode + f3 3d4 port-wb 12 3c5 port-wb \ Snapshot mode control - 1a for snapshot mode + +\ cache_as_ram_auto.c : enable_shadow_ram + + 0 3 devfunc +\ Initial DOS hole settings, so the firmware can set things up + 80 ff ff mreg \ Enable R/W memory access to Cxxxx bank + 81 ff ff mreg \ Enable R/W memory access to Dxxxx bank + 82 ff ff mreg \ Enable R/W memory access to Exxxx bank + 83 30 30 mreg \ Enable R/W memory access to Fxxxx bank (30), no memory hole (0c), SMM switching of Axxxx bank (03) + +\ Final DOS hole settings, after stuff has been copied in, for reference +\ 80 ff 2a mreg \ CC000-CFFFF off, C0000-C7FFF RO +\ 81 ff 00 mreg \ D0000-DFFFF off +\ 82 ff aa mreg \ E0000-EFFFF RO +\ 83 ff 20 mreg \ Enable R/W memory access to Fxxxx bank (20), no memory hole (0c), SMM switching of Axxxx bank (03) + end-table + \ Additional Power Management Setup not in coreboot 0 2 devfunc 76 08 08 mreg \ AGTL Power down buffers in S3 92 ff 40 mreg \ ACPI IO Base address end-table - 0 3 devfunc - 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) + 0 4 devfunc + 84 ff db mreg \ Dynamic clocks + 85 ff 05 mreg \ Dynamic clocks + 89 ff f8 mreg \ Dynamic clocks + 8b ff bf mreg \ Dynamic clocks + 8d ff 20 mreg \ Self-refresh in C3 and C4 + 90 ff ff mreg \ Gate clocks + 91 ff ff mreg \ Gate clocks + 92 cc cc mreg \ Dynamic buffer control, power down comparators + a8 20 20 mreg \ Central traffic controller dynamic clock stop end-table - + + \ Bus tuning 0 5 devfunc 54 8f 80 mreg \ SM request gets high priority, PCCA occupancy timer off 55 0f 04 mreg \ PCCA P2C Promote Timer value 4 @@ -415,91 +492,6 @@ d4 ac 24 mreg \ Config 3 end-table -\ UMARamSetting.c -\ SetUMARam - 0 3 devfunc - a1 00 80 mreg \ Enable internal GFX - a2 ff ee mreg \ Set GFX timers - a4 ff 01 mreg \ GFX Data Delay to Sync with Clock - a6 ff 76 mreg \ Page register life timer - a7 ff 8c mreg \ Internal GFX allocation - b3 ff 9a mreg \ Disable read past write -\ de ff 06 mreg \ Enable CHA and CHB merge mode (but description says this value disable merging!) 00 for compatibility - end-table - - 0 3 devfunc - a1 70 40 mreg \ Set frame buffer size to 64M (8M:10, 16M:20, 32M:30, etc) - fbsize - end-table - - 1 0 devfunc - \ Reg 1b2 controls the number of writable bits in the BAR at 810 - b2 ff 70 mreg \ Offset of frame buffer, depends on size - fbsize - 04 ff 07 mreg \ Enable IO and memory access to display - end-table - - d000.0000 810 config-wl \ S.L. Base address - f000.0000 814 config-wl \ MMIO Base address - cd01 3a0 config-ww \ Set frame buffer size and CPU-relative address and enable - - 0 0 devfunc - c6 02 02 mreg \ Enable MDA forwarding (not in coreboot) - d4 00 03 mreg \ Enable MMIO and S.L. access in Host Control device - fe 00 10 mreg \ 16-bit I/O port decoding for VGA (no aliases) - end-table - - 1 0 devfunc - b0 07 03 mreg \ VGA memory selection (coreboot uses 03, Phoenix 01. I think 03 is correct) - end-table - - 01 3c3 port-wb \ Graphics chip IO port access on - 10 3c4 port-wb 01 3c5 port-wb \ Turn off register protection - 67 3c2 port-wb \ Enable CPU Display Memory access (2), use color not mono port (1) - - 68 3c4 port-wb e0 3c5 port-wb \ Size of System Local Frame Buffer - Value depends on frame buffer size - fbsize - \ 00:512MB 80:256MB c0:128MB e0:64MB f0:32MB f8:16MB fc:8MB fe:4MB ff:2MB - - \ These 2 are scratch registers that communicate with the VGA BIOS - 3d 3d4 port-wb 74 3d5 port-wb \ Value depends on DIMM frequency - used by VGA BIOS - 39 3c4 port-wb 10 3c5 port-wb \ BIOS Reserved Register 0 - FBsize_MiB/4 - fbsize - VGA BIOS - - 5a 3c4 port-wb 01 3c5 port-wb \ Point to secondary registers - 4c 3c4 port-wb 83 3c5 port-wb \ LCDCK Clock Synthesizer Value 2 - 5a 3c4 port-wb 00 3c5 port-wb \ Point back to primary registers - - 6d 3c4 port-wb e0 3c5 port-wb \ Base address [28:21] of SL in System Memory - base is 1c00.0000 - fbsize, memsize - 6e 3c4 port-wb 00 3c5 port-wb \ Base address [36:29] of SL in System Memory - 6f 3c4 port-wb 00 3c5 port-wb \ Base address [47:37] of SL in System Memory - - 36 3c4 port-wb 11 3c5 port-wb \ Subsystem Vendor ID 1 - 35 3c4 port-wb 06 3c5 port-wb \ Subsystem Vendor ID 0 - 38 3c4 port-wb 51 3c5 port-wb \ Subsystem ID 1 - 37 3c4 port-wb 22 3c5 port-wb \ Subsystem ID 0 - - f3 3c4 port-wb 00 3c5 port-wb \ 1a for snapshot mode - f3 3d4 port-wb 12 3c5 port-wb \ Snapshot mode control - 1a for snapshot mode - -\ cache_as_ram_auto.c : enable_shadow_ram - 0 3 devfunc - -\ Initial DOS hole settings, so the firmware can set things up - 80 ff ff mreg \ Enable R/W memory access to Cxxxx bank - 81 ff ff mreg \ Enable R/W memory access to Dxxxx bank - 82 ff ff mreg \ Enable R/W memory access to Exxxx bank - 83 30 30 mreg \ Enable R/W memory access to Fxxxx bank (30), no memory hole (0c), SMM switching of Axxxx bank (03) - -\ Final DOS hole settings, after stuff has been copied in, for reference -\ 80 ff 2a mreg \ CC000-CFFFF off, C0000-C7FFF RO -\ 81 ff 00 mreg \ D0000-DFFFF off -\ 82 ff aa mreg \ E0000-EFFFF RO -\ 83 ff 20 mreg \ Enable R/W memory access to Fxxxx bank (20), no memory hole (0c), SMM switching of Axxxx bank (03) - - end-table - - \ Low 2 bits of 86: - \ x1 to write to SMM shadow memory behind VGA - \ 00 to run - Axxxxx hits VGA in normal mode, hits shadow DRAM in SMM - \ 01 to access VGA when in SMM (data cycles only) - \ APIC setup 0 2 devfunc 59 01 01 mreg \ MSI Flat model support @@ -511,6 +503,13 @@ 86 38 38 mreg \ SMM and APIC Decoding: enable APIC lowest int arb, IOAPIC split decode, MSI (SMM later) end-table + \ Low 2 bits of 86: + \ x1 to write to SMM shadow memory behind VGA + \ 00 to run - Axxxxx hits VGA in normal mode, hits shadow DRAM in SMM + \ 01 to access VGA when in SMM (data cycles only) + + \ USB Tuning + h# 1c00.0000 # mem-info-pa 4 + #) mov \ Top of memory long-offsets on

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openfirmware May 2009