[coreboot] BayTrail PCIe problems (hangup) in FSP (in U-Boot)

ron minnich rminnich at gmail.com
Thu Nov 2 16:20:49 CET 2017

Simon Glass has done excellent work with making u-boot run as a coreboot
payload for at least 5 years now. You might want to talk to him. It might
help avoid a lot of unnecessary work. Just a thought.

On Thu, Nov 2, 2017 at 7:31 AM Peter Stuge <peter at stuge.se> wrote:

> Hi Stefan,
> Stefan Roese wrote:
> > I'm facing a PCIe init related problem most likely caused in the
> > Intel FSP in our BayTrail U-Boot port (not coreboot!). I hope you
> > don't mind me posting this question on this coreboot list, since
> > here many more people are present with Intel FSP knowledge.
> I think you are actively hurting the overall ecosystem by working on
> a different project (FSP in U-Boot) which overlaps with coreboot
> efforts.
> The only thing that makes sense is for U-Boot to focus on being a
> payload that is started by coreboot (this has already been done) and
> for your issues to be solved within the coreboot frame.
> Anything else is an obviously selfish effort by Denx and I don't see
> why the coreboot community would support that. Please know that I
> have no bias against Denx, since I had no experience with Denx I
> thus far always erred on the side of giving benefit of the doubt.
> At the very least, you should have framed your question in a coreboot
> setting, if you want to engage with the coreboot community.
> That is of course still very much possible.
> //Peter
> --
> coreboot mailing list: coreboot at coreboot.org
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