[coreboot] BayTrail PCIe problems (hangup) in FSP (in U-Boot)

[Peter Stuge]

Hi Stefan,

Stefan Roese wrote:
> I'm facing a PCIe init related problem most likely caused in the
> Intel FSP in our BayTrail U-Boot port (not coreboot!). I hope you
> don't mind me posting this question on this coreboot list, since
> here many more people are present with Intel FSP knowledge.

I think you are actively hurting the overall ecosystem by working on
a different project (FSP in U-Boot) which overlaps with coreboot
efforts.

The only thing that makes sense is for U-Boot to focus on being a
payload that is started by coreboot (this has already been done) and
for your issues to be solved within the coreboot frame.

Anything else is an obviously selfish effort by Denx and I don't see
why the coreboot community would support that. Please know that I
have no bias against Denx, since I had no experience with Denx I
thus far always erred on the side of giving benefit of the doubt.

At the very least, you should have framed your question in a coreboot
setting, if you want to engage with the coreboot community.

That is of course still very much possible.


//Peter